3 commits

Author	SHA1	Message	Date
Jeroen Domburg	34372a091c	Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.	2017-09-04 12:05:49 +08:00
Angus Gratton	71c70cb15c	heap: Refactor heap regions/capabilities out of FreeRTOS ... Remove tagged heap API, rename caps_xxx to heap_caps_xxx Also includes additional heap_caps_xxx inspection functions.	2017-07-10 17:46:03 +08:00
Ivan Grokhotkov	7ee8ee8b7e	soc: add source code of rtc_clk, rtc_pm	2017-04-11 15:45:54 +08:00