Commit graph

12026 commits

Author SHA1 Message Date
Ivan Grokhotkov
f5d37c453a unit-test-app: make compatible with ESP32-S2 reset reasons
ESP32-S2 has slightly different names of reset reasons, printed by
the ROM. Allow using ESP32 reset reason names in test cases.
2020-01-29 19:05:33 +01:00
David Cermak
3f10c4af06 OTA: enable example builds for esp32s2 target
Closes IDF-1035
2020-01-29 15:20:42 +01:00
Ivan Grokhotkov
ac1834e288 Merge branch 'feature/freertos_xtensa_folder' into 'master'
freertos: moved all xtensa specific files into a separated folder

See merge request espressif/esp-idf!7377
2020-01-29 17:04:34 +08:00
Ivan Grokhotkov
ce7af82e05 Merge branch 'bugfix/idf_monitor_usbser_sys' into 'master'
tools: work around usbser.sys bug in IDF monitor

Closes IDFGH-2592

See merge request espressif/esp-idf!7460
2020-01-29 17:02:44 +08:00
Rosa Elena Veiga Otero
af6541e773 tools: work around usbser.sys bug in idf_monitor
implemented workaround in idf_monitor for known usbser.sys bug which
causes changes in RTS signal to only be sent if DTR signal also changes.
Works by forcing a dummy change in DTR signal (re-assigning its current
value, as it has previously been done in the flashing tool)

Closes https://github.com/espressif/esp-idf/pull/4676
2020-01-28 11:47:45 +01:00
Angus Gratton
f5b82c5b1f Merge branch 'bugfix/esptool_elf2image_flashmode' into 'master'
esptool_py: pass flash mode/frequency/size to elf2image

See merge request espressif/esp-idf!7440
2020-01-28 14:22:35 +08:00
Felipe Neves
429712c6eb freertos: moved all xtensa specific files into a separated folder 2020-01-27 16:05:30 -03:00
Ivan Grokhotkov
37edc8f6e9 Merge branch 'feature/idf_docker_updates' into 'master'
Docker image improvements

Closes IDFGH-2559

See merge request espressif/esp-idf!7454
2020-01-28 02:28:34 +08:00
Felipe Neves
5cbb3f05c0 freertos: Added experimental, optional FPU usage on level 1 ISR 2020-01-27 10:55:03 -03:00
Felipe Neves
670ea56df2 freertos: added fpu in isr test case 2020-01-27 10:55:03 -03:00
Ivan Grokhotkov
f74b83b5b4 Merge branch 'feature/idf_tools_doc' into 'master'
docs: add API guide page about IDF Tools

See merge request espressif/esp-idf!7378
2020-01-27 17:10:21 +08:00
Shivani Tipnis
770a1eae01 ci: Fix target variable default value 2020-01-27 09:05:23 +00:00
Ivan Grokhotkov
600d542f53 Merge branch 'bugfix/http_client_chunked_test' into 'master'
http_client: fix example test to expect -1 as content-len for chunked transfer

See merge request espressif/esp-idf!7455
2020-01-27 03:21:42 +08:00
David Cermak
0c21e677cc http_client: fix example test to expect -1 as content-len for chunked transfer 2020-01-26 16:42:37 +01:00
Michael (XIAO Xufeng)
7026087dc0 spi: support esp32s2 2020-01-26 17:24:12 +08:00
Michael (XIAO Xufeng)
9d41829e09 spi: update esp32s2 hardware description files 2020-01-26 17:24:11 +08:00
Ivan Grokhotkov
287d0039ff tools/docker: enable ccache by default 2020-01-24 19:12:22 +01:00
Ivan Grokhotkov
54eed09d70 tools/docker: install CMake version provided in tools.json
Closes https://github.com/espressif/esp-idf/issues/4644
Closes IDFGH-2559
2020-01-24 19:11:56 +01:00
Ivan Grokhotkov
1cd6f67679 docs: add API guide page about IDF Tools 2020-01-24 14:02:21 +01:00
Ivan Grokhotkov
4145ca591f examples: re-enable SystemView examples for esp32s2
Closes IDF-1357
2020-01-24 10:48:38 +01:00
Ivan Grokhotkov
3eb190ce48 esp32s2: fix interrupt names used by SystemView 2020-01-24 10:48:38 +01:00
Ivan Grokhotkov
bb59ca3ab3 esp32s2: add missing ESP32S2_MEMMAP_TRACEMEM_TWOBANKS option
It is used when app-trace is enabled, to provide ping-pong buffers.
2020-01-24 10:48:38 +01:00
Ivan Grokhotkov
02a99e84c8 esp32s2: move trace memory reservation to soc_memory_layout.c 2020-01-24 10:48:38 +01:00
Ivan Grokhotkov
110f3c9ff5 esp32s2: put static .data and .bss directly after .iram.text
This results in a single large heap section instead of two smaller
ones.

Closes IDF-1354
2020-01-24 10:48:38 +01:00
Ivan Grokhotkov
27bff3517f esp32s2: fix "loadable ELF" build
Closes IDF-1346
2020-01-24 10:48:20 +01:00
Ivan Grokhotkov
fd15acb50f esp32s2: bootloader: move iram_loader segment higher
This gives extra 16kB for the application's static .data/.bss
2020-01-24 10:48:20 +01:00
Ivan Grokhotkov
354ce68dce soc: move reserved regions out of memory_layout_utils.c
These definitions have ended up being chip specific. Moving them into
respective soc_memory_layout.c makes the whole picture of memory
regions easier to see, and also makes adding support for new chips
easier.
2020-01-24 10:48:20 +01:00
Ivan Grokhotkov
81f0e7d90f Merge branch 'bugfix/esp32s2_freertos_tls' into 'master'
esp32s2: fix THREADPTR calculation, re-enable FreeRTOS TLS tests

Closes IDF-1239

See merge request espressif/esp-idf!7403
2020-01-24 17:47:43 +08:00
Ivan Grokhotkov
9fafdb7e6d Merge branch 'bugfix/esp32s2_newlib_nano' into 'master'
esp32s2: esp_rom: separate nano formatting functions, fix newlib tests

See merge request espressif/esp-idf!7447
2020-01-24 17:46:54 +08:00
Anton Maklakov
a92a922b51 Merge branch 'bugfix/esp32s2_nostdlib' into 'master'
esp32s2: remove -nostdlib accidentally added

See merge request espressif/esp-idf!7446
2020-01-24 12:25:56 +08:00
Angus Gratton
c9e35ccf41 Merge branch 'bugfix/esp32s2_disable_hw_crypto' into 'master'
mbedtls: temporary disable HW crypto for ESP32-S2

See merge request espressif/esp-idf!7448
2020-01-24 07:43:25 +08:00
Ivan Grokhotkov
6e527fb763 mbedtls: temporary disable HW crypto for ESP32S2
To be re-enabled once HW crypto accelerators support is merged:
IDF-714, IDF-716, IDF-803.
2020-01-23 18:14:10 +01:00
Ivan Grokhotkov
16e63f6a3f esp32s2: esp_rom: separate nano formatting functions, fix newlib tests 2020-01-23 18:07:37 +01:00
Ivan Grokhotkov
cbb6beccd9 ci: add build system tests for bootloader flash mode/freq/size 2020-01-23 17:03:52 +01:00
Ivan Grokhotkov
90af8531d8 esp32s2: remove -nostdlib accidentally added
-nostdlib was removed in 9a2af7a and then accidentally added
in 1c2cc54.

The issue manifested itself as a failure to link some symbols from
libgcc, even though libgcc should implicitly appear at the end of the
linker command line when -nostdlib is not given.
2020-01-23 17:00:31 +01:00
Ivan Grokhotkov
caef7ad9f2 esp32, esp32s2beta: move brownout.c to esp_common 2020-01-23 13:44:19 +01:00
Ivan Grokhotkov
70752baba4 esp32s2: add brownout detector support
1. add brownout detector HAL for esp32 and esp32s2
2. enable brownout reset for esp32 rev. 1 and above
3. add approximate brownout detector levels for esp32s2
2020-01-23 13:44:19 +01:00
Ivan Grokhotkov
09950797cb esptool_py: pass flash mode/frequency/size to elf2image
Otherwise the image gets generated with wrong parameters, and the
binary does not boot unless it has been "fixed" by esptool during the
upload.
2020-01-23 12:19:15 +01:00
Ivan Grokhotkov
46035032cf esp32s2: fix inconsistency between reg and struct headers
test_mux register doesn't exist in RTCCNTL anymore, remove it from
struct header. Also remove adc_ll_vref_output implementation, which
depends on that register.
2020-01-23 11:30:11 +01:00
Ivan Grokhotkov
cbb84e8f5e esp32s2: fix THREADPTR calculation, re-enable FreeRTOS TLS tests
1. Clarify THREADPTR calculation in FreeRTOS code, explaining where
the constant 0x10 offset comes from.

2. On the ESP32-S2, .flash.rodata section had different default
alignment (8 bytes instead of 16), which resulted in different offset
of the TLS sections. Unfortunately I haven’t found a way to query
section alignment from C code, or to use a constant value to define
section alignment in the linker script. The linker scripts are
modified to force a fixed 16 byte alignment for .flash.rodata on the
ESP32 and ESP32-S2beta. Note that the base address of .flash.rodata
was already 16 byte aligned, so this has not changed the actual
memory layout of the application.

Full explanation of the calculation below.

Assume we have the TLS template section base address
(tls_section_vma), the address of a TLS variable in the template
(address), and the final relocation value (offset). The linker
calculates:
offset = address - tls_section_vma + align_up(TCB_SIZE, alignment).

At run time, the TLS section gets copied from _thread_local_start
(in .rodata) to task_thread_local_start. Let’s assume that an address
of a variable in the runtime TLS section is runtime_address.
Access to this address will happen by calculating THREADPTR + offset.
So, by a series of substitutions:

THREADPTR + offset = runtime_address THREADPTR = runtime_address - offset
THREADPTR = runtime_address - (address - tls_section_vma + align_up(TCB_SIZE, alignment)) THREADPTR = (runtime_address - address) + tls_section_vma - align_up(TCB_SIZE, alignment)

The difference between runtime_address and address is same as the
difference between task_thread_local_start and _thread_local_start.
And tls_section_vma is the address of .rodata section, i.e.
_rodata_start. So we arrive to

THREADPTR = task_thread_local_start - _thread_local_start + _rodata_start - align_up(TCB_SIZE, alignment).

The idea with TCB_SIZE being added to the THREADPTR when computing
the relocation was to let the OS save TCB pointer in the TREADPTR
register. The location of the run-time TLS section was assumed to be
immediately after the TCB, aligned to whatever the section alignment
was. However in our case the problem is that the run-time TLS section
is stored not next to the TCB, but at the top of the stack. Plus,
even if it was stored next to the TCB, the size of a FreeRTOS TCB is
not equal to 8 bytes (TCB_SIZE hardcoded in the linker). So we have
to calculate THREADPTR in a slightly obscure way, to compensate for
these differences.

Closes IDF-1239
2020-01-23 11:29:22 +01:00
Angus Gratton
c1ab87b580 Merge branch 'bugfix/fix_broken_example_link' into 'master'
doc:fix icmp initialization and broken example links

Closes IDFGH-2563

See merge request espressif/esp-idf!7402
2020-01-23 14:32:55 +08:00
Angus Gratton
4e4bfb4348 Merge branch 'bugfix/ci_handle_retried_jobs' into 'master'
CI: fix CI fail when have retried build jobs

See merge request espressif/esp-idf!7435
2020-01-23 09:30:07 +08:00
Angus Gratton
d672809080 Merge branch 'refactor/rename_esp32s2beta_to_esp32s2' into 'master'
global: rename esp32s2beta to esp32s2

See merge request espressif/esp-idf!7369
2020-01-23 09:16:30 +08:00
Angus Gratton
fbb5844151 Merge branch 'bugfix/esp_timer_stucks_into_esp_timer_impl_set_alarm' into 'master'
esp_timer/esp32: Fix esp_timer_impl_set_alarm() when CPU and APB freqs are changed

Closes WIFI-1576

See merge request espressif/esp-idf!7303
2020-01-23 09:14:53 +08:00
Mahavir Jain
7be7839690 Merge branch 'nimble/dynamic_buffers' into 'master'
NimBLE: Use dynamic buffers instead of static memory.

See merge request espressif/esp-idf!7337
2020-01-23 00:55:51 +08:00
Hrishikesh Dhayagude
91c8f324a9 NimBLE: Use dynamic buffers instead of static memory.
The NimBLE host buffers that consume a significant amount of memory are
now allocated dynamically.
The advantage is that, the memory can be reclaimed in cases where BLE
is turned off and not required for the current boot cycle
2020-01-23 00:55:51 +08:00
morris
405b0e7f06 esp_rom: splict libgcc and libc outof rom.ld bundle file 2020-01-23 00:27:47 +08:00
KonstantinKondrashov
6061d5d65a esp_timer/esp32: Fix case when alarm_reg > counter_reg but FRC_TIMER_INT_STATUS is not set
Closes: WIFI-1576
Closes: https://github.com/espressif/esp-idf/issues/2954
2020-01-22 14:30:34 +08:00
michael
1f43f33567 sdio: update the host example to support working with a slave without DAT1
The interrupt line (DAT1) is an extra pin comparing to SD memory,
allowing the slave to actively inform the host some events.

It's possible for two ESP32 chips to communicate with each other in
1-bit mode or SPI mode without the DAT1 line by polling the slave's
interrupt registers. But this will increase the CPU load of the host,
and do harm to the response speed to slave events.
2020-01-22 05:34:21 +00:00
morris
e30cd361a8 global: rename esp32s2beta to esp32s2 2020-01-22 12:14:38 +08:00