Commit graph

35 commits

Author SHA1 Message Date
wangmengyang
2797966c47 component/bt: increase programming delay for event arbiter to allow for heavy workload 2017-09-30 18:12:45 +08:00
Tian Hao
00a7cdbb0b component/bt : support adv & scan simultaneously
1. Occupy conn[9] for adv. The max connection number of bluetooth controller decrease to 9. (Previously, it is 10)
2. modify the enum of setting BLE TX power corresponding to connection's.
3. fix libbtdm_app.a cwitch jump table
2017-09-12 16:10:30 +08:00
Jeroen Domburg
34372a091c Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet. 2017-09-04 12:05:49 +08:00
Angus Gratton
b428d28950 spiflash rom: Add symbols accidentally removed in refactor 2017-06-01 09:08:29 +10:00
jack
fc130fba86 fix bug that files missing commit in MR 773 2017-05-31 19:37:39 +08:00
Ivan Grokhotkov
67a147fc6f Merge branch 'bugfix/bt_controller_log_clean_up' into 'master'
component/bt: disable information loggings from bt controller

clean-up information loggings during controller initialization

See merge request !769
2017-05-19 11:50:11 +08:00
wangmengyang
df3164bd58 component/bt: disable information loggings from bt controller 2017-05-18 21:44:06 +08:00
Deomid Ryabkov
a40fd2e7bd esp32.ld: Add an entry for ets_write_char_uart
It is mentioned in ets_sys.h, but not actually PROVIDEd.

Merges https://github.com/espressif/esp-idf/pull/545
2017-05-17 10:45:17 +10:00
Jiang Jiang Jian
1e0710f1b2 Merge branch 'bugfix/bt_acl_tx' into 'master'
components/bt: update libbtdm.a with a bugfix for an assertion failure when ACL-…

…U transmission is resumed

See merge request !755
2017-05-12 18:23:20 +08:00
wangmengyang
23965694b1 components/bt: update libbtdm.a with a bugfix for an assertion failure when ACL-U transmission is resumed 2017-05-12 17:53:25 +08:00
Tian Hao
377a1f5ea1 component/esp32 : do more fix of dualcore bug
1. the cache API in romcode will access DPORT register, so protect it.
2. fix STALL spelling.
3. check dport access by non-dport access function
2017-05-12 15:41:51 +08:00
wangmengyang
244fbf1e84 component/bt: fix some bugs related to bluetooth sniff mode in controller
1. fix some bugs in bluetooth sniff mode in controller
2. export some symbols to esp32.rom.ld including functions and global variables in ROM code
3. update libbtdm.a which includes "IRAM_ATTR" addition or removal for some functions
2017-05-04 15:08:07 +08:00
Angus Gratton
f7793840e1 bootloader: Add QIO support for ESP32-D2WD SPI flash 2017-04-13 17:55:47 +10:00
Alexey Gerenkov
0860f46220 spi_flash: Fixed bug in SPI flash ROM driver to work with embedded flash chip
1) fixed SPI_read_status: added check for flash busy flag in matrix mode
2) fixed SPI_page_program: enable write before writing data to SPI FIFO
3) SPI flash ROM funcs replacement is controlled via menuconfig option
2017-04-11 10:51:19 +08:00
Jeroen Domburg
3462b53fbc MR suggestions 2017-03-08 19:27:30 +08:00
Jeroen Domburg
e5f54a9dbd Validate more GPIO ROM functions for non-use of static RAM 2017-03-08 19:04:28 +08:00
Jeroen Domburg
0db8b00b8a tight 28k 2017-03-08 19:04:28 +08:00
Angus Gratton
68cba2a1fb Bootloader: Support switching to Quad I/O mode during boot process 2017-02-09 08:44:05 +11:00
Ivan Grokhotkov
e4811216ff deep sleep: fix regression due to moving ets_update_cpu_frequency into IRAM
Deep sleep stub may call ets_update_cpu_frequency, which has been moved from ROM to IRAM.
Restore the ROM version in the linker script, call it ets_update_cpu_frequency_rom, use it in the deep sleep stub.
2017-01-12 14:15:25 +08:00
Ivan Grokhotkov
4f909b8ecc Merge branch 'bugfix/ets_delay_on_app_cpu' into 'master'
esp32: ets_update_cpu_frequency should set tick scale for both CPUs

ets_update_cpu_frequency ROM function updates g_ticks_per_us, which is has two copies, one for each CPU.
The APP CPU copy of g_ticks_per_us never got updated, resulting in shorter delays produced by ets_delay_us on the APP CPU.

This MR replaces ROM ets_update_cpu_frequency with a copy in IRAM which updates scaling factors on both of the CPUs.

So now we get expected delays (in microseconds):
```
ets_delay_us core=0 expected=50000 actual=50014
ets_delay_us core=1 expected=50000 actual=50015
vTaskDelay core=0 expected=50000 actual=49428
vTaskDelay core=1 expected=50000 actual=50000
```

Reported on the forum: http://esp32.com/viewtopic.php?f=2&t=713#p3722

See merge request !373
2017-01-07 18:45:14 +08:00
Liu Zhi Fu
a575b9e893 esp32: modify ld file to fix a crash issue 2017-01-07 16:12:07 +08:00
Ivan Grokhotkov
1cbc2fa046 esp32: ets_update_cpu_frequency should set tick scale for both CPUs 2017-01-06 15:00:17 +08:00
Jeroen Domburg
78161a1fe3 Replace non-multicore-aware rom funcs with multicore-aware funcs, ESP_LOG->ESP_EARLY_LOG fix, reserve ints used in wireless libs. Fixes WiFi crashing 2016-12-13 13:24:01 +08:00
Ivan Grokhotkov
221dc13535 newlib: add "full" formatting support, add missing functions
- add two versions of libc: libc.a and libc_nano.a. First one has full C99 formatting support, second one uses “nano” formatting functions available in ROM.
- fix linker error for fmod, fmodf, atof, atoff
- update tests
2016-12-08 11:04:54 +08:00
Tian Hao
55e0690f69 component/bt : wifi/bt software coexist option
1. option of sw coexist
2. cpu set freq function modify
3. update lib
4. ld add static data address
2016-11-24 19:57:47 +08:00
Angus Gratton
1413ec3ff0 Remove SPIUnlock from linker script symbols
Add a comment about why it was removed and where it went.
2016-10-21 17:50:37 +11:00
Angus Gratton
8e8caca2e2 Replace ROM SPIUnlock function with a version that can't lock flash
Avoid bug where a bad status read is copied back to flash and can set
lock bits.
2016-10-21 16:12:51 +11:00
Ivan Grokhotkov
42827ff869 bootloader, menuconfig: add flash size setting support 2016-10-21 15:27:25 +11:00
Ivan Grokhotkov
fcccec4a3b Merge branch 'master' into feature/btdm_controller
* master: (32 commits)
  components/nghttp: rename Makefile to component.mk
  components/nghttp: add HTTP2.0 protocol feature
  compoenents/esp32: don't alias start_cpu1 to start_cpu0_default
  components/freertos: fix a bug with an uninitialised return value
  Change application entry point name back to app_main
  gitlab-ci: build SSC with matching branch name, if available
  components/spi_flash: remove stray level of indentation
  components/nvs: fix broken sentences in comment blocks
  components/esp32: fix renaming of esp_event_set_cb, minor clean up
  components/esp32: remove "_user" part from entry points, weaken start_cpu0/1
  Fix a spelling mistake in panic message, add carriage return to stack canary message
  components/lwip,esp32: fixes for C++
  components/bt: fix compilation, remove ./ from makefile
  components/esp32: clarify type of queue in wifi_init_config_t, add default init macro
  components/esp32: add ESP_ERROR_CHECK
  Event handling refactoring
  clean up warnings
  components/esp32,bt: fix typos in comments
  Startup flow refactoring
  Roll back submodule version
  ...
2016-09-27 12:40:56 +08:00
wangmengyang
b9167f70cd component/bt: add VHCI mutex protetion
1. add mutex to VHCI APIs
2. remove bss/data log print during initialization;
3. add bss/data symbols in esp32.rom.ld
4. add & modify BTDM OSI functions
2016-09-26 18:52:15 +08:00
Ivan Grokhotkov
b936441b9b Startup flow refactoring
This change removes implicit WiFi/BT initialization from startup code.
"main" task is started once essential part of startup code is complete.
This task calls application-provided "int main(void)" function, which can call WiFi/BT init functions if necessary.
2016-09-26 00:50:57 +08:00
Ivan Grokhotkov
ff2750ab07 components/esp32: move peripheral symbols to separate ld script 2016-09-19 15:05:32 +08:00
Wangjialin
489b4f31a9 add peripheral module struct headers 2016-09-18 03:14:18 +08:00
jack
24011ddd05 header files: modify rom code and soc header files
1. timer reg file for both time group 0 and time group 1, not only timer group 0
2. fix bug that io mux header file mismatch with chip
3. fix bug that some BASE address not correct
4. add some static function to eagle.fpga32.rom.addr.v7.ld
5. add interrupts usage table
6. add some comments for rom code functions
2016-09-12 17:47:49 +08:00
Wu Jian Gang
c3102e8fb2 ld: seperate/rename eagle.xxx.ld to esp32.xxx.ld 2016-08-25 11:07:53 +08:00
Renamed from components/esp32/ld/eagle.fpga32.rom.addr.v7.ld (Browse further)