Commit graph

49 commits

Author SHA1 Message Date
Angus Gratton
a9c4ed7139 Merge branch 'master' into feature/cmake 2018-08-30 18:51:01 +08:00
Ivan Grokhotkov
3ef650cd46 esp32/test: add tests for reset reasons 2018-08-20 16:49:20 +08:00
Angus Gratton
ff2404a272 Merge branch 'master' into feature/cmake 2018-08-16 17:14:17 +10:00
Angus Gratton
272b95e8ce linker: Don't link all of 'soc' into IRAM
Moves any code in *_perpih.c, memory_layout_utils.c to flash
2018-08-06 01:37:55 +00:00
Angus Gratton
a5ae5ac4b3 soc: Allow components to reserve fixed memory ranges that they need
No longer necessary to keep all reserved addresses in 'soc'.

Means 'soc' does not need to know about 'bt', for example.

Also means that Bluetooth can be enabled in config without any memory being reserved for BT
controller. Only if code calling the BT controller is linked in, will this memory be reserved...
2018-08-06 01:37:55 +00:00
Hrishikesh Dhayagude
f610249bdd Reclaim BT/BTDM BSS and Data in bluetooth memory release function
1. Modify esp_bt_controller_mem_release() to release BTDM BSS and Data to heap if
ESP_BT_MODE_BTDM mode is passed to it
2. Add a new API esp_bt_mem_release() which internally calls
esp_bt_controller_mem_release() with the provided mode and then if mode
is ESP_BT_MODE_BTDM, releases BT BSS and Data to heap.

Background:
For Wi-Fi and BT/BLE applications, for e.g. the usecase is like when
Bluetooth is used for provisioning and once the device is connected to the Wi-Fi
AP, we can turn off Bluetooth completely. In such scenarios, it should be possible to
reclaim all the memory of Bluetooth. Although, currently this does not
happen.

Experiment:
Made the following modifications to examples/bluetooth/gatt_server :
1. Added support of simple_wifi to it
2. Moved all the bluetooth related code under CONFIG_BT_ENABLED config
option
3. Calculated the free heap in 2 similar scenarios:
   i. Disabled BT (CONFIG_BT_ENABLED undefined) and checked the free
heap after STA connected
   ii. Kept BT enabled and disabled it after STA connected and checked
the free heap
Ideally, the numbers for i., ii. above should have been similar. But
there was a delta of almost 30-31K. (i. > ii.)
4. Through make size-components checked the common BSS for libbta.a and libbtdm_app.a
and found it to be almost 30K. Data is around 1K

Solution:
1. Modified the linker script to mark the BSS and Data for these libraries and
free it when ESP_BT_MODE_BTDM mode is passed to mem release APIs.
2. Verified that the free heap is comparable for i. and ii. above.

Note: It is known that once this is done, Bluetooth can only be used
again post reboot.

Signed-off-by: Hrishikesh Dhayagude <hrishi@espressif.com>
2018-07-20 11:33:26 +05:30
Alex Lisitsyn
44b1bc0ab9 esp32: Add .noinit and .rtc_noinit sections to the linker script
Added .rtc_noinit and .noinit section definitions into linker file /esp32/ld/esp32.common.ld.
The macro __NOINIT_ATTR, RTC_NOINIT_ATTR declared in esp32/esp_attr.h file.
Added unit test file to test added behavior for noinit variables and its attributes.
Added documentation changes for new added attributes.
Make some corrections after code review:
The linker file has been corrected to place noinit section before bss_start to make it safer.
Documentation file has been modified to clarify reset behavior of allocated data .
Corrected typos in test_noinit.c and removed assertion of noinit variable to avoid possible issues with ROM boot loader memory allocation.
The linker file has been corrected to place noinit section before bss_start to make it safer.
Documentation file has been modified to clarify reset behavior of allocated data .
Corrected typos in test_noinit.c and removed assertion of noinit variable to avoid possible issues with ROM boot loader memory allocation.
Update test_noinit.c file to address RTCWDT_RTC_RESET reset reason instead of POWERON_RESET.
Test optimized to pass automated unit testing.
esp32: Add .noinit and .rtc_noinit sections to the linker script
Update of general-notes.rst documentation to fomat examples as code and attributes as identifiers.
Test test_noinit.c corrected to pass automated testing (support ofTEST_CASE_MULTIPLE_STAGES())

https://ezredmine.espressif.cn:8765/issues/15878
2018-05-16 17:33:37 +05:00
Angus Gratton
b57843b66a cmake: Linker scripts need to account for .c.obj extension as well as .o 2018-04-30 09:59:20 +10:00
Alexey Gerenkov
f8c42369f1 freertos: Adds C11 TLS support 2018-02-07 18:46:57 +03:00
wangmengyang
a31d07ba25 move rodata segment of libphy.a to dram
1. rodata segment of libphy.a(about 1200B) can be accessed by ISRs, so put it into DRAM
2018-02-02 13:00:11 +08:00
Liu Zhi Fu
2242bf9b37 lwip/esp32/examples: wifi throughput optimizations
1. Put some lwip udp rx/tx relating functions to IRAM
2. Put some wifi rx/tx relating functions to IRAMa
3. Reduce wifi dynamic malloc from 4 to 1 for each ebuf
4. Update iperf example accordingly
5. Update libphy.a to v383
2018-01-30 16:27:49 +08:00
Ivan Grokhotkov
73e8afc5b9 soc: place constant data from rtc_clk.c into DRAM
In release mode, switches in rtc_clk_bbpll_set would be converted to
jump tables. These tables would be placed into .rodata, which caused
rtc_clk_cpu_freq_set to be unusable while cache is disabled. This
manifested itself in crashes when exiting from light sleep:

https://esp32.com/posting.php?mode=reply&f=13&t=3089#pr14590
2017-09-26 17:08:49 +08:00
Jeroen Domburg
9c56d9e75e Make sure functions that are in ROM in the non-external-ram-workaround version, are in RAM (and not in flash) in the ext-ram workaround version. 2017-09-13 10:36:56 +08:00
Alexey Gerenkov
891f0db31d esp32: Adds gcov over JTAG feature
Implements function to dump GCOV data to host via JTAG.
The following functionality was added:
 - Host file I/O
 - GCOV runtime I/O stubs
 - GCOV example
2017-09-07 18:13:16 +03:00
Angus Gratton
ec498ad86d libgcc: Place assembly functions (including __xtensa_libgcc_window_spill) in IRAM 2017-09-07 16:32:05 +10:00
Angus Gratton
5c417963eb multi_heap: Add heap poisoning features 2017-09-07 16:32:05 +10:00
Ivan Grokhotkov
d4e950d311 Merge branch 'feature/cxx_exceptions' into 'master'
Partial support for C++ exceptions

See merge request !930
2017-09-01 00:27:41 +08:00
Angus Gratton
f824829a13 Merge branch 'bugfix/dont_link_unused_data_sections' into 'master'
ld: Save RAM by removing unused .data sections at link time

See merge request !985
2017-07-17 14:10:12 +08:00
Angus Gratton
187b5fb888 ld: Remove unused .data sections at link time
Reduces static RAM, code size.
2017-07-12 13:05:54 +08:00
Angus Gratton
71c70cb15c heap: Refactor heap regions/capabilities out of FreeRTOS
Remove tagged heap API, rename caps_xxx to heap_caps_xxx

Also includes additional heap_caps_xxx inspection functions.
2017-07-10 17:46:03 +08:00
Angus Gratton
5ee49fd311 heap: Add new multi_heap heap implementation to replace FreeRTOS-based tagged heaps 2017-07-10 17:46:03 +08:00
Jan Mrázek
f698a1b2d3 Add missing support for C++ exceptions
Specifying -fexceptions for the compiler is not enough.

- add necessary zero padding after .eh_frame section
- link .gcc_except_table_table in a way flash script does not complain
- call __registrer_frame_info before global constructors

Kudos jcmvbkbc for the necessary help.
2017-06-28 13:53:42 +08:00
Alexey Gerenkov
8d43859b6a esp32: SEGGER SystemView Tracing Support
Implements support for system level traces compatible with SEGGER
SystemView tool on top of ESP32 application tracing module.
That kind of traces can help to analyse program's behaviour.
SystemView can show timeline of tasks/ISRs execution, context switches,
statistics related to the CPUs' load distribution etc.

Also this commit adds useful feature to ESP32 application tracing module:
 - Trace data buffering is implemented to handle temporary peaks of events load
2017-06-27 20:52:43 +03:00
XiaXiaotian
9d8425bd72 put RODATA of libphy.a into DRAM
There are some RODATAs of libphy.a that are called in ISR. So need
    to put them into DRAM to avoid access them when R/W SPI flash. Due
    to the RODATAs which are called in ISR haven't been picked out to
    put into DRAM, put all of the RODATA of libphy.a into DRAM. This
    will be optimized in the future.
2017-04-24 11:22:49 +08:00
XiaXiaotian
b238bc691d Do not put the whole object files into IRAM. Add attributes to the functions called in ISR instead. 2017-04-21 15:38:01 +08:00
Alexey Gerenkov
55f1a63faf esp32: Adds functionality for application tracing over JTAG
- Implements application tracing module which allows to send arbitrary
   data to host over JTAG. This feature is useful for analyzing
   program modules behavior, dumping run-time application data etc.
 - Implements printf-like logging functions on top of apptrace module.
   This feature is a kind of semihosted printf functionality with lower
   overhead and impact on system behaviour as compared to standard printf.
2017-04-17 23:26:29 +03:00
Ivan Grokhotkov
9edab21385 Merge branch 'feature/rtc_clk_impl' into 'master'
Introduce soc component, add source of rtc_clk and rtc_pm libraries

This MR adds parts of the RTC library source code (initialization, clock selection functions, sleep functions). WiFi-related power management functions are kept inside the precompiled library. Most of RTC library APIs have been renamed.

Default CPU frequency option in Kconfig is set to 160MHz, pending qualification of 240MHz mode at high temperatures.

Register header files are moved into the new soc component, which will contain chip-specific header files and low-level non-RTOS-aware APIs (such as rtc_ APIs). Some of the files from ESP32 component were also moved: cpu_util.c, brownout.c, and the corresponding header files. Further refactoring of ESP32 component into more meaningful layers (chip-specific low level functions; chip-specific RTOS aware functions; framework-specific RTOS-related functions) will be done in future MRs.

See merge request !633
2017-04-12 10:38:23 +08:00
Ivan Grokhotkov
7ee8ee8b7e soc: add source code of rtc_clk, rtc_pm 2017-04-11 15:45:54 +08:00
Alexey Gerenkov
0860f46220 spi_flash: Fixed bug in SPI flash ROM driver to work with embedded flash chip
1) fixed SPI_read_status: added check for flash busy flag in matrix mode
2) fixed SPI_page_program: enable write before writing data to SPI FIFO
3) SPI flash ROM funcs replacement is controlled via menuconfig option
2017-04-11 10:51:19 +08:00
Jiang Jiang Jian
8ee6f8227e Merge branch 'bugfix/reset_mac_cause_bt_cannot_rx_data' into 'master'
Reset WIFI mac when wifi start and update wifi lib

1. reset wifi mac when wifi start

2. roll back rx hung workaround for beacon timeout

3. fix amsdu ap interface wrong issue

4. fix amsdu header parse error

5. fix amsdu flag wrong issue

6. PHY: V350, fix BT rssi bug

7. RTC: V225, fix bt will be not work when wifi is reset

See merge request !606
2017-03-24 17:02:26 +08:00
Ivan Grokhotkov
710c853adc Merge branch 'bugfix/spi_flash_lock_period' into 'master'
SPI flash operations lock for shorter periods

Based on bug report here:
https://esp32.com/viewtopic.php?f=13&t=1489&p=6816#p6773

Long SPI flash erase (and possibly write/read) cycles block all tasks on both CPUs for an extended period, and can lead to WiFi dissassociation (and general priority inversion.)

This MR inserts preemption breaks into large operations (all erases, writes every 8KB, reads every 16KB).

Overhead of a single spi_flash_guart_start()/spi_flash_guard_end() cycle measured at approx 67us (assuming no preemption.)

See merge request !600
2017-03-24 15:55:42 +08:00
Angus Gratton
0e31eb458e esp32: Move heap_alloc_caps to IRAM
Rest of malloc() path was already in IRAM
2017-03-24 10:41:45 +08:00
XiaXiaotian
6181c39f05 Reset WIFI mac when wifi start and update wifi lib
1. reset wifi mac when wifi start

2. roll back rx hung workaround for beacon timeout

3. fix amsdu ap interface wrong issue

4. fix amsdu header parse error

5. fix amsdu flag wrong issue

6. PHY: V350, fix BT rssi bug

7. RTC: V225, fix bt will be not work when wifi is reset
2017-03-23 14:28:27 +08:00
Angus Gratton
6afea0e81c linker scripts: Add explicit symbols for _iram_start and _flash_cache_start
This is to avoid confusion when idf_monitor prints the first symbol in each section, ie "WindowOverflow4" or similar,
when bootloader prints the section mapping address.

Closes #447 https://github.com/espressif/esp-idf/issues/447
2017-03-21 16:45:13 +08:00
XiaXiaotian
a51f378ecc bugfix: it causes exception that wifi interrupt happens when read/write flash, if pp_post() is on icache. 2017-02-21 14:25:34 +08:00
XiaXiaotian
eb14284c92 disable PHY and RF when stop WiFi and disable BT
1. Add disable PHY and RF when WiFi and BT are both disabled(including call sniffer disable API).

2. Do not init PHY and RF when cpu start. Init PHY and RF when call Wifi or BT start APIs(including sniffer enable API).

3. Add a temporary lib: librtc_clk.a and will delete it when CPU frequency switching function is done.

4. Add an function to get OS tick rate.

5. Do not put the whole pp.a in iram0, only put lmac.o, ieee80211_misc.o, ets_time.o and wdev.o in iram0.
2017-02-17 10:24:54 +08:00
Alexey Gerenkov
04acc88023 esp32: Fixes watchdog problem when printing core dump to uart
Also fixes generation of core dumps when flash cache is disabled
2017-02-01 18:39:28 +03:00
Tian Hao
2bb67985dc component/bt : move some codes of controller to iram
1. mv codes which called by sir into iram
2. mv libcoexist.a into iram
2017-01-18 16:38:06 +08:00
Ivan Grokhotkov
9aa0e29079 deep sleep: keep RTC_SLOW_MEM powered on if data is placed into RTC slow memory 2017-01-12 14:15:30 +08:00
Liu Zhi Fu
a575b9e893 esp32: modify ld file to fix a crash issue 2017-01-07 16:12:07 +08:00
Ivan Grokhotkov
61c6ce86d2 esp32: put .data before .bss
This change reduces chances that a large .bss segment will push .data all the way into
0x3ffe1320 — 0x3ffe5320 range where the bootloader stack is, creating a problem when
bootloader will be loading application into memory.
With this change, .data would need to be at least 200k big to cause problems.
2017-01-06 13:46:06 +08:00
Angus Gratton
5e96070c27 linker script: Remove KEEP from RAM-resident sections
Reduce RAM usage when not all data/bss sections in source files were used.
2017-01-03 11:02:12 +11:00
Ivan Grokhotkov
f18c1f13b1 Merge branch 'feature/deepsleep_stub_linker' into 'master'
Deep sleep: Any source named rtc_wake_stub* is linked as RTC wake stub code

Also move esp_deepsleep.h documentation out to docs/deep-sleep-stub.rst

See merge request !142
2016-11-01 22:27:13 +08:00
Jeroen Domburg
309bd12855 Re-add panic.o to IRAM/DRAM. 2016-10-28 14:32:11 +08:00
Ivan Grokhotkov
999e6d4e8f freertos: move panic handler data to DRAM
Fixes https://ezredmine.espressif.com/issues/7817
2016-10-27 17:57:29 +08:00
Angus Gratton
da70611196 Deep sleep: Any source named rtc_wake_stub* is linked as RTC wake stub code
Also move esp_deepsleep.h documentation out to docs/deep-sleep-stub.rst
2016-10-19 15:58:37 +11:00
Angus Gratton
7c494055e3 esp32: Bootloader wake deep sleep stub
App can contain a stub program resident in RTC fast memory. Bootloader
will load the stub on initial boot. If the device wakes from deep sleep,
the stub is run immediately (before any other data is loaded, etc.)

To implement a custom wake stub, implement a function in your program:

```
void RTC_IRAM_ATTR esp_wake_deep_sleep(void)
{
  esp_default_wake_deep_sleep();
  // other wake logic
}
```

... and it will replace the default implementation.
2016-09-28 11:14:58 +08:00
Ivan Grokhotkov
62aaec630c components/esp32: remove "_user" part from entry points, weaken start_cpu0/1
With this change applications can override very early part of startup procedure by implementing "start_cpu0" and "start_cpu1" functions.
2016-09-26 12:29:00 +08:00
Wu Jian Gang
c3102e8fb2 ld: seperate/rename eagle.xxx.ld to esp32.xxx.ld 2016-08-25 11:07:53 +08:00
Renamed from components/esp32/ld/eagle.fpga32.v7.ld (Browse further)