Commit graph

8040 commits

Author SHA1 Message Date
Felipe Neves 429712c6eb freertos: moved all xtensa specific files into a separated folder 2020-01-27 16:05:30 -03:00
Ivan Grokhotkov 81f0e7d90f Merge branch 'bugfix/esp32s2_freertos_tls' into 'master'
esp32s2: fix THREADPTR calculation, re-enable FreeRTOS TLS tests

Closes IDF-1239

See merge request espressif/esp-idf!7403
2020-01-24 17:47:43 +08:00
Ivan Grokhotkov 9fafdb7e6d Merge branch 'bugfix/esp32s2_newlib_nano' into 'master'
esp32s2: esp_rom: separate nano formatting functions, fix newlib tests

See merge request espressif/esp-idf!7447
2020-01-24 17:46:54 +08:00
Ivan Grokhotkov 6e527fb763 mbedtls: temporary disable HW crypto for ESP32S2
To be re-enabled once HW crypto accelerators support is merged:
IDF-714, IDF-716, IDF-803.
2020-01-23 18:14:10 +01:00
Ivan Grokhotkov 16e63f6a3f esp32s2: esp_rom: separate nano formatting functions, fix newlib tests 2020-01-23 18:07:37 +01:00
Ivan Grokhotkov cbb84e8f5e esp32s2: fix THREADPTR calculation, re-enable FreeRTOS TLS tests
1. Clarify THREADPTR calculation in FreeRTOS code, explaining where
the constant 0x10 offset comes from.

2. On the ESP32-S2, .flash.rodata section had different default
alignment (8 bytes instead of 16), which resulted in different offset
of the TLS sections. Unfortunately I haven’t found a way to query
section alignment from C code, or to use a constant value to define
section alignment in the linker script. The linker scripts are
modified to force a fixed 16 byte alignment for .flash.rodata on the
ESP32 and ESP32-S2beta. Note that the base address of .flash.rodata
was already 16 byte aligned, so this has not changed the actual
memory layout of the application.

Full explanation of the calculation below.

Assume we have the TLS template section base address
(tls_section_vma), the address of a TLS variable in the template
(address), and the final relocation value (offset). The linker
calculates:
offset = address - tls_section_vma + align_up(TCB_SIZE, alignment).

At run time, the TLS section gets copied from _thread_local_start
(in .rodata) to task_thread_local_start. Let’s assume that an address
of a variable in the runtime TLS section is runtime_address.
Access to this address will happen by calculating THREADPTR + offset.
So, by a series of substitutions:

THREADPTR + offset = runtime_address THREADPTR = runtime_address - offset
THREADPTR = runtime_address - (address - tls_section_vma + align_up(TCB_SIZE, alignment)) THREADPTR = (runtime_address - address) + tls_section_vma - align_up(TCB_SIZE, alignment)

The difference between runtime_address and address is same as the
difference between task_thread_local_start and _thread_local_start.
And tls_section_vma is the address of .rodata section, i.e.
_rodata_start. So we arrive to

THREADPTR = task_thread_local_start - _thread_local_start + _rodata_start - align_up(TCB_SIZE, alignment).

The idea with TCB_SIZE being added to the THREADPTR when computing
the relocation was to let the OS save TCB pointer in the TREADPTR
register. The location of the run-time TLS section was assumed to be
immediately after the TCB, aligned to whatever the section alignment
was. However in our case the problem is that the run-time TLS section
is stored not next to the TCB, but at the top of the stack. Plus,
even if it was stored next to the TCB, the size of a FreeRTOS TCB is
not equal to 8 bytes (TCB_SIZE hardcoded in the linker). So we have
to calculate THREADPTR in a slightly obscure way, to compensate for
these differences.

Closes IDF-1239
2020-01-23 11:29:22 +01:00
Angus Gratton d672809080 Merge branch 'refactor/rename_esp32s2beta_to_esp32s2' into 'master'
global: rename esp32s2beta to esp32s2

See merge request espressif/esp-idf!7369
2020-01-23 09:16:30 +08:00
Angus Gratton fbb5844151 Merge branch 'bugfix/esp_timer_stucks_into_esp_timer_impl_set_alarm' into 'master'
esp_timer/esp32: Fix esp_timer_impl_set_alarm() when CPU and APB freqs are changed

Closes WIFI-1576

See merge request espressif/esp-idf!7303
2020-01-23 09:14:53 +08:00
Hrishikesh Dhayagude 91c8f324a9 NimBLE: Use dynamic buffers instead of static memory.
The NimBLE host buffers that consume a significant amount of memory are
now allocated dynamically.
The advantage is that, the memory can be reclaimed in cases where BLE
is turned off and not required for the current boot cycle
2020-01-23 00:55:51 +08:00
morris 405b0e7f06 esp_rom: splict libgcc and libc outof rom.ld bundle file 2020-01-23 00:27:47 +08:00
KonstantinKondrashov 6061d5d65a esp_timer/esp32: Fix case when alarm_reg > counter_reg but FRC_TIMER_INT_STATUS is not set
Closes: WIFI-1576
Closes: https://github.com/espressif/esp-idf/issues/2954
2020-01-22 14:30:34 +08:00
morris e30cd361a8 global: rename esp32s2beta to esp32s2 2020-01-22 12:14:38 +08:00
morris 95743f4ee6 update rtc_sleep_init for esp32s2 2020-01-22 10:19:05 +08:00
Felipe Neves 73592d9bc4 spin_lock: added new spinlock interface and decoupled it from RTOS
spin_lock: cleaned-up port files and removed portmux files

components/soc: decoupled compare and set operations from FreeRTOS

soc/spinlock: filled initial implementation of spinlock refactor

It will decouple the spinlocks into separated components with not depencences of freertos
an similar interface was provided focusing the readabillity and maintenance, also
naming to spinlocks were adopted. On FreeRTOS side the legacy portMUX macros
gained a form of wrapper functions that calls the spinlocks component thus
minimizing the impact on RTOS side.

This feature aims to close IDF-967

soc/spinlock: spinlocks passed on unit test, missing test corner cases

components/compare_set: added better function namings plus minor performance optimization on spinlocks

soc/spinlock: code reordering to remove ISC C90 mix error

freertos/portmacro: gor rid of critical sections multiline macros, placed inline functions instead

soc/spinlock: improved spinlock performance from internal RAM

For cases where the spinlock is executed from IRAM, there is no
need to check where the spinlock object is placed on memory,
removing this checks caused a great improvement on performance.
2020-01-22 06:20:34 +08:00
Ivan Grokhotkov cc3df01f8f rom: add header guards in rom/opi_flash.h, fix error in rom/spi_flash.h 2020-01-21 11:58:10 +01:00
Ivan Grokhotkov 2c3e6481bb Merge branch 'feature/ci_check_cpp_guards' into 'master'
ci: add job to check for C++ guards in header files

Closes IDF-288

See merge request espressif/esp-idf!7050
2020-01-21 17:18:23 +08:00
Ivan Grokhotkov f619a3174b Merge branch 'bugfix/nvs_new_nothrow' into 'master'
NVS: Change all new to new (nothrow)

See merge request espressif/esp-idf!6930
2020-01-21 17:06:19 +08:00
Ivan Grokhotkov c11f77cb1a Merge branch 'feature/use_underlying_cmake_targets_for_idf_py' into 'master'
CMake: Use underlying flash targets for idf.py

See merge request espressif/esp-idf!7067
2020-01-21 17:05:47 +08:00
Jiang Jiang Jian 95f9db79d2 Merge branch 'feature/lwip_netinet_tcp_pr4637' into 'master'
lw_ip: Add netinet compatibility headers (PR 4637)

Closes IDFGH-2551

See merge request espressif/esp-idf!7408
2020-01-21 15:00:03 +08:00
Angus Gratton e0fe136bf9 Merge branch 'bugfix/select_driver_not_installed' into 'master'
VFS: Check in select() if the UART driver is installed or not

Closes IDFGH-2540

See merge request espressif/esp-idf!7331
2020-01-21 11:08:38 +08:00
Angus Gratton 78e219bbe2 Merge branch 'bugfix/eth_int_allocate' into 'master'
PSRAM related fix

Closes IDFGH-2263 and IDFGH-2549

See merge request espressif/esp-idf!7310
2020-01-21 07:31:26 +08:00
Francesco Giancane e48fe540be include/sys/socket.h: ensure SOMAXCONN symbol is defined
SOMAXCONN is expected to be defined in this header, but for the esp32
port is found in net/if.h from newlib.

Avoid the issue by including the net/if.h header in sys/socket.h so that
compatibility is preserved.

Signed-off-by: Francesco Giancane <francesco.giancane@accenture.com>

Merges https://github.com/espressif/esp-idf/pull/4637
2020-01-21 10:11:33 +11:00
Francesco Giancane 64377b54d1 include/netinet/tcp.h: wrap lwip/tcp.h header for compatibility
Some applications (i.e. Azure IoT SDK) are expecting this header to
exist and to contain the tcp constants and description.

The esp32 did not wrap the lwip/tcp.h header, thus this commit adds a
compatibility layer.

Signed-off-by: Francesco Giancane <francesco.giancane@accenture.com>

Merges https://github.com/espressif/esp-idf/pull/4637
2020-01-21 10:11:29 +11:00
Jiang Jiang Jian 10c426e5ef Merge branch 'bugfix/fix_sniffer_bug_caused_by_mode_switch' into 'master'
FIx sniffer bug caused by mode switch

Closes WIFI-466

See merge request espressif/esp-idf!5846
2020-01-20 21:08:31 +08:00
Tian Hao 30fbd99ad0 fix bug sleep may cause HCI timeout
When Host run different cpu and sleep enable, it may cause hci
timeout about 10s.
2020-01-20 17:44:03 +08:00
Tian Hao f351effdb2 fix Kconfig use mistake cause some config not effect
1. Fix bluedroid task pinned_to_core un-effected
2. other minor sdkconfig bugs
2020-01-20 17:43:36 +08:00
xiehang 6cb271c20b esp_wifi: Small refactor for ic_set_vif 2020-01-20 11:47:02 +08:00
Angus Gratton 3f532c8895 Merge branch 'bugfix/esp_tls_blocking_timeout' into 'master'
esp-tls: add timeout for blocking connection

See merge request espressif/esp-idf!7316
2020-01-20 09:35:23 +08:00
Jiang Jiang Jian 1c8937bf14 Merge branch 'feature/esp32_5p0_new_features' into 'master'
esp32 5p0 features support

See merge request espressif/esp-idf!7028
2020-01-19 23:06:45 +08:00
morris cc0459eea2 ethernet: always put eth_driver handle in SRAM
Closes https://github.com/espressif/esp-idf/issues/4635
2020-01-19 16:25:44 +08:00
morris 5ad0bdd8db ethernet: work with cache disabled
add ETH_MAC_FLAG_WORK_WITH_CACHE_DISABLE flag, make ethenret driver
possible to work when cache disabled

Closes https://github.com/espressif/esp-idf/issues/4406
2020-01-19 16:25:24 +08:00
morris 4fb879c11e spi: always put spihost handle in SRAM
Closes https://github.com/espressif/esp-idf/issues/4635
2020-01-19 16:08:53 +08:00
June 19730c81f0 esp32 5p0 new features support 2020-01-17 10:34:54 +00:00
xiehang 0d1a20ba18 esp_wifi:Fix double recycle bar crash issue 2020-01-17 14:28:27 +08:00
Ivan Grokhotkov 0c99aef08d Merge branch 'feature/bringup_723_cmake' into 'master'
bringup 723 cmake

See merge request espressif/esp-idf!6578
2020-01-17 09:20:34 +08:00
Mahavir Jain c7f44a301d Merge branch 'feature/modify_esp_tls_structure' into 'master'
esp-tls: add API to retrieve sockfd for tls connection.

See merge request espressif/esp-idf!7329
2020-01-16 18:12:16 +08:00
Hrudaynath Dhabe 93bc830ac6 esp_wifi: esp_wifi_sta_get_ap_info function returns actual values of group cipher and pairwise cipher 2020-01-16 17:52:59 +08:00
morris 2422c52851 global: hello world on real esp32-s2 2020-01-16 17:43:59 +08:00
duyi 18a05e2ee0 update ld file for esp32-s2 2020-01-16 17:43:59 +08:00
Wangjialin d4e5980823 flash: fix 80Mhz for new spi flash driver on esp32s2 2020-01-16 17:43:59 +08:00
Wangjialin fad639f0d4 feature(psram): update psram initialization.
1. use spi functions in rom
2. remove unnecessary GPIO configurations.
3. remove unnecessary dummy settings.
4. enable dummy out function
5. flash and psram have independent timing setting registers.
6. no need to set 1.9v for LDO in 80Mhz
7. set IO driver ability to 1 by default.
8. no need to use GPIO matrix on esp32s2, IO MUX is recommended
9. enable spi clock mode and IO mode settings
2020-01-16 17:41:31 +08:00
Du Ya Yuan 0ad7602efe make spiram work 2020-01-16 17:41:31 +08:00
duyi 30a525aeb1 update cache config 2020-01-16 17:41:31 +08:00
morris a8d31b0385 rtc: enable super wdt auto feed 2020-01-16 17:41:31 +08:00
morris 1c2cc5430e global: bring up esp32s2(not beta) 2020-01-16 17:41:31 +08:00
duyi 9c5a981ef1 remove unnecessary function in bootloader_support
1. Delete bootloader_clock_get_rated_freq_mhz, esp32s2 do not need it right now
2. Remove bootloader_flash_gpio_config () because it has the same function as bootloader_flash_dummy_config
2020-01-16 17:41:31 +08:00
Angus Gratton eaafe7f599 Merge branch 'feature/add_setting_project_version_from_kconfig' into 'master'
build: Add CONFIG_APP_PROJECT_VER to set the project version from Kconfig

See merge request espressif/esp-idf!7125
2020-01-16 15:54:14 +08:00
David Cermak 98cf3142fa esp_tls: fail connection if esp_tls_conn_new() timeouts 2020-01-16 07:32:19 +00:00
David Cermak aa3b1da384 esp_tls: added connection timeout to esp_tls_conn_new_sync() 2020-01-16 07:32:19 +00:00
Aditya Patwardhan c7418042b4 esp32/esp-tls: provide API to retrieve sockfd value from esp_tls_t 2020-01-16 12:27:44 +05:30