Commit graph

134 commits

Author SHA1 Message Date
chenjianqiang
3349c99882 bugfix(flash): add flash config in app startup
We fixed some flash bugs in bootloader, but for the users used the old
vrsion bootloader, they can not fix these bugs via OTA, the solution is
add these updates in app startup.

These updates include:
1. SPI flash gpio matrix and drive strength configuration
2. SPI flash clock configuration
3. SPI flash read dummy configuration
4. SPI flash cs timing configuration
5. Update flash id of g_rom_flashchip
2019-10-15 12:08:04 +08:00
suda-morris
ef796860d7 bootloader: shrink bin size
1. write a bootloader version of "getting chip revision" function.
2. reduce wordy log.
2019-10-10 12:08:34 +08:00
suda-morris
eb4c8d9991 support esp32 eco revision 2 and 3 2019-09-19 17:05:08 +08:00
Angus Gratton
ec331b3979 flash encryption: Add config option to disable any plaintext reflashes
Enabled by default when Secure Boot is on, so Flash Encryption protection
is always available in case of a Secure Boot bypass.
2019-09-05 18:54:29 +10:00
Jiang Jiang Jian
83e5e6b24c Merge branch 'bugfix/improve_spi_timing_for_flash_v3.2' into 'release/v3.2'
bugfix(flash): improve spi cs timing settings for flash (backport v3.2)

See merge request espressif/esp-idf!5513
2019-07-31 23:39:07 +08:00
Vikram Dattu
e155cd7a78 Add mmu pages available check in non-secure image hash check path.
Made MMU pages available check in `esp_image_format.c`
This now makes it possible to map and process bootoader image as well in chunks when image doesn't fit completely into available free pages.

Signed-off-by: Vikram Dattu <vikram.dattu@espressif.com>
2019-07-19 10:08:39 +05:30
Vikram Dattu
7f42d63687 Bugfix: ota fails with secure boot on for image size greater than 3.2MB
When an OTA image size is larger than 50 MMU pages (approx. 3.2 MB), secure_boot_generate fails while trying to map it into memory:

https://github.com/espressif/esp-idf/blob/master/components/bootloader_support/src/esp32/secure_boot.c#L72
Instead of trying to map the whole image, secure boot code should split the image into chunks and map them one by one, like it is done in esp_image_format.c:

https://github.com/espressif/esp-idf/blob/master/components/bootloader_support/src/esp_image_format.c#L371

Signed-off-by: Vikram Dattu <vikram.dattu@espressif.com>
2019-07-19 09:56:32 +05:30
chenjianqiang
9edc9674bc bugfix(flash): improve spi cs timing settings for flash
cs setup time is recomemded to be 1.5T, and cs hold time is recommended to be 2.5T.
(cs_setup = 1, cs_setup_time = 0; cs_hold = 1, cs_hold_time = 1)
2019-07-15 14:44:28 +08:00
chenjianqiang
490a7e682d bugfix(flash): fix flash read error in DIO/26MHz mode 2019-07-11 21:10:20 +08:00
chenjianqiang
90c7885f4d bugfix(flash): improve flash dio read timing
When flash work in DIO Mode, in order to ensure the fast read mode of flash
is a fixed value, we merged the mode bits into address part, and the fast
read mode value is 0 (the default value).
2019-07-02 14:57:13 +08:00
chenjianqiang
cb2e328c5f feat(psram): config SPI psram pins based on efuse value 2019-06-13 16:07:21 +08:00
Konstantin Kondrashov
b434b8f5d2 esp32: Add reset uart
Fixed the case when the first part of log was missed
this was happened when:
 * CONFIG_CONSOLE_UART_CUSTOM option is selected (UART1)
 * The selected CONSOLE_UART port is used also for the console component
 * in code esp_restart() or abort() functions were called.
2019-06-04 20:16:40 +08:00
Konstantin Kondrashov
cea6908238 bootloader_support: Fix UART RXD pin for console output (CUSTOM option)
The RXD pin is assigned as input (fix for custom uart option).

Closes: https://github.com/espressif/esp-idf/issues/2843

Closes: IDFGH-505
2019-05-20 18:31:13 +08:00
Jiang Jiang Jian
f6837e6117 Merge branch 'bugfix/esp_sha_signing_sha256_v3.2' into 'release/v3.2'
secure boot: Fix esp_sha INT WDT, switch to using mbedTLS API  (backport v3.2)

See merge request idf/esp-idf!4511
2019-04-14 02:57:45 +08:00
Angus Gratton
5bb5670d69 efuse/flash encryption: Reduce FLASH_CRYPT_CNT to a 7 bit efuse field
8th bit is not used by hardware.

As reported https://esp32.com/viewtopic.php?f=2&t=7800&p=40895#p40894
2019-04-12 07:28:57 +00:00
Angus Gratton
5c6be8380e secure boot: Use mbedtls_sha256() not esp_sha()
Latter is probably compiled into most firmwares already, saves some size.

Ref https://github.com/espressif/esp-idf/issues/3127
2019-04-12 05:45:05 +00:00
Ivan Grokhotkov
22dc4898d9 soc: define named constants for DPORT_CPUPERIOD_SEL values 2019-02-28 20:38:31 +08:00
Ivan Grokhotkov
f78c96a3d7 bootloader: check previously used clock frequency at run time
In the situation when bootloader was compiled for 240MHz, and app was
compiled for 160MHz, and the chip is a revision 0 chip, the
bootloader will assume that the application has also been running at
240MHz. This will cause the chip to lock up later. Modify this to use
a run time check of DPORT_CPUPERIOD_SEL, which indicates which of the
PLL frequencies was used.

Closes https://github.com/espressif/esp-idf/issues/2731.
2019-02-28 20:38:31 +08:00
Jiang Jiang Jian
cd6bbaa727 Merge branch 'bugfix/bootloader_map_size_v3.2' into 'release/v3.2'
bootloader: fix incorrect mapping size (backport v3.2)

See merge request idf/esp-idf!4138
2019-01-24 14:09:35 +08:00
Ivan Grokhotkov
b1ee25afde bootloader: account for load address when mapping cache pages
Bootloader used to calculate the number of cache pages assuming that
load address was aligned, while in reality load address for DROM and
IROM was offset by 0x20 bytes from the start of 64kB page. This
caused the bootloader to map one less page if the size of the image
was 0x4..0x1c less than a multiple of 64kB.

Reported in https://esp32.com/viewtopic.php?f=13&t=6952.
2019-01-23 17:02:02 +08:00
Ivan Grokhotkov
cccaa68467 bootloader: fix IROM and DROM swapped in log messages 2019-01-23 17:02:02 +08:00
Ivan Grokhotkov
42b6c4953d bootloader, esp32: add workaround for Tensilica erratum 572
If zero-overhead loop buffer is enabled, under certain rare conditions
when executing a zero-overhead loop, the CPU may attempt to execute an invalid instruction. Work around by disabling the buffer.
2019-01-23 16:23:56 +08:00
Ivan Grokhotkov
73d1b5a7a0 bootloader: verify that loaded image does not overlap bootloader code
Fixes CVE-2018-18558
2018-10-26 12:44:10 +08:00
Renz Bagaporo
cc774111bf cmake: Add support for test build 2018-10-20 12:07:24 +08:00
Ivan Grokhotkov
bd11965f6c Merge branch 'bugfix/ndebug_build' into 'master'
soc,sdmmc: fix build failures when NDEBUG is used

See merge request idf/esp-idf!3352
2018-10-19 11:55:37 +08:00
Angus Gratton
f53fef9936 Secure Boot & Flash encryption: Support 3/4 Coding Scheme
Includes esptool update to v2.6-beta1
2018-10-16 16:24:10 +11:00
Ivan Grokhotkov
a1f809fcc5 bootloader: provide implementation of abort
ROM definition of `abort` was removed in 9240bbb. The old definition
resulted in a panic due to a jump to a null pointer (abort member in
ROM stub table was zero). The new definition triggers a debug
exception if JTAG is connected, or goes into an infinite loop to be
reset by the WDT.
2018-10-15 15:02:56 +08:00
Angus Gratton
1b272bb77e Merge branch 'bugfix/rom_export_functions' into 'master'
esp32, bootloader: fix issues related to linking order

See merge request idf/esp-idf!3375
2018-10-05 12:40:05 +08:00
Angus Gratton
326d791ebb bootloader: Fix secure boot digest generation for image length where (len%128 < 32) 2018-10-02 15:17:14 +10:00
Ivan Grokhotkov
f694d057be bootloader_support: exclude bootloader_init.c when building app
Depending on link order of libraries, bootloader implementation of
__assert_func could be linked instead of the one provided by newlib.
2018-10-02 01:20:04 +00:00
Angus Gratton
98b42a8b71 Merge branch 'bugfix/disable_coding_scheme_security_features' into 'master'
bootloader: Don't enable secure boot or flash encryption for 3/4 Coding Scheme

See merge request idf/esp-idf!3369
2018-10-02 07:54:11 +08:00
Ivan Grokhotkov
22b840f3df bootloader: don’t reload RTC_FAST DRAM after deep sleep
When CONFIG_ESP32_RTCDATA_IN_FAST_MEM is enabled, RTC data is placed
into RTC_FAST memory region, viewed from the data bus. However the
bootloader was missing a check that this region should not be
overwritten after deep sleep, which caused .rtc.bss segment to loose
its contents after wakeup.
2018-09-29 14:02:16 +08:00
Angus Gratton
ff33406e74 bootloader: Don't enable secure boot or flash encryption for 3/4 Coding Scheme 2018-09-26 18:26:06 +10:00
Sagar Bijwe
48fccbf5dd nvs_flash: Add support for nvs encryption 2018-09-24 11:25:21 +05:30
Renz Christian Bagaporo
d9939cedd9 cmake: make main a component again 2018-09-11 09:44:12 +08:00
Angus Gratton
b355854d4d Merge branch 'master' into feature/cmake 2018-09-05 10:35:04 +08:00
Angus Gratton
2ec0fd8fd6 Merge branch 'feature/signature_verify_updates' into 'master'
secure boot: Support signed app verification without hardware secure boot

See merge request idf/esp-idf!2814
2018-09-04 18:56:47 +08:00
Angus Gratton
e54f3d9616 Merge branch 'bugfix/bootloader_random_in_app' into 'master'
esp32: Allow bootloader_random.h use in app, add esp_fill_random() function

See merge request idf/esp-idf!3124
2018-09-04 10:39:12 +08:00
Konstantin Kondrashov
9c715d7946 bootloader_support: Fix enable rtc_wdt for resolve issue with varying supply
Eliminates the issue with the lock up in the bootloader due to a power drawdown during its operation.

Closes https://github.com/espressif/esp-idf/issues/1814
2018-09-03 05:43:01 +00:00
Angus Gratton
83a179abb0 esp32: Add esp_fill_random() function
Convenience function to fill a buffer with random bytes.

Add some unit tests (only sanity checks, really.)
2018-09-03 04:39:45 +00:00
Angus Gratton
767ec27350 bootloader_support: Move bootloader_random.h to public header directory 2018-09-03 04:39:45 +00:00
Angus Gratton
a9c4ed7139 Merge branch 'master' into feature/cmake 2018-08-30 18:51:01 +08:00
Mahavir Jain
62746e414e bootloader: add API for erasing flash region
Signed-off-by: Mahavir Jain <mahavir@espressif.com>
2018-08-29 12:04:32 +00:00
Angus Gratton
b364f23e17 secure boot: Support secure boot signatures without hardware secure boot
Allows OTA updates to be secured via signature checks, without requiring the overhead or complexity
of a full secure boot implementation.

Uses same signing mechanisms (build system and/or espsecure.py as Secure Boot).

Requires:
* [ ] More testing
* [ ] Documentation
2018-08-29 17:05:29 +08:00
Ivan Grokhotkov
90f5456dba Merge branch 'feature/rtc_cpu_freq_config' into 'master'
soc/rtc: Refactoring, support CPU frequencies lower than XTAL

See merge request idf/esp-idf!2856
2018-08-22 11:32:08 +08:00
Ivan Grokhotkov
c722cf3e06 bootloader: use new CPU frequency setting API 2018-08-21 13:02:46 +08:00
Jiang Jiang Jian
98eaa5c2ec Merge branch 'docs/security' into 'master'
docs: Added more wordings to capture secure boot and flash encryption dependency.

See merge request idf/esp-idf!2947
2018-08-16 19:31:36 +08:00
Angus Gratton
ff2404a272 Merge branch 'master' into feature/cmake 2018-08-16 17:14:17 +10:00
Konstantin Kondrashov
a8e46775c6 soc/rtc_wdt: Add API functions for rtc_wdt
Added functions:
rtc_wdt_protect_off/on
rtc_wdt_set_length_of_reset_signal
rtc_wdt_set_stage
rtc_wdt_set_time
rtc_wdt_feed
rtc_wdt_disable/enable
2018-08-14 17:48:02 +05:00
Sagar Bijwe
b27773e87c docs: Added more wordings to capture secure boot and flash encryption dependency. 2018-08-14 11:27:29 +05:30