Commit graph

34 commits

Author SHA1 Message Date
Ivan Grokhotkov e4616588b7 spi master: lock APB frequency while in transaction 2017-10-18 14:19:21 +08:00
Gabriel Carstoiu 8128bb95ef fix(spi_slave): enable DMA clock when initialization.
merging in the code updates to the SPI master code done in commit b834fcf78a.

TW#15670, Closes #1027
2017-10-17 12:20:40 +08:00
michael 074f36afff fix(spi_master): fix the heap corruption bug that RX DMA writes over the temporary buffer boundary.
TW#15434

Closes #994.
2017-09-19 16:47:14 +08:00
michael b834fcf78a fix(spi_master): this fix the SPI MOSI output missing bug. 2017-09-04 22:43:51 +08:00
Ivan Grokhotkov 3161854efb Merge branch 'bugfix/spi_hd_rx' into 'master'
fix(spi_dma_rx): add check to avoid using SPI half-duplex mode DMA with both MOSI and MISO phases.

See merge request !1111
2017-08-28 17:36:58 +08:00
Ivan Grokhotkov b636f81619 Merge branch 'bugfix/spi_command' into 'master'
fix(spi_master): fix the command field to make it more intuitive to use.

See merge request !1119
2017-08-28 10:29:56 +08:00
michael 0cb14f1648 fix(spi_dma_rx): add check to avoid using SPI half-duplex mode DMA with both MOSI and MISO phases. 2017-08-26 02:15:30 +08:00
michael 4c9754726f fix(spi_master): fix the command field to make it more intuitive to use. 2017-08-21 20:37:57 +08:00
michael a01db5569c fix(spi_dma): fix the receive error with RX DMA start with non-aligned address. 2017-08-18 10:14:49 +08:00
Ivan Grokhotkov 159a2d01d1 Merge branch 'bugfix/spi_dma' into 'master'
bugfix(spi_master): fix several issues when using RX DMA

See merge request !1006
2017-08-16 18:55:25 +08:00
michael ed1d084aea fix(spi_master): make the address field more intuitive to use.
The address field should be placed at the highest bits of address and slv_wr_status registers. Instead of breaking the address into two parts and fill in each register, move the address to the highest bits and write to the registers respectively.

Breaking change: if you fill-in the SPI address filed in a previous version in some way and it works correctly, you still have to rewrite the address, in a more intuitive way.
2017-08-15 14:49:31 +08:00
michael 366e4397e9 fix(spi_dma_rx): fixed the invalid argument issue in full-duplex mode.
force rxlength=length and mosi=1 and inlink.start=1 on in full-duplex mode.
set rxlength > length is forbidden in full-duplex mode.

TW#12609, TW#14240, https://www.esp32.com/viewtopic.php?f=13&t=2519
2017-08-14 17:25:30 +08:00
michael 227b011f6a fix(spi_master): fix SPI master, now able to transfer more than 32 bytes in non-DMA-accessable area.
apply for internal space to hold these data.
use DMA when it's enabled, no matter long or short.

TW#12226, github#551
2017-08-14 17:19:57 +08:00
Angus Gratton 8d7074ed5c soc: Move esp_ptr_dma_capable() function to soc_memory_layout.h 2017-07-10 17:46:03 +08:00
Angus Gratton 71c70cb15c heap: Refactor heap regions/capabilities out of FreeRTOS
Remove tagged heap API, rename caps_xxx to heap_caps_xxx

Also includes additional heap_caps_xxx inspection functions.
2017-07-10 17:46:03 +08:00
Jeroen Domburg 8af3fe4e84 Warn against and check for non-DMA-capable pointers being passed to SPI when DMA is used 2017-05-05 12:28:03 +08:00
devsaurus 530c3ca05c components/driver/spi_master: free dma descriptors
Signed-off-by: Jeroen Domburg <jeroen@espressif.com>
2017-05-05 11:13:42 +08:00
Jeroen Domburg bf0c32364a SPI: Also check SPI_TRANS_USE_[T|R]XDATA when decifding to turn on MOSI/MISO. Fixes https://github.com/espressif/esp-idf/issues/488 2017-04-27 11:49:04 +08:00
Jeroen Domburg 881a90b8ab SPI: SPI master clock calculation: n has a minimum of 2 to allow for both a low and a high cycle. Fixes https://github.com/espressif/esp-idf/issues/491 2017-04-27 11:49:04 +08:00
Jeroen Domburg 4c06dca15c SPI: Small fixes according to MR comments 2017-04-27 11:49:04 +08:00
Jeroen Domburg e9c372bc2d SPI: Split common SPI stuff out of master driver; add slave driver; add workaround for DMA issue. 2017-04-27 11:49:04 +08:00
Angus Gratton fd3ef4cdfe Merge branch 'bugfix/github_fixes' into 'master'
Various fixes from Github

Some one-line fixes from Github PRs.

See merge request !689
2017-04-21 12:27:32 +08:00
Michael Kellner eeb0aaa09e spidriver: Display length errors correctly
SPI transfer length is bits, not bytes, so the error should indicate bits. Also, there are separate lengths for rx and
tx (confusingly named rxlength and length... if rxlength is 0, length is used). The code checks the tx length for the
rx, so it never validates rxlength.

Originally contributed as part of #511 https://github.com/espressif/esp-idf/pull/511
2017-04-21 11:03:07 +10:00
Michel Pollet 349a77cb55 components/driver: 'const' all config calls.
Some were, some weren't. They all could/should be.

Signed-off-by: Michel Pollet <buserror@gmail.com>
2017-04-13 18:33:33 +01:00
Jeroen Domburg 76295c7a13 Fix timing adjustment needed for higher speeds of SPI master bus. 2017-03-28 11:31:59 +08:00
Jeroen Domburg e35ebbf813 Use THRESH_DMA_TRANS define everywhere, make code match "smaller or equal" description 2017-02-21 18:27:56 +08:00
Lourens Naudé 04f7d96623 Fix SPI read edges in spi_intr
Signed-off-by: Jeroen Domburg <jeroen@espressif.com>
2017-02-21 18:26:03 +08:00
Dermot Duffy 33500f2561 Add missing variable initialisation.
Signed-off-by: Jeroen Domburg <jeroen@espressif.com>
2017-01-25 21:41:45 +08:00
Jeroen Domburg 356e01545c Add test for spi clock, fix corner cases) 2017-01-11 16:13:33 +08:00
Jeroen Domburg daa2b7cbc9 n, h and l actually are 6-bit; they go from 1 to 64. 2017-01-11 14:13:37 +08:00
Jeroen Domburg a98d07d650 Fix clock divider calculation 2017-01-11 13:01:48 +08:00
Jeroen Domburg ee59fa75f4 Rename SPI Master IO pins to more common terminology, add better explanation to queue_length initialization value 2017-01-11 11:25:56 +08:00
Jeroen Domburg 5eb8eb3855 SPI master: rename transaction flags from SPI_* to SPI_TRANS_*, like the documentation says. Also add some explanation about the SPI signals in the documentation 2017-01-10 14:41:12 +08:00
Jeroen Domburg 23455de4c2 Add SPI Master driver, example, test and docs 2017-01-06 14:20:32 +08:00