Angus Gratton
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b6a2329f0f
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FreeRTOS: esp_crosscore_int_send_yield() should be in IRAM
Possible for xQueueGenericSendFromISR -> xTaskRemoveFromEventQueueList
-> taskYIELD_OTHER_CORE code path to occur while cache is off.
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2017-01-26 18:53:02 +11:00 |
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Ivan Grokhotkov
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a2e0c2432e
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esp32: sanity check ISR handler address passed into esp_intr_alloc
Return ESP_ERR_INVALID_ARG if the handler is not in IRAM (or RTC fast memory)
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2017-01-11 11:38:17 +08:00 |
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Ivan Grokhotkov
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833102cbf3
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esp32: place cross-core interrupt handler into IRAM
esp_intr_alloc is called with ESP_INTR_FLAG_IRAM, so the ISR should be in IRAM.
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2017-01-11 00:52:45 +08:00 |
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Jeroen Domburg
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655fd2986a
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Add interrupt allocation scheme / interrupt sharing. Also modifies drivers and examples. Also allows interrupts
to be marked specifically as having a handler that's all in IRAM.
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2016-12-08 12:39:33 +08:00 |
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Jeroen Domburg
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86d8f63005
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Per-CPU interrupt handlers and args
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2016-11-10 17:59:46 +08:00 |
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Jeroen Domburg
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90b787636a
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Remove redundant volatile keyword
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2016-10-31 11:00:27 +08:00 |
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Jeroen Domburg
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68f39c1ed9
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Only init crosscore when FreeRTOS runs in multicore mode, add warnings that cross_int calls are private.
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2016-10-27 16:50:28 +08:00 |
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Jeroen Domburg
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3371083c16
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Add checks for tasks woken up on other CPUs where needed, make xYieldPending and xPendingReadyList per-processor, add configurable ISR stack size to Kconfig, in general fix the entire wake-up-task-on-other-cpu-by-interrupt implementation
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2016-10-27 16:07:47 +08:00 |
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Jeroen Domburg
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c6477ff10d
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Fix int clear, actually call int init code
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2016-10-27 12:37:19 +08:00 |
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Jeroen Domburg
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d3d9a8bc28
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Most code written. Interrupts still do not fire yet.
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2016-10-26 21:09:55 +08:00 |
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