jack
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c384fa2492
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rename clock enable and reset bits for SPI modules
1.The names of clock enable and reset bits do not match with TRM, just rename them.
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2018-05-14 16:45:03 +08:00 |
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Ivan Grokhotkov
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90bbcbcdc0
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unit tests: fix warnings, build with -Werror
- libsodium: silence warnings
- unit tests: fix warnings
- spiram: fix warnings
- ringbuf test: enable by default, reduce delays
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2017-10-19 21:35:23 +08:00 |
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michael
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c82e51cf79
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fix(intr): always assign the same intr to a same source, disable the source only when all the handlers disabled.
also document handlers sharing a same source.
TW#13454, https://github.com/nodemcu/nodemcu-firmware/issues/1874
Breaking change: handles assigned to a same source should have the same flag now.
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2017-09-06 15:20:01 +08:00 |
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Ivan Grokhotkov
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a2e0c2432e
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esp32: sanity check ISR handler address passed into esp_intr_alloc
Return ESP_ERR_INVALID_ARG if the handler is not in IRAM (or RTC fast memory)
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2017-01-11 11:38:17 +08:00 |
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Angus Gratton
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06e03ff52e
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Replace backwards-compatible portTICK_RATE_MS with FreeRTOS v8+ portTICK_PERIOD_MS
Closes github #51 https://github.com/espressif/esp-idf/issues/51
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2016-12-28 10:23:13 +11:00 |
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Jeroen Domburg
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2c34ab3374
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Mark some interrupts that are now allocated dynamically as free, add int handle param documentation, add local ints test
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2016-12-08 12:39:33 +08:00 |
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Jeroen Domburg
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9dc908d105
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Add test for local interrupts, fix int disable code
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2016-12-08 12:39:33 +08:00 |
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Jeroen Domburg
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ae8c37e0b6
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Add disabling/enabling of shared interrupt, add testcase for interrupts
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2016-12-08 12:39:33 +08:00 |
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