Commit graph

167 commits

Author SHA1 Message Date
Konstantin Kondrashov
a8e46775c6 soc/rtc_wdt: Add API functions for rtc_wdt
Added functions:
rtc_wdt_protect_off/on
rtc_wdt_set_length_of_reset_signal
rtc_wdt_set_stage
rtc_wdt_set_time
rtc_wdt_feed
rtc_wdt_disable/enable
2018-08-14 17:48:02 +05:00
Ivan Grokhotkov
8739111218 Merge branch 'bugfix/gpio_reset_bitmask' into 'master'
gpio: Bitmask overflow fix in gpio_reset_pin

See merge request idf/esp-idf!2966
2018-08-10 17:35:26 +08:00
Taavi Hein
f7749e18a8 gpio: Bitmask overflow fix in gpio_reset_pin
For pins 32 and up the BIT(nr) macro used here overflowed,
causing undetermined GPIO pins to be reset.
Example: freeing SPI device/bus where CS is on pin 33
caused debug UART to cease communication, TXD0 was
disabled.

Fixed as BIT64(nr) macro, to be used elsewhere as needed.
For example in definitions like GPIO_SEL_32..GPIO_SEL_39.
2018-08-08 15:31:17 +03:00
Angus Gratton
a5ae5ac4b3 soc: Allow components to reserve fixed memory ranges that they need
No longer necessary to keep all reserved addresses in 'soc'.

Means 'soc' does not need to know about 'bt', for example.

Also means that Bluetooth can be enabled in config without any memory being reserved for BT
controller. Only if code calling the BT controller is linked in, will this memory be reserved...
2018-08-06 01:37:55 +00:00
David Cermak
409c91bcb9 removed possible uint16 access to 32bit register, noted fifo use not recommended 2018-07-23 07:57:18 +02:00
Ivan Grokhotkov
fec079cd44 Merge branch 'bugfix/rtc_io_hold_regs' into 'master'
Fix errors in rtc_gpio_desc values

See merge request idf/esp-idf!2765
2018-07-19 15:04:42 +08:00
Ivan Grokhotkov
5376a06d7b Merge branch 'bugfix/range_CONFIG_ESP32_RTC_CLK_CAL_CYCLES' into 'master'
soc/clk: Fix range CONFIG_ESP32_RTC_CLK_CAL_CYCLES

See merge request idf/esp-idf!2719
2018-07-17 19:43:11 +08:00
negativekelvin
8a9e3875ed
Fix errors in rtc_gpio_desc values 2018-07-12 23:16:15 -07:00
Angus Gratton
a67d5d89e0 Replace all DOS line endings with Unix
Command run was:
git ls-tree -r HEAD --name-only | xargs dos2unix
2018-07-12 19:10:37 +08:00
Konstantin Kondrashov
ac3508615a soc/clk: Fix range CONFIG_ESP32_RTC_CLK_CAL_CYCLES
Fixed the error division on zero.
Also fixed range CONFIG_ESP32_RTC_CLK_CAL_CYCLES in Kconfig.
Fixed a overflow error by TIMG in the function rtc_clk_cal_internal. This error was due to a limit in values TIMG_RTC_CALI_MAX=0x7FFF (to write the slowclk_cycles) and TIMG_RTC_CALI_VALUE=0x1FFFFFF (to read xtal_cycles). Added assert finctions.

Closes https://github.com/espressif/esp-idf/issues/2147
2018-07-10 11:56:12 +05:00
Darian Leung
1d2727f4c8 CAN Driver
The following commit contains the first version of the ESP32 CAN Driver.

closes #544
2018-07-04 14:01:57 +08:00
Konstantin Kondrashov
32da455384 soc: Fix check_long_hold_gpio and move def to soc
Fix factory_reset_pin init as input
Move definition a structure rtc_gpio_desc to soc

Closes https://github.com/espressif/esp-idf/issues/2030
2018-06-22 09:20:27 +05:00
Ivan Grokhotkov
4b91c82cc4 Merge branch 'feat/sdio_pullup' into 'master'
feature(sdio): add features to make SDIO slave compatible with more devkits

See merge request idf/esp-idf!2454
2018-06-20 13:58:56 +08:00
michael
5b37a96ddc feature(sdio): allow to enable internal pullups of the SDIO host and slave as a debug feature
NOTE: the internal pullups are not totally reliable, please do add external pullups on your bus.
2018-06-14 12:04:22 +08:00
Michael (XIAO Xufeng)
ebfda40b7c refactor(spi): move pin information into soc folder 2018-06-14 11:29:15 +08:00
Michael (XIAO Xufeng)
939e5693a5 chore(spi): fix the terms of native to iomux 2018-06-06 06:08:39 +00:00
michael
5cf7d3768d feat(spi_master): fine tune the timing of SPI 2018-06-06 06:08:39 +00:00
Angus Gratton
3e1a93e5a7 soc: rtc_vddsdio_get_config() In default configuration, VDD_SDIO LDO is always enabled
When using bootstrapping pin to enable VDD_SDIO, the internal LDO is always enabled at either 1.8V
or 3.3V.
2018-05-25 15:14:13 +10:00
Angus Gratton
d775cc4c4c soc: Fix description of rtc_config_t.tieh, add macros
Usage of TIEH was correct but description had 1.8V & 3.3V backwards.

Add macro definitions for TIEH values to improve readability.
2018-05-25 14:58:37 +10:00
Angus Gratton
b8312a26c0 Merge branch 'feature/sdio_slave' into 'master'
feature(sdio_slave): add support for sdio_slave

See merge request idf/esp-idf!1829
2018-05-22 09:43:35 +08:00
Konstantin Kondrashov
e5b280f173 dport: Bigfix dport_read code move to IRAM
A new method of workaround an error with DPORT is to ensure that the APB is read and followed by the DPORT register without interruptions and pauses. This fix places this implementation in the IRAM to exclude errors associated with the cache miss.
2018-05-21 22:00:51 +05:00
Michael (XIAO Xufeng)
c73575de4f feat(sdio_slave): add headers for sdio slave components: slc, host, hinf 2018-05-21 23:48:33 +08:00
wangmengyang
22e21b38f7 component/bt: implement bluetooth modem sleep mode, one mode for BLE only and another for dual mode bluetooth
1. provide options for bluetooth low power mode
2. provide two options for bluetooth low power clock: main XTAL and external 32kHz XTAL
3. provide function and callbacks to control bluetooth low power mode, including enable/disable sleep, software wakeup request, low power clock settings, check power state, etc
4. modify vhci API vhci_host_send_packet to use blocking mode
5. note that DFS and bluetooth modem sleep can not be used together currently.
2018-05-19 15:37:26 +08:00
Angus Gratton
7ae1e9463e Merge branch 'bugfix/rtc_xtal_tests' into 'master'
ci: Only run XTAL unit tests assuming board has an XTAL

See merge request idf/esp-idf!2401
2018-05-15 18:44:46 +08:00
Angus Gratton
05e09a5bac ci: Only run XTAL unit tests assuming board has an XTAL, run less repeats 2018-05-15 15:43:24 +08:00
Angus Gratton
d1066e9d7f Merge branch 'feature/dport_access' into 'master'
soc: Dport access with pre-read register APB

See merge request idf/esp-idf!2257
2018-05-15 15:32:28 +08:00
Angus Gratton
662fe55996 Merge branch 'bugfix/select_rtc_slow_clk' into 'master'
esp32/clk: Fix starting rtc oscillator if it bad

See merge request idf/esp-idf!2215
2018-05-15 12:57:22 +08:00
Konstantin Kondrashov
9ad0760b9d esp32/clk:Fix starting rtc oscillator if it is bad
If the RTC crystal is bad or has no matched capacitance, then you do not need to start such the crystal. It is necessary to determine this case, output an error (about impossibility to start from the oscillator) and start from the internal RC of the chain.

Reduced the default value of the number of bootstrap cycles. Because we can oscillating the oscillator which then stops. (in Kconfig). Changed from 100 to 5.

The number of calibration cycles has been increased. It is the main criterion for estimating the launch of an oscillator. A large increase leads to an increase in the load time, as well as the stability of recognition of this case. (in Kconfig).
Changed from 1024 to 3000.
2018-05-15 08:59:15 +05:00
Konstantin Kondrashov
8f80cc733d soc: Change DPORT access
When two CPUs read the area of the DPORT and the area of the APB, the result is corrupted for the CPU that read the APB area.
And another CPU has valid data.

The method of eliminating this error.
Before reading the registers of the DPORT, make a preliminary reading of the APB register.
In this case, the joint access of the two CPUs to the registers of the APB and the DPORT is successful.
2018-05-14 17:54:57 +05:00
jack
c384fa2492 rename clock enable and reset bits for SPI modules
1.The names of clock enable and reset bits do not match with TRM, just rename them.
2018-05-14 16:45:03 +08:00
Jiang Jiang Jian
db90f49758 Merge branch 'bugfix/update_emac_h' into 'master'
update emac_reg_v2.h

See merge request idf/esp-idf!2050
2018-05-07 16:16:52 +08:00
Ivan Grokhotkov
94250e42a0 sleep: optimize light sleep wakeup latency 2018-04-26 19:36:47 +08:00
Ivan Grokhotkov
ac623a9756 soc/rtc: restore dbg attenuation when waking from sleep
This fixes inability to enter deep sleep after waking up from light sleep
2018-04-26 18:52:46 +08:00
Ivan Grokhotkov
d38b22b11b soc/rtc, sleep: don’t lower the bias for wakeup state
This fixes watchdog resets occurring during wakeup from light sleep.
2018-04-26 18:52:45 +08:00
Ivan Grokhotkov
b0a91630fb soc/rtc: allow main XTAL to be powered on in sleep 2018-04-26 18:52:45 +08:00
Ivan Grokhotkov
3c78faa0a9 soc/rtc: don’t switch frequency in rtc_sleep_init 2018-04-26 18:52:45 +08:00
shangke
5fc130f2c0 update emac_reg_v2.h 2018-04-25 14:54:09 +08:00
Ivan Grokhotkov
52f9a5ca16 Merge branch 'bugfix/sdspi_wp_cd_pins' into 'master'
sdmmc, sdspi: fix handling of CD and WP

See merge request idf/esp-idf!2285
2018-04-24 20:53:47 +08:00
Ivan Grokhotkov
85ab4fc83e sdmmc host: add handling of CD and WP pins
Previous version of the code only connected CD and WP to the
peripheral, in fact the hardware does not use the values of these
signals automatically. This adds code to read CD and WP values when
command is executed and return errors if card is not present, or
write command is executed when WP signal is active.
2018-04-24 19:08:44 +08:00
Ivan Grokhotkov
9c7207ed3c Merge branch 'bugfix/soc_clk_out_fields' into 'master'
soc/io_mux: make CLK_OUT fields compatible with REG_SET/GET_FIELD

See merge request idf/esp-idf!2133
2018-04-13 19:42:20 +08:00
Ivan Grokhotkov
ee600784c5 sdmmc: add SDIO support
- Add SDIO support at protocol layer (probing, data transfer, interrupts)
- Add SDIO interrupts support in SDMMC host
- Add test (communicate with ESP32 in SDIO download mode)
2018-04-11 11:07:13 +08:00
Ivan Grokhotkov
2522c1b2f9 Merge branch 'bugfix/rtc_clk_fixes' into 'master'
Power management and RTC fixes

See merge request idf/esp-idf!2131
2018-04-10 18:17:02 +08:00
Angus Gratton
53234ef2bc Merge branch 'refactor/rtc_split_module' into 'master'
bugfix(rtc): make sure peripherals (DAC, HALL) are turned off before conversion.

See merge request idf/esp-idf!1848
2018-04-04 09:00:58 +08:00
Angus Gratton
da27816314 Merge branch 'feat/add_efuse_cpu_freq_rating' into 'master'
efuse/add cpu freq rating

See merge request idf/esp-idf!1994
2018-03-29 05:59:52 +08:00
Michael (Xiao Xufeng)
cef8baf424 bugfix(rtc): make sure peripherals (DAC, HALL) are turned off before conversion.
refactor structure of ``rtc_module.c`` to make it more clearly.

Closes https://github.com/espressif/esp-idf/issues/1517
2018-03-28 17:10:01 +08:00
Ivan Grokhotkov
b007b89b84 soc/io_mux: make CLK_OUT fields compatible with REG_SET/GET_FIELD 2018-03-27 12:10:18 +08:00
Ivan Grokhotkov
43b5fdd5c9 soc/rtc: fix switching between 80/160 and 240MHz
Previous code contained a check for PLL frequency to be 240MHz, while
in fact 240MHz was a CPU frequency; corresponding PLL frequency is
480MHz. Fixed the comparison and replaced integer MHz values with an
enum.
2018-03-27 10:55:59 +08:00
Ivan Grokhotkov
48d55e22e7 soc/rtc: run 32k XTAL startup test only in PSRAM config
PSRAM tests run on ESP-WROVER-KIT boards, which have the 32k XTAL
installed.
2018-03-26 10:14:13 +08:00
Ivan Grokhotkov
887b6e2925 Merge branch 'bugfix/rtc_clk_32k_bootstrap' into 'master'
bugfix/rtc_clk_32k_bootstrap: Fix starting 32k RTC

See merge request idf/esp-idf!2085
2018-03-21 18:38:49 +08:00
Konstantin Kondrashov
f7df532ec0 bugfix/rtc_clk_32k_bootstrap: Fix starting 32k RTC
1. External 32kHz crystal is started for too long or it may not start at all. It is often observed at the first start.
2. At the first start, it is possible that the crystal did not start. And the recorded period was recorded as 0. Which led to a division error by zero during the transition to the deep sleep mode (Maybe somewhere else).
3. Added a unit test to test a new method of oscillation an external crystal.
4. Added a new method of oscillating of an external crystal. The legs of the crystal are fed with a 32 kHz frequency.

The new method eliminates these errors.

Added unit test: `\esp-idf\components\soc\esp32\test\test_rtc_clk.c`: `make TEST_COMPONENTS=soc`
- 8 Test starting external RTC crystal. Will pass.

`Bootstrap cycles for external 32kHz crystal` - is specified in the file Kconfig by default 100.

QA tested a new method of oscillation the crystal on 25 boards. The supply of square waves on the crystal showed a 100% result in contrast to the previous method of launching the crystal. After the tests, the old method was deleted.

Closes TW19143
2018-03-21 13:27:56 +05:00