This seems to clean up some of the more wrong addr2line output results (not
sure why, something to do with optimisations I think - perhaps the return
address may also be a jump target from some earlier line of the code.)
Previously, this resulted in task stack frames turning up incorrectly in the backtrace, ie
Backtrace: 0x400d22a0:0x3ffb0fa0 0x40085a3c:0x3ffb0fc0 0x400f32c4:0x3ffb0fe0 0x40081965:0x3ffb1010
0x400d22a0: esp_vApplicationIdleHook at /home/esp/esp-idf/components/esp32/./freertos_hooks.c:
52
0x40085a3c: prvIdleTask at /home/esp/esp-idf/components/freertos/./tasks.c:4431
0x400f32c4: i2c_isr_handler_default at /home/esp/esp-idf/components/driver/./i2c.c:598
0x40081965: _xt_lowint1 at xtensa_vectors.o:?
Fix is to implement abort() via an unhandled exception rather than a breakpoint, I think
because of relative priority of exception types.
Another approach would be to assign a software-only INUM to abort()ing and defined a
PANIC_RSN_ABORTED, but this is more complex and interrupt numbers are more scarce than RAM!
When ‘reset halt’ command is executed, OpenOCD will take the APP CPU
out of reset and enable the clock. At this point, user can set a
breakpoint on code which will run on APP CPU. Previously, app startup
code would do another reset of APP CPU, thereby removing any breakpoints
which may have been set. This change makes APP CPU reset conditional on
DPORT_APPCPU_CLKGATE_EN bit, which is 0 by default but is set to 1 by
OpenOCD after reset.
To increase the chances that the examples work out of the box, this
change is raising the default deep sleep wakeup delay to 1ms.
If GPIO15 is low at startup, ROM code takes less time to execute
(because no logging is performed), so more time may be needed to allow
flash chip to become ready.
Fix Dport access in interrupts
Dport accesses would re-enable interrupts unconditionally, breaking things when called in an ISR. This saves and restores the interrupt status, fixing this.
This fixes a crash in the SPI slave driver, and possibly other things.
See merge request !772
1. Name change from chopper to carrier, block diagram update, minor changes to example codes
2. mcpwm_reg.h changed, brought uniformity in comments, worked on suggestions, duty to accept float. Some name changes!
3. Minor readme changes and Indetation
4. Minor change: move mcpwm_reg.h and mcpwm_struct.h to new path
5. Minor change: addition of BLDC example code and Readme
6. Name changed from epwm to mcpwm
7. Improve the reg name in mcpwm_struct.h
8. Name change chopper>carrier, deadband>deadtime
1. Enlarge wifi task stack size by 512Bytes to fix potential stack overflow issue
2. Modify wifi hmac tx queue size from 12 to 32 because we already limit the buffer number in ebuf
management module
add API to get chip info
This change adds an API to get chip info, such as chip model, enabled capabilities, size of embedded flash, silicon revision.
Hello_world example is modified to print out the information about the chip. The example is also simplified by moving all code into the main task.
Ref TW12031.
See merge request !549
esp32: update wifi lib for some bugfix
1. Fix wifi ebuf free twice issue
2. Fix wifi internal assert issue
3. Fix a bug in esp_wifi_stop
4. Fix wifi crash issue
5. Fix wifi run out of memory when 10 udp connection stability test
See merge request !745
Optimize configuration of base MAC address
Application developer can call APIs to configure base MAC address
instead of using menuconfig.
See merge request !744
component/esp32 : fix dualcore bug
1. When dual core cpu run access DPORT register, must do protection.
2. If access DPORT register, must use DPORT_REG_READ/DPORT_REG_WRITE and DPORT_XXX register operation macro.
See merge request !742
