Merge branch 'fix/spi_slave_free_cs_v3.0' into 'release/v3.0'
spi_slave: fix the issue rx dma get broken by master unexpected transaction (backport v3.0) See merge request idf/esp-idf!3293
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commit
fcf9c3d882
3 changed files with 67 additions and 17 deletions
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@ -180,6 +180,26 @@ void spicommon_setup_dma_desc_links(lldesc_t *dmadesc, int len, const uint8_t *d
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*/
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spi_dev_t *spicommon_hw_for_host(spi_host_device_t host);
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/** Temporarily connect CS signal input to high to avoid slave detecting unexpected transactions.
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*
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* @note Don't use this in the application.
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*
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* @param host The spi host.
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*/
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void spicommon_freeze_cs(spi_host_device_t host);
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/** Use this function instead of cs_initial to avoid overwrite the output config
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* This is used in test by internal gpio matrix connections
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*
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* @note Don't use this in the application.
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*
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* @param host The spi host.
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* @param cs_io_num GPIO number of the CS pin.
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* @param iomux The peripheral is using iomux pins.
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*/
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void spicommon_restore_cs(spi_host_device_t host, int cs_io_num, bool iomux);
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/**
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* @brief Get the IRQ source for a specific SPI host
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*
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@ -371,6 +371,26 @@ void IRAM_ATTR spicommon_setup_dma_desc_links(lldesc_t *dmadesc, int len, const
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dmadesc[n - 1].qe.stqe_next = NULL;
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}
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void spicommon_freeze_cs(spi_host_device_t host)
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{
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gpio_matrix_in(0x38, io_signal[host].spics_in, false);
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}
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static void IOMUX_IN(uint32_t gpio, uint32_t signal_idx)
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{
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GPIO.func_in_sel_cfg[signal_idx].sig_in_sel = 0;
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PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[gpio]);
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}
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void spicommon_restore_cs(spi_host_device_t host, int cs_io_num, bool iomux)
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{
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if (iomux) {
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IOMUX_IN(cs_io_num, io_signal[host].spics_in);
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} else {
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gpio_matrix_in(cs_io_num, io_signal[host].spics_in, false);
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}
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}
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/*
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Code for workaround for DMA issue in ESP32 v0/v1 silicon
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@ -50,6 +50,7 @@ static const char *SPI_TAG = "spi_slave";
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#define VALID_HOST(x) (x>SPI_HOST && x<=VSPI_HOST)
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typedef struct {
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int id;
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spi_slave_interface_config_t cfg;
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intr_handle_t intr;
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spi_dev_t *hw;
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@ -92,10 +93,13 @@ esp_err_t spi_slave_initialize(spi_host_device_t host, const spi_bus_config_t *b
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if (spihost[host] == NULL) goto nomem;
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memset(spihost[host], 0, sizeof(spi_slave_t));
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memcpy(&spihost[host]->cfg, slave_config, sizeof(spi_slave_interface_config_t));
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spihost[host]->id = host;
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spicommon_bus_initialize_io(host, bus_config, dma_chan, SPICOMMON_BUSFLAG_SLAVE, &native);
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gpio_set_direction(slave_config->spics_io_num, GPIO_MODE_INPUT);
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spicommon_cs_initialize(host, slave_config->spics_io_num, 0, native == false);
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spicommon_cs_initialize(host, slave_config->spics_io_num, 0, native==false);
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// The slave DMA suffers from unexpected transactions. Forbid reading if DMA is enabled by disabling the CS line.
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if (dma_chan != 0) spicommon_freeze_cs(host);
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spihost[host]->no_gpio_matrix = native;
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spihost[host]->dma_chan = dma_chan;
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if (dma_chan != 0) {
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@ -325,6 +329,9 @@ static void IRAM_ATTR spi_intr(void *arg)
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if (!host->hw->slave.trans_done) return;
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if (host->cur_trans) {
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// When DMA is enabled, the slave rx dma suffers from unexpected transactions. Forbid reading until transaction ready.
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if (host->dma_chan != 0) spicommon_freeze_cs(host->id);
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//when data of cur_trans->length are all sent, the slv_rdata_bit
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//will be the length sent-1 (i.e. cur_trans->length-1 ), otherwise
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//the length sent.
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@ -433,6 +440,9 @@ static void IRAM_ATTR spi_intr(void *arg)
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host->hw->user.usr_mosi = (trans->tx_buffer == NULL) ? 0 : 1;
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host->hw->user.usr_miso = (trans->rx_buffer == NULL) ? 0 : 1;
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//The slave rx dma get disturbed by unexpected transaction. Only connect the CS when slave is ready.
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if (host->dma_chan != 0) spicommon_restore_cs(host->id, host->cfg.spics_io_num, host->no_gpio_matrix);
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//Kick off transfer
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host->hw->cmd.usr = 1;
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if (host->cfg.post_setup_cb) host->cfg.post_setup_cb(trans);
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