diff --git a/components/bootloader/subproject/main/bootloader_start.c b/components/bootloader/subproject/main/bootloader_start.c index 37a3af969..6abad5910 100644 --- a/components/bootloader/subproject/main/bootloader_start.c +++ b/components/bootloader/subproject/main/bootloader_start.c @@ -13,72 +13,21 @@ // limitations under the License. #include #include -#include -#include +#include -#include "esp_attr.h" #include "esp_log.h" - -#include "rom/cache.h" -#include "rom/efuse.h" -#include "rom/ets_sys.h" -#include "rom/spi_flash.h" -#include "rom/crc.h" -#include "rom/rtc.h" -#include "rom/uart.h" #include "rom/gpio.h" -#include "rom/secure_boot.h" - -#include "soc/soc.h" -#include "soc/cpu.h" -#include "soc/rtc.h" -#include "soc/dport_reg.h" -#include "soc/io_mux_reg.h" -#include "soc/efuse_reg.h" -#include "soc/rtc_cntl_reg.h" -#include "soc/timer_group_reg.h" -#include "soc/gpio_reg.h" -#include "soc/gpio_sig_map.h" - +#include "bootloader_config.h" +#include "bootloader_init.h" +#include "bootloader_utility.h" +#include "bootloader_common.h" #include "sdkconfig.h" #include "esp_image_format.h" -#include "esp_secure_boot.h" -#include "esp_flash_encrypt.h" -#include "esp_flash_partitions.h" -#include "bootloader_flash.h" -#include "bootloader_random.h" -#include "bootloader_config.h" -#include "bootloader_clock.h" - -#include "flash_qio_mode.h" - -extern int _bss_start; -extern int _bss_end; -extern int _data_start; -extern int _data_end; static const char* TAG = "boot"; -/* Reduce literal size for some generic string literals */ -#define MAP_MSG "Mapping segment %d as %s" -#define MAP_ERR_MSG "Image contains multiple %s segments. Only the last one will be mapped." - -void bootloader_main(); -static void unpack_load_app(const esp_image_metadata_t *data); -static void print_flash_info(const esp_image_header_t* pfhdr); -static void set_cache_and_start_app(uint32_t drom_addr, - uint32_t drom_load_addr, - uint32_t drom_size, - uint32_t irom_addr, - uint32_t irom_load_addr, - uint32_t irom_size, - uint32_t entry_addr); -static void update_flash_config(const esp_image_header_t* pfhdr); -static void vddsdio_configure(); -static void flash_gpio_configure(); -static void uart_console_configure(void); -static void wdt_reset_check(void); - +static esp_err_t select_image (esp_image_metadata_t *image_data); +static int selected_boot_partition(const bootloader_state_t *bs); /* * We arrive here after the ROM bootloader finished loading this second stage bootloader from flash. * The hardware is mostly uninitialized, flash cache is down and the app CPU is in reset. @@ -86,888 +35,59 @@ static void wdt_reset_check(void); */ void call_start_cpu0() { - cpu_configure_region_protection(); - - /* Sanity check that static RAM is after the stack */ -#ifndef NDEBUG - { - int *sp = get_sp(); - assert(&_bss_start <= &_bss_end); - assert(&_data_start <= &_data_end); - assert(sp < &_bss_start); - assert(sp < &_data_start); - } -#endif - - //Clear bss - memset(&_bss_start, 0, (&_bss_end - &_bss_start) * sizeof(_bss_start)); - - /* completely reset MMU for both CPUs - (in case serial bootloader was running) */ - Cache_Read_Disable(0); - Cache_Read_Disable(1); - Cache_Flush(0); - Cache_Flush(1); - mmu_init(0); - DPORT_REG_SET_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MMU_IA_CLR); - mmu_init(1); - DPORT_REG_CLR_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MMU_IA_CLR); - /* (above steps probably unnecessary for most serial bootloader - usage, all that's absolutely needed is that we unmask DROM0 - cache on the following two lines - normal ROM boot exits with - DROM0 cache unmasked, but serial bootloader exits with it - masked. However can't hurt to be thorough and reset - everything.) - - The lines which manipulate DPORT_APP_CACHE_MMU_IA_CLR bit are - necessary to work around a hardware bug. - */ - DPORT_REG_CLR_BIT(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CACHE_MASK_DROM0); - DPORT_REG_CLR_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MASK_DROM0); - - bootloader_main(); -} - - -/** @brief Load partition table - * - * Parse partition table, get useful data such as location of - * OTA data partition, factory app partition, and test app partition. - * - * @param bs bootloader state structure used to save read data - * @return return true if the partition table was succesfully loaded and MD5 checksum is valid. - */ -bool load_partition_table(bootloader_state_t* bs) -{ - const esp_partition_info_t *partitions; - const int ESP_PARTITION_TABLE_DATA_LEN = 0xC00; /* length of actual data (signature is appended to this) */ - const char *partition_usage; - esp_err_t err; - int num_partitions; - -#ifdef CONFIG_SECURE_BOOT_ENABLED - if(esp_secure_boot_enabled()) { - ESP_LOGI(TAG, "Verifying partition table signature..."); - err = esp_secure_boot_verify_signature(ESP_PARTITION_TABLE_ADDR, ESP_PARTITION_TABLE_DATA_LEN); - if (err != ESP_OK) { - ESP_LOGE(TAG, "Failed to verify partition table signature."); - return false; - } - ESP_LOGD(TAG, "Partition table signature verified"); - } -#endif - - partitions = bootloader_mmap(ESP_PARTITION_TABLE_ADDR, ESP_PARTITION_TABLE_DATA_LEN); - if (!partitions) { - ESP_LOGE(TAG, "bootloader_mmap(0x%x, 0x%x) failed", ESP_PARTITION_TABLE_ADDR, ESP_PARTITION_TABLE_DATA_LEN); - return false; - } - ESP_LOGD(TAG, "mapped partition table 0x%x at 0x%x", ESP_PARTITION_TABLE_ADDR, (intptr_t)partitions); - - err = esp_partition_table_basic_verify(partitions, true, &num_partitions); - if (err != ESP_OK) { - ESP_LOGE(TAG, "Failed to verify partition table"); - return false; - } - - ESP_LOGI(TAG, "Partition Table:"); - ESP_LOGI(TAG, "## Label Usage Type ST Offset Length"); - - for(int i = 0; i < num_partitions; i++) { - const esp_partition_info_t *partition = &partitions[i]; - ESP_LOGD(TAG, "load partition table entry 0x%x", (intptr_t)partition); - ESP_LOGD(TAG, "type=%x subtype=%x", partition->type, partition->subtype); - partition_usage = "unknown"; - - /* valid partition table */ - switch(partition->type) { - case PART_TYPE_APP: /* app partition */ - switch(partition->subtype) { - case PART_SUBTYPE_FACTORY: /* factory binary */ - bs->factory = partition->pos; - partition_usage = "factory app"; - break; - case PART_SUBTYPE_TEST: /* test binary */ - bs->test = partition->pos; - partition_usage = "test app"; - break; - default: - /* OTA binary */ - if ((partition->subtype & ~PART_SUBTYPE_OTA_MASK) == PART_SUBTYPE_OTA_FLAG) { - bs->ota[partition->subtype & PART_SUBTYPE_OTA_MASK] = partition->pos; - ++bs->app_count; - partition_usage = "OTA app"; - } - else { - partition_usage = "Unknown app"; - } - break; - } - break; /* PART_TYPE_APP */ - case PART_TYPE_DATA: /* data partition */ - switch(partition->subtype) { - case PART_SUBTYPE_DATA_OTA: /* ota data */ - bs->ota_info = partition->pos; - partition_usage = "OTA data"; - break; - case PART_SUBTYPE_DATA_RF: - partition_usage = "RF data"; - break; - case PART_SUBTYPE_DATA_WIFI: - partition_usage = "WiFi data"; - break; - default: - partition_usage = "Unknown data"; - break; - } - break; /* PARTITION_USAGE_DATA */ - default: /* other partition type */ - break; - } - - /* print partition type info */ - ESP_LOGI(TAG, "%2d %-16s %-16s %02x %02x %08x %08x", i, partition->label, partition_usage, - partition->type, partition->subtype, - partition->pos.offset, partition->pos.size); - } - - bootloader_munmap(partitions); - - ESP_LOGI(TAG,"End of partition table"); - return true; -} - -static uint32_t ota_select_crc(const esp_ota_select_entry_t *s) -{ - return crc32_le(UINT32_MAX, (uint8_t*)&s->ota_seq, 4); -} - -static bool ota_select_valid(const esp_ota_select_entry_t *s) -{ - return s->ota_seq != UINT32_MAX && s->crc == ota_select_crc(s); -} - -/* indexes used by index_to_partition are the OTA index - number, or these special constants */ -#define FACTORY_INDEX (-1) -#define TEST_APP_INDEX (-2) -#define INVALID_INDEX (-99) - -/* Given a partition index, return the partition position data from the bootloader_state_t structure */ -static esp_partition_pos_t index_to_partition(const bootloader_state_t *bs, int index) -{ - if (index == FACTORY_INDEX) { - return bs->factory; - } - - if (index == TEST_APP_INDEX) { - return bs->test; - } - - if (index >= 0 && index < MAX_OTA_SLOTS && index < bs->app_count) { - return bs->ota[index]; - } - - esp_partition_pos_t invalid = { 0 }; - return invalid; -} - -static void log_invalid_app_partition(int index) -{ - const char *not_bootable = " is not bootable"; /* save a few string literal bytes */ - switch(index) { - case FACTORY_INDEX: - ESP_LOGE(TAG, "Factory app partition%s", not_bootable); - break; - case TEST_APP_INDEX: - ESP_LOGE(TAG, "Factory test app partition%s", not_bootable); - break; - default: - ESP_LOGE(TAG, "OTA app partition slot %d%s", index, not_bootable); - break; - } -} - - -/* Return the index of the selected boot partition. - - This is the preferred boot partition, as determined by the partition table & - any OTA sequence number found in OTA data. - - This partition will only be booted if it contains a valid app image, otherwise load_boot_image() will search - for a valid partition using this selection as the starting point. -*/ -static int get_selected_boot_partition(const bootloader_state_t *bs) -{ - esp_ota_select_entry_t sa,sb; - const esp_ota_select_entry_t *ota_select_map; - - if (bs->ota_info.offset != 0) { - // partition table has OTA data partition - if (bs->ota_info.size < 2 * SPI_SEC_SIZE) { - ESP_LOGE(TAG, "ota_info partition size %d is too small (minimum %d bytes)", bs->ota_info.size, sizeof(esp_ota_select_entry_t)); - return INVALID_INDEX; // can't proceed - } - - ESP_LOGD(TAG, "OTA data offset 0x%x", bs->ota_info.offset); - ota_select_map = bootloader_mmap(bs->ota_info.offset, bs->ota_info.size); - if (!ota_select_map) { - ESP_LOGE(TAG, "bootloader_mmap(0x%x, 0x%x) failed", bs->ota_info.offset, bs->ota_info.size); - return INVALID_INDEX; // can't proceed - } - memcpy(&sa, ota_select_map, sizeof(esp_ota_select_entry_t)); - memcpy(&sb, (uint8_t *)ota_select_map + SPI_SEC_SIZE, sizeof(esp_ota_select_entry_t)); - bootloader_munmap(ota_select_map); - - ESP_LOGD(TAG, "OTA sequence values A 0x%08x B 0x%08x", sa.ota_seq, sb.ota_seq); - if(sa.ota_seq == UINT32_MAX && sb.ota_seq == UINT32_MAX) { - ESP_LOGD(TAG, "OTA sequence numbers both empty (all-0xFF)"); - if (bs->factory.offset != 0) { - ESP_LOGI(TAG, "Defaulting to factory image"); - return FACTORY_INDEX; - } else { - ESP_LOGI(TAG, "No factory image, trying OTA 0"); - return 0; - } - } else { - bool ota_valid = false; - const char *ota_msg; - int ota_seq; // Raw OTA sequence number. May be more than # of OTA slots - if(ota_select_valid(&sa) && ota_select_valid(&sb)) { - ota_valid = true; - ota_msg = "Both OTA values"; - ota_seq = MAX(sa.ota_seq, sb.ota_seq) - 1; - } else if(ota_select_valid(&sa)) { - ota_valid = true; - ota_msg = "Only OTA sequence A is"; - ota_seq = sa.ota_seq - 1; - } else if(ota_select_valid(&sb)) { - ota_valid = true; - ota_msg = "Only OTA sequence B is"; - ota_seq = sb.ota_seq - 1; - } - - if (ota_valid) { - int ota_slot = ota_seq % bs->app_count; // Actual OTA partition selection - ESP_LOGD(TAG, "%s valid. Mapping seq %d -> OTA slot %d", ota_msg, ota_seq, ota_slot); - return ota_slot; - } else if (bs->factory.offset != 0) { - ESP_LOGE(TAG, "ota data partition invalid, falling back to factory"); - return FACTORY_INDEX; - } else { - ESP_LOGE(TAG, "ota data partition invalid and no factory, will try all partitions"); - return FACTORY_INDEX; - } - } - } - - // otherwise, start from factory app partition and let the search logic - // proceed from there - return FACTORY_INDEX; -} - -/* Return true if a partition has a valid app image that was successfully loaded */ -static bool try_load_partition(const esp_partition_pos_t *partition, esp_image_metadata_t *data) -{ - if (partition->size == 0) { - ESP_LOGD(TAG, "Can't boot from zero-length partition"); - return false; - } - - if (esp_image_load(ESP_IMAGE_LOAD, partition, data) == ESP_OK) { - ESP_LOGI(TAG, "Loaded app from partition at offset 0x%x", - partition->offset); - return true; - } - - return false; -} - -#define TRY_LOG_FORMAT "Trying partition index %d offs 0x%x size 0x%x" - -/* Load the app for booting. Start from partition 'start_index', if not bootable then work backwards to FACTORY_INDEX - * (ie try any OTA slots in descending order and then the factory partition). - * - * If still nothing, start from 'start_index + 1' and work up to highest numbered OTA partition. - * - * If still nothing, try TEST_APP_INDEX - * - * Returns true on success, false if there's no bootable app in the partition table. - */ -static bool load_boot_image(const bootloader_state_t *bs, int start_index, esp_image_metadata_t *result) -{ - int index = start_index; - esp_partition_pos_t part; - - /* work backwards from start_index, down to the factory app */ - for(index = start_index; index >= FACTORY_INDEX; index--) { - part = index_to_partition(bs, index); - if (part.size == 0) { - continue; - } - ESP_LOGD(TAG, TRY_LOG_FORMAT, index, part.offset, part.size); - if (try_load_partition(&part, result)) { - return true; - } - log_invalid_app_partition(index); - } - - /* failing that work forwards from start_index, try valid OTA slots */ - for(index = start_index + 1; index < bs->app_count; index++) { - part = index_to_partition(bs, index); - if (part.size == 0) { - continue; - } - ESP_LOGD(TAG, TRY_LOG_FORMAT, index, part.offset, part.size); - if (try_load_partition(&part, result)) { - return true; - } - log_invalid_app_partition(index); - } - - if (try_load_partition(&bs->test, result)) { - ESP_LOGW(TAG, "Falling back to test app as only bootable partition"); - return true; - } - - ESP_LOGE(TAG, "No bootable app partitions in the partition table"); - bzero(result, sizeof(esp_image_metadata_t)); - return false; -} - - -/** - * @function : bootloader_main - * @description: entry function of 2nd bootloader - * - * @inputs: void - */ - -void bootloader_main() -{ - vddsdio_configure(); - flash_gpio_configure(); -#if (CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ == 240) - //Check if ESP32 is rated for a CPU frequency of 160MHz only - if (REG_GET_BIT(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_CPU_FREQ_RATED) && - REG_GET_BIT(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_CPU_FREQ_LOW)) { - ESP_LOGE(TAG, "Chip CPU frequency rated for 160MHz. Modify CPU frequency in menuconfig"); - return; - } -#endif - bootloader_clock_configure(); - uart_console_configure(); - wdt_reset_check(); - ESP_LOGI(TAG, "ESP-IDF %s 2nd stage bootloader", IDF_VER); -#if defined(CONFIG_SECURE_BOOT_ENABLED) || defined(CONFIG_FLASH_ENCRYPTION_ENABLED) - esp_err_t err; -#endif - esp_image_header_t fhdr; - bootloader_state_t bs = { 0 }; - - ESP_LOGI(TAG, "compile time " __TIME__ ); - ets_set_appcpu_boot_addr(0); - - /* disable watch dog here */ - REG_CLR_BIT( RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN ); - REG_CLR_BIT( TIMG_WDTCONFIG0_REG(0), TIMG_WDT_FLASHBOOT_MOD_EN ); - -#ifndef CONFIG_SPI_FLASH_ROM_DRIVER_PATCH - const uint32_t spiconfig = ets_efuse_get_spiconfig(); - if(spiconfig != EFUSE_SPICONFIG_SPI_DEFAULTS && spiconfig != EFUSE_SPICONFIG_HSPI_DEFAULTS) { - ESP_LOGE(TAG, "SPI flash pins are overridden. \"Enable SPI flash ROM driver patched functions\" must be enabled in menuconfig"); - return; - } -#endif - - esp_rom_spiflash_unlock(); - - ESP_LOGI(TAG, "Enabling RNG early entropy source..."); - bootloader_random_enable(); - -#if CONFIG_FLASHMODE_QIO || CONFIG_FLASHMODE_QOUT - bootloader_enable_qio_mode(); -#endif - - if (bootloader_flash_read(ESP_BOOTLOADER_OFFSET, &fhdr, - sizeof(esp_image_header_t), true) != ESP_OK) { - ESP_LOGE(TAG, "failed to load bootloader header!"); + // 1. Hardware initialization + if(bootloader_init() != ESP_OK){ return; } - print_flash_info(&fhdr); - - update_flash_config(&fhdr); - - if (!load_partition_table(&bs)) { - ESP_LOGE(TAG, "load partition table error!"); - return; - } - - int boot_index = get_selected_boot_partition(&bs); - if (boot_index == INVALID_INDEX) { - return; // Unrecoverable failure (not due to corrupt ota data or bad partition contents) - } - // Start from the default, look for the first bootable partition + // 2. Select image to boot esp_image_metadata_t image_data; - if (!load_boot_image(&bs, boot_index, &image_data)) { + if(select_image(&image_data) != ESP_OK){ return; } -#ifdef CONFIG_SECURE_BOOT_ENABLED - /* Generate secure digest from this bootloader to protect future - modifications */ - ESP_LOGI(TAG, "Checking secure boot..."); - err = esp_secure_boot_permanently_enable(); - if (err != ESP_OK) { - ESP_LOGE(TAG, "Bootloader digest generation failed (%d). SECURE BOOT IS NOT ENABLED.", err); - /* Allow booting to continue, as the failure is probably - due to user-configured EFUSEs for testing... - */ - } -#endif - -#ifdef CONFIG_FLASH_ENCRYPTION_ENABLED - /* encrypt flash */ - ESP_LOGI(TAG, "Checking flash encryption..."); - bool flash_encryption_enabled = esp_flash_encryption_enabled(); - err = esp_flash_encrypt_check_and_update(); - if (err != ESP_OK) { - ESP_LOGE(TAG, "Flash encryption check failed (%d).", err); - return; - } - - if (!flash_encryption_enabled && esp_flash_encryption_enabled()) { - /* Flash encryption was just enabled for the first time, - so issue a system reset to ensure flash encryption - cache resets properly */ - ESP_LOGI(TAG, "Resetting with flash encryption enabled..."); - REG_WRITE(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_SYS_RST); - return; - } -#endif - - ESP_LOGI(TAG, "Disabling RNG early entropy source..."); - bootloader_random_disable(); - - // copy loaded segments to RAM, set up caches for mapped segments, and start application - unpack_load_app(&image_data); + // 3. Loading the selected image + bootloader_utility_load_image(&image_data); } -static void unpack_load_app(const esp_image_metadata_t* data) +// Selects image to boot +static esp_err_t select_image (esp_image_metadata_t *image_data) { - uint32_t drom_addr = 0; - uint32_t drom_load_addr = 0; - uint32_t drom_size = 0; - uint32_t irom_addr = 0; - uint32_t irom_load_addr = 0; - uint32_t irom_size = 0; - - // Find DROM & IROM addresses, to configure cache mappings - for (int i = 0; i < data->image.segment_count; i++) { - const esp_image_segment_header_t *header = &data->segments[i]; - if (header->load_addr >= SOC_IROM_LOW && header->load_addr < SOC_IROM_HIGH) { - if (drom_addr != 0) { - ESP_LOGE(TAG, MAP_ERR_MSG, "DROM"); - } else { - ESP_LOGD(TAG, "Mapping segment %d as %s", i, "DROM"); - } - drom_addr = data->segment_data[i]; - drom_load_addr = header->load_addr; - drom_size = header->data_len; - } - if (header->load_addr >= SOC_DROM_LOW && header->load_addr < SOC_DROM_HIGH) { - if (irom_addr != 0) { - ESP_LOGE(TAG, MAP_ERR_MSG, "IROM"); - } else { - ESP_LOGD(TAG, "Mapping segment %d as %s", i, "IROM"); - } - irom_addr = data->segment_data[i]; - irom_load_addr = header->load_addr; - irom_size = header->data_len; - } + // 1. Load partition table + bootloader_state_t bs = { 0 }; + if (!bootloader_utility_load_partition_table(&bs)) { + ESP_LOGE(TAG, "load partition table error!"); + return ESP_FAIL; } - ESP_LOGD(TAG, "calling set_cache_and_start_app"); - set_cache_and_start_app(drom_addr, - drom_load_addr, - drom_size, - irom_addr, - irom_load_addr, - irom_size, - data->image.entry_addr); + // 2. Select boot partition + int boot_index = selected_boot_partition(&bs); + if(boot_index == INVALID_INDEX) { + return ESP_FAIL; // Unrecoverable failure (not due to corrupt ota data or bad partition contents) + } + + // 3. Load the app image for booting + if (!bootloader_utility_load_boot_image(&bs, boot_index, image_data)) { + return ESP_FAIL; + } + return ESP_OK; } -static void set_cache_and_start_app( - uint32_t drom_addr, - uint32_t drom_load_addr, - uint32_t drom_size, - uint32_t irom_addr, - uint32_t irom_load_addr, - uint32_t irom_size, - uint32_t entry_addr) +/* + * Selects a boot partition. + * The conditions for switching to another firmware are checked. + */ +static int selected_boot_partition(const bootloader_state_t *bs) { - ESP_LOGD(TAG, "configure drom and irom and start"); - Cache_Read_Disable( 0 ); - Cache_Flush( 0 ); - - /* Clear the MMU entries that are already set up, - so the new app only has the mappings it creates. - */ - for (int i = 0; i < DPORT_FLASH_MMU_TABLE_SIZE; i++) { - DPORT_PRO_FLASH_MMU_TABLE[i] = DPORT_FLASH_MMU_TABLE_INVALID_VAL; - } - - uint32_t drom_page_count = (drom_size + 64*1024 - 1) / (64*1024); // round up to 64k - ESP_LOGV(TAG, "d mmu set paddr=%08x vaddr=%08x size=%d n=%d", drom_addr & 0xffff0000, drom_load_addr & 0xffff0000, drom_size, drom_page_count ); - int rc = cache_flash_mmu_set( 0, 0, drom_load_addr & 0xffff0000, drom_addr & 0xffff0000, 64, drom_page_count ); - ESP_LOGV(TAG, "rc=%d", rc ); - rc = cache_flash_mmu_set( 1, 0, drom_load_addr & 0xffff0000, drom_addr & 0xffff0000, 64, drom_page_count ); - ESP_LOGV(TAG, "rc=%d", rc ); - uint32_t irom_page_count = (irom_size + 64*1024 - 1) / (64*1024); // round up to 64k - ESP_LOGV(TAG, "i mmu set paddr=%08x vaddr=%08x size=%d n=%d", irom_addr & 0xffff0000, irom_load_addr & 0xffff0000, irom_size, irom_page_count ); - rc = cache_flash_mmu_set( 0, 0, irom_load_addr & 0xffff0000, irom_addr & 0xffff0000, 64, irom_page_count ); - ESP_LOGV(TAG, "rc=%d", rc ); - rc = cache_flash_mmu_set( 1, 0, irom_load_addr & 0xffff0000, irom_addr & 0xffff0000, 64, irom_page_count ); - ESP_LOGV(TAG, "rc=%d", rc ); - DPORT_REG_CLR_BIT( DPORT_PRO_CACHE_CTRL1_REG, (DPORT_PRO_CACHE_MASK_IRAM0) | (DPORT_PRO_CACHE_MASK_IRAM1 & 0) | (DPORT_PRO_CACHE_MASK_IROM0 & 0) | DPORT_PRO_CACHE_MASK_DROM0 | DPORT_PRO_CACHE_MASK_DRAM1 ); - DPORT_REG_CLR_BIT( DPORT_APP_CACHE_CTRL1_REG, (DPORT_APP_CACHE_MASK_IRAM0) | (DPORT_APP_CACHE_MASK_IRAM1 & 0) | (DPORT_APP_CACHE_MASK_IROM0 & 0) | DPORT_APP_CACHE_MASK_DROM0 | DPORT_APP_CACHE_MASK_DRAM1 ); - Cache_Read_Enable( 0 ); - - // Application will need to do Cache_Flush(1) and Cache_Read_Enable(1) - - ESP_LOGD(TAG, "start: 0x%08x", entry_addr); - typedef void (*entry_t)(void); - entry_t entry = ((entry_t) entry_addr); - - // TODO: we have used quite a bit of stack at this point. - // use "movsp" instruction to reset stack back to where ROM stack starts. - (*entry)(); -} - -static void update_flash_config(const esp_image_header_t* pfhdr) -{ - uint32_t size; - switch(pfhdr->spi_size) { - case ESP_IMAGE_FLASH_SIZE_1MB: - size = 1; - break; - case ESP_IMAGE_FLASH_SIZE_2MB: - size = 2; - break; - case ESP_IMAGE_FLASH_SIZE_4MB: - size = 4; - break; - case ESP_IMAGE_FLASH_SIZE_8MB: - size = 8; - break; - case ESP_IMAGE_FLASH_SIZE_16MB: - size = 16; - break; - default: - size = 2; - } - Cache_Read_Disable( 0 ); - // Set flash chip size - esp_rom_spiflash_config_param(g_rom_flashchip.device_id, size * 0x100000, 0x10000, 0x1000, 0x100, 0xffff); - // TODO: set mode - // TODO: set frequency - Cache_Flush(0); - Cache_Read_Enable( 0 ); -} - -static void print_flash_info(const esp_image_header_t* phdr) -{ -#if (BOOT_LOG_LEVEL >= BOOT_LOG_LEVEL_NOTICE) - - ESP_LOGD(TAG, "magic %02x", phdr->magic ); - ESP_LOGD(TAG, "segments %02x", phdr->segment_count ); - ESP_LOGD(TAG, "spi_mode %02x", phdr->spi_mode ); - ESP_LOGD(TAG, "spi_speed %02x", phdr->spi_speed ); - ESP_LOGD(TAG, "spi_size %02x", phdr->spi_size ); - - const char* str; - switch ( phdr->spi_speed ) { - case ESP_IMAGE_SPI_SPEED_40M: - str = "40MHz"; - break; - case ESP_IMAGE_SPI_SPEED_26M: - str = "26.7MHz"; - break; - case ESP_IMAGE_SPI_SPEED_20M: - str = "20MHz"; - break; - case ESP_IMAGE_SPI_SPEED_80M: - str = "80MHz"; - break; - default: - str = "20MHz"; - break; - } - ESP_LOGI(TAG, "SPI Speed : %s", str ); - - /* SPI mode could have been set to QIO during boot already, - so test the SPI registers not the flash header */ - uint32_t spi_ctrl = REG_READ(SPI_CTRL_REG(0)); - if (spi_ctrl & SPI_FREAD_QIO) { - str = "QIO"; - } else if (spi_ctrl & SPI_FREAD_QUAD) { - str = "QOUT"; - } else if (spi_ctrl & SPI_FREAD_DIO) { - str = "DIO"; - } else if (spi_ctrl & SPI_FREAD_DUAL) { - str = "DOUT"; - } else if (spi_ctrl & SPI_FASTRD_MODE) { - str = "FAST READ"; + int boot_index = bootloader_utility_get_selected_boot_partition(bs); + if (boot_index == INVALID_INDEX) { + return boot_index; // Unrecoverable failure (not due to corrupt ota data or bad partition contents) } else { - str = "SLOW READ"; + // Check for reset to the factory firmware or for launch OTA[x] firmware. + // Customer implementation. + // if (gpio_pin_1 == true && ...){ + // boot_index = required_boot_partition; + // } ... } - ESP_LOGI(TAG, "SPI Mode : %s", str ); - - switch ( phdr->spi_size ) { - case ESP_IMAGE_FLASH_SIZE_1MB: - str = "1MB"; - break; - case ESP_IMAGE_FLASH_SIZE_2MB: - str = "2MB"; - break; - case ESP_IMAGE_FLASH_SIZE_4MB: - str = "4MB"; - break; - case ESP_IMAGE_FLASH_SIZE_8MB: - str = "8MB"; - break; - case ESP_IMAGE_FLASH_SIZE_16MB: - str = "16MB"; - break; - default: - str = "2MB"; - break; - } - ESP_LOGI(TAG, "SPI Flash Size : %s", str ); -#endif -} - - -static void vddsdio_configure() -{ -#if CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V - rtc_vddsdio_config_t cfg = rtc_vddsdio_get_config(); - if (cfg.enable == 1 && cfg.tieh == 0) { // VDDSDIO regulator is enabled @ 1.8V - cfg.drefh = 3; - cfg.drefm = 3; - cfg.drefl = 3; - cfg.force = 1; - rtc_vddsdio_set_config(cfg); - ets_delay_us(10); // wait for regulator to become stable - } -#endif // CONFIG_BOOTLOADER_VDDSDIO_BOOST -} - - -#define FLASH_CLK_IO 6 -#define FLASH_CS_IO 11 -#define FLASH_SPIQ_IO 7 -#define FLASH_SPID_IO 8 -#define FLASH_SPIWP_IO 10 -#define FLASH_SPIHD_IO 9 -#define FLASH_IO_MATRIX_DUMMY_40M 1 -#define FLASH_IO_MATRIX_DUMMY_80M 2 -static void IRAM_ATTR flash_gpio_configure() -{ - int spi_cache_dummy = 0; - int drv = 2; -#if CONFIG_FLASHMODE_QIO - spi_cache_dummy = SPI0_R_QIO_DUMMY_CYCLELEN; //qio 3 -#elif CONFIG_FLASHMODE_QOUT - spi_cache_dummy = SPI0_R_FAST_DUMMY_CYCLELEN; //qout 7 -#elif CONFIG_FLASHMODE_DIO - spi_cache_dummy = SPI0_R_DIO_DUMMY_CYCLELEN; //dio 3 -#elif CONFIG_FLASHMODE_DOUT - spi_cache_dummy = SPI0_R_FAST_DUMMY_CYCLELEN; //dout 7 -#endif - /* dummy_len_plus values defined in ROM for SPI flash configuration */ - extern uint8_t g_rom_spiflash_dummy_len_plus[]; -#if CONFIG_ESPTOOLPY_FLASHFREQ_40M - g_rom_spiflash_dummy_len_plus[0] = FLASH_IO_MATRIX_DUMMY_40M; - g_rom_spiflash_dummy_len_plus[1] = FLASH_IO_MATRIX_DUMMY_40M; - SET_PERI_REG_BITS(SPI_USER1_REG(0), SPI_USR_DUMMY_CYCLELEN_V, spi_cache_dummy + FLASH_IO_MATRIX_DUMMY_40M, SPI_USR_DUMMY_CYCLELEN_S); //DUMMY -#elif CONFIG_ESPTOOLPY_FLASHFREQ_80M - g_rom_spiflash_dummy_len_plus[0] = FLASH_IO_MATRIX_DUMMY_80M; - g_rom_spiflash_dummy_len_plus[1] = FLASH_IO_MATRIX_DUMMY_80M; - SET_PERI_REG_BITS(SPI_USER1_REG(0), SPI_USR_DUMMY_CYCLELEN_V, spi_cache_dummy + FLASH_IO_MATRIX_DUMMY_80M, SPI_USR_DUMMY_CYCLELEN_S); //DUMMY - drv = 3; -#endif - - uint32_t chip_ver = REG_GET_FIELD(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_VER_PKG); - uint32_t pkg_ver = chip_ver & 0x7; - - if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5) { - // For ESP32D2WD the SPI pins are already configured - // flash clock signal should come from IO MUX. - PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, FUNC_SD_CLK_SPICLK); - SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_CLK_U, FUN_DRV, drv, FUN_DRV_S); - } else if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD2) { - // For ESP32PICOD2 the SPI pins are already configured - // flash clock signal should come from IO MUX. - PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, FUNC_SD_CLK_SPICLK); - SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_CLK_U, FUN_DRV, drv, FUN_DRV_S); - } else if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4) { - // For ESP32PICOD4 the SPI pins are already configured - // flash clock signal should come from IO MUX. - PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, FUNC_SD_CLK_SPICLK); - SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_CLK_U, FUN_DRV, drv, FUN_DRV_S); - } else { - const uint32_t spiconfig = ets_efuse_get_spiconfig(); - if (spiconfig == EFUSE_SPICONFIG_SPI_DEFAULTS) { - gpio_matrix_out(FLASH_CS_IO, SPICS0_OUT_IDX, 0, 0); - gpio_matrix_out(FLASH_SPIQ_IO, SPIQ_OUT_IDX, 0, 0); - gpio_matrix_in(FLASH_SPIQ_IO, SPIQ_IN_IDX, 0); - gpio_matrix_out(FLASH_SPID_IO, SPID_OUT_IDX, 0, 0); - gpio_matrix_in(FLASH_SPID_IO, SPID_IN_IDX, 0); - gpio_matrix_out(FLASH_SPIWP_IO, SPIWP_OUT_IDX, 0, 0); - gpio_matrix_in(FLASH_SPIWP_IO, SPIWP_IN_IDX, 0); - gpio_matrix_out(FLASH_SPIHD_IO, SPIHD_OUT_IDX, 0, 0); - gpio_matrix_in(FLASH_SPIHD_IO, SPIHD_IN_IDX, 0); - //select pin function gpio - PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA0_U, PIN_FUNC_GPIO); - PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA1_U, PIN_FUNC_GPIO); - PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA2_U, PIN_FUNC_GPIO); - PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA3_U, PIN_FUNC_GPIO); - PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CMD_U, PIN_FUNC_GPIO); - // flash clock signal should come from IO MUX. - // set drive ability for clock - PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, FUNC_SD_CLK_SPICLK); - SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_CLK_U, FUN_DRV, drv, FUN_DRV_S); - } - } -} - - -static void uart_console_configure(void) -{ -#if CONFIG_CONSOLE_UART_NONE - ets_install_putc1(NULL); - ets_install_putc2(NULL); -#else // CONFIG_CONSOLE_UART_NONE - const int uart_num = CONFIG_CONSOLE_UART_NUM; - - uartAttach(); - ets_install_uart_printf(); - - // Wait for UART FIFO to be empty. - uart_tx_wait_idle(0); - -#if CONFIG_CONSOLE_UART_CUSTOM - // Some constants to make the following code less upper-case - const int uart_tx_gpio = CONFIG_CONSOLE_UART_TX_GPIO; - const int uart_rx_gpio = CONFIG_CONSOLE_UART_RX_GPIO; - // Switch to the new UART (this just changes UART number used for - // ets_printf in ROM code). - uart_tx_switch(uart_num); - // If console is attached to UART1 or if non-default pins are used, - // need to reconfigure pins using GPIO matrix - if (uart_num != 0 || uart_tx_gpio != 1 || uart_rx_gpio != 3) { - // Change pin mode for GPIO1/3 from UART to GPIO - PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD_GPIO3); - PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD_GPIO1); - // Route GPIO signals to/from pins - // (arrays should be optimized away by the compiler) - const uint32_t tx_idx_list[3] = { U0TXD_OUT_IDX, U1TXD_OUT_IDX, U2TXD_OUT_IDX }; - const uint32_t rx_idx_list[3] = { U0RXD_IN_IDX, U1RXD_IN_IDX, U2RXD_IN_IDX }; - const uint32_t tx_idx = tx_idx_list[uart_num]; - const uint32_t rx_idx = rx_idx_list[uart_num]; - gpio_matrix_out(uart_tx_gpio, tx_idx, 0, 0); - gpio_matrix_in(uart_rx_gpio, rx_idx, 0); - } -#endif // CONFIG_CONSOLE_UART_CUSTOM - - // Set configured UART console baud rate - const int uart_baud = CONFIG_CONSOLE_UART_BAUDRATE; - uart_div_modify(uart_num, (rtc_clk_apb_freq_get() << 4) / uart_baud); - -#endif // CONFIG_CONSOLE_UART_NONE -} - -static void wdt_reset_cpu0_info_enable(void) -{ - //We do not reset core1 info here because it didn't work before cpu1 was up. So we put it into call_start_cpu1. - DPORT_REG_SET_BIT(DPORT_PRO_CPU_RECORD_CTRL_REG, DPORT_PRO_CPU_PDEBUG_ENABLE | DPORT_PRO_CPU_RECORD_ENABLE); - DPORT_REG_CLR_BIT(DPORT_PRO_CPU_RECORD_CTRL_REG, DPORT_PRO_CPU_RECORD_ENABLE); -} - -static void wdt_reset_info_dump(int cpu) -{ - uint32_t inst = 0, pid = 0, stat = 0, data = 0, pc = 0, - lsstat = 0, lsaddr = 0, lsdata = 0, dstat = 0; - const char *cpu_name = cpu ? "APP" : "PRO"; - - if (cpu == 0) { - stat = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_STATUS_REG); - pid = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PID_REG); - inst = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGINST_REG); - dstat = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGSTATUS_REG); - data = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGDATA_REG); - pc = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGPC_REG); - lsstat = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGLS0STAT_REG); - lsaddr = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGLS0ADDR_REG); - lsdata = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGLS0DATA_REG); - - } else { - stat = DPORT_REG_READ(DPORT_APP_CPU_RECORD_STATUS_REG); - pid = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PID_REG); - inst = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGINST_REG); - dstat = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGSTATUS_REG); - data = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGDATA_REG); - pc = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGPC_REG); - lsstat = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGLS0STAT_REG); - lsaddr = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGLS0ADDR_REG); - lsdata = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGLS0DATA_REG); - } - if (DPORT_RECORD_PDEBUGINST_SZ(inst) == 0 && - DPORT_RECORD_PDEBUGSTATUS_BBCAUSE(dstat) == DPORT_RECORD_PDEBUGSTATUS_BBCAUSE_WAITI) { - ESP_LOGW(TAG, "WDT reset info: %s CPU PC=0x%x (waiti mode)", cpu_name, pc); - } else { - ESP_LOGW(TAG, "WDT reset info: %s CPU PC=0x%x", cpu_name, pc); - } - ESP_LOGD(TAG, "WDT reset info: %s CPU STATUS 0x%08x", cpu_name, stat); - ESP_LOGD(TAG, "WDT reset info: %s CPU PID 0x%08x", cpu_name, pid); - ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGINST 0x%08x", cpu_name, inst); - ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGSTATUS 0x%08x", cpu_name, dstat); - ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGDATA 0x%08x", cpu_name, data); - ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGPC 0x%08x", cpu_name, pc); - ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0STAT 0x%08x", cpu_name, lsstat); - ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0ADDR 0x%08x", cpu_name, lsaddr); - ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0DATA 0x%08x", cpu_name, lsdata); -} - -static void wdt_reset_check(void) -{ - int wdt_rst = 0; - RESET_REASON rst_reas[2]; - - rst_reas[0] = rtc_get_reset_reason(0); - rst_reas[1] = rtc_get_reset_reason(1); - if (rst_reas[0] == RTCWDT_SYS_RESET || rst_reas[0] == TG0WDT_SYS_RESET || rst_reas[0] == TG1WDT_SYS_RESET || - rst_reas[0] == TGWDT_CPU_RESET || rst_reas[0] == RTCWDT_CPU_RESET) { - ESP_LOGW(TAG, "PRO CPU has been reset by WDT."); - wdt_rst = 1; - } - if (rst_reas[1] == RTCWDT_SYS_RESET || rst_reas[1] == TG0WDT_SYS_RESET || rst_reas[1] == TG1WDT_SYS_RESET || - rst_reas[1] == TGWDT_CPU_RESET || rst_reas[1] == RTCWDT_CPU_RESET) { - ESP_LOGW(TAG, "APP CPU has been reset by WDT."); - wdt_rst = 1; - } - if (wdt_rst) { - // if reset by WDT dump info from trace port - wdt_reset_info_dump(0); - wdt_reset_info_dump(1); - } - wdt_reset_cpu0_info_enable(); -} - -void __assert_func(const char *file, int line, const char *func, const char *expr) -{ - ESP_LOGE(TAG, "Assert failed in %s, %s:%d (%s)", func, file, line, expr); - while(1) {} + return boot_index; } diff --git a/components/bootloader_support/include/bootloader_common.h b/components/bootloader_support/include/bootloader_common.h new file mode 100644 index 000000000..36eea822d --- /dev/null +++ b/components/bootloader_support/include/bootloader_common.h @@ -0,0 +1,31 @@ +// Copyright 2018 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#pragma once + +/** + * @brief Calculate crc for the OTA data partition. + * + * @param[in] ota_data The OTA data partition. + * @return Returns crc value. + */ +uint32_t bootloader_common_ota_select_crc(const esp_ota_select_entry_t *s); + +/** + * @brief Verifies the validity of the OTA data partition + * + * @param[in] ota_data The OTA data partition. + * @return Returns true on valid, false otherwise. + */ +bool bootloader_common_ota_select_valid(const esp_ota_select_entry_t *s); diff --git a/components/bootloader/subproject/main/bootloader_config.h b/components/bootloader_support/include_priv/bootloader_config.h similarity index 87% rename from components/bootloader/subproject/main/bootloader_config.h rename to components/bootloader_support/include_priv/bootloader_config.h index 289a9e38d..d6ec5da1b 100644 --- a/components/bootloader/subproject/main/bootloader_config.h +++ b/components/bootloader_support/include_priv/bootloader_config.h @@ -41,6 +41,12 @@ typedef struct { bool flash_encrypt(bootloader_state_t *bs); +/* Indices used by index_to_partition are the OTA index + number, or these special constants */ +#define FACTORY_INDEX (-1) +#define TEST_APP_INDEX (-2) +#define INVALID_INDEX (-99) + #ifdef __cplusplus } #endif diff --git a/components/bootloader_support/include_priv/bootloader_init.h b/components/bootloader_support/include_priv/bootloader_init.h new file mode 100644 index 000000000..443a207cf --- /dev/null +++ b/components/bootloader_support/include_priv/bootloader_init.h @@ -0,0 +1,28 @@ +// Copyright 2018 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +#pragma once + +#include "esp_err.h" + +/* @brief Prepares hardware for work. + * + * Setting up: + * - Disable Cache access for both CPUs; + * - Initialise cache mmu; + * - Setting up pins and mode for SD, SPI, UART, Clocking. + + * @return ESP_OK - If the setting is successful. + * ESP_FAIL - If the setting is not successful. + */ +esp_err_t bootloader_init(); diff --git a/components/bootloader_support/include_priv/bootloader_utility.h b/components/bootloader_support/include_priv/bootloader_utility.h new file mode 100644 index 000000000..6cf6a77e1 --- /dev/null +++ b/components/bootloader_support/include_priv/bootloader_utility.h @@ -0,0 +1,64 @@ +// Copyright 2018 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +#pragma once + +#include "esp_image_format.h" + +/** + * @brief Load partition table. + * + * Parse partition table, get useful data such as location of + * OTA data partition, factory app partition, and test app partition. + * + * @param[out] bs Bootloader state structure used to save read data. + * @return Return true if the partition table was succesfully loaded and MD5 checksum is valid. + */ +bool bootloader_utility_load_partition_table(bootloader_state_t* bs); + +/** + * @brief Return the index of the selected boot partition. + * + * This is the preferred boot partition, as determined by the partition table & + * any OTA sequence number found in OTA data. + * This partition will only be booted if it contains a valid app image, otherwise load_boot_image() will search + * for a valid partition using this selection as the starting point. + * + * @param[in] bs Bootloader state structure. + * @return Returns the index on success, INVALID_INDEX otherwise. + */ +int bootloader_utility_get_selected_boot_partition(const bootloader_state_t *bs); + +/** + * @brief Load the app image for booting. + * + * Start from partition 'start_index', if not bootable then work backwards to FACTORY_INDEX + * (ie try any OTA slots in descending order and then the factory partition). + * If still nothing, start from 'start_index + 1' and work up to highest numbered OTA partition. + * If still nothing, try TEST_APP_INDEX. + * + * @param[in] bs Bootloader state structure. + * @param[in] start_index The index from which the search for images begins. + * @param[out] result The image found. + * @return Returns true on success, false if there's no bootable app in the partition table. + */ +bool bootloader_utility_load_boot_image(const bootloader_state_t *bs, int start_index, esp_image_metadata_t *result); + +/** + * @brief Loading the selected image. + * + * Copy loaded segments to RAM, set up caches for mapped segments, and start application. + * + * @param[in] data Structure to hold on-flash image metadata. + */ +void bootloader_utility_load_image(const esp_image_metadata_t* image_data); diff --git a/components/bootloader/subproject/main/flash_qio_mode.h b/components/bootloader_support/include_priv/flash_qio_mode.h similarity index 100% rename from components/bootloader/subproject/main/flash_qio_mode.h rename to components/bootloader_support/include_priv/flash_qio_mode.h diff --git a/components/bootloader_support/src/bootloader_common.c b/components/bootloader_support/src/bootloader_common.c new file mode 100644 index 000000000..0e3722ed9 --- /dev/null +++ b/components/bootloader_support/src/bootloader_common.c @@ -0,0 +1,26 @@ +// Copyright 2018 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +#include +#include "rom/crc.h" +#include "esp_flash_data_types.h" + +uint32_t bootloader_common_ota_select_crc(const esp_ota_select_entry_t *s) +{ + return crc32_le(UINT32_MAX, (uint8_t*)&s->ota_seq, 4); +} + +bool bootloader_common_ota_select_valid(const esp_ota_select_entry_t *s) +{ + return s->ota_seq != UINT32_MAX && s->crc == bootloader_common_ota_select_crc(s); +} diff --git a/components/bootloader_support/src/bootloader_init.c b/components/bootloader_support/src/bootloader_init.c new file mode 100644 index 000000000..bed022397 --- /dev/null +++ b/components/bootloader_support/src/bootloader_init.c @@ -0,0 +1,494 @@ +// Copyright 2018 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +#include +#include +#include +#include + +#include "esp_attr.h" +#include "esp_log.h" + +#include "rom/cache.h" +#include "rom/efuse.h" +#include "rom/ets_sys.h" +#include "rom/spi_flash.h" +#include "rom/crc.h" +#include "rom/rtc.h" +#include "rom/uart.h" +#include "rom/gpio.h" +#include "rom/secure_boot.h" + +#include "soc/soc.h" +#include "soc/cpu.h" +#include "soc/rtc.h" +#include "soc/dport_reg.h" +#include "soc/io_mux_reg.h" +#include "soc/efuse_reg.h" +#include "soc/rtc_cntl_reg.h" +#include "soc/timer_group_reg.h" +#include "soc/gpio_reg.h" +#include "soc/gpio_sig_map.h" + +#include "sdkconfig.h" +#include "esp_image_format.h" +#include "esp_secure_boot.h" +#include "esp_flash_encrypt.h" +#include "esp_flash_partitions.h" +#include "bootloader_flash.h" +#include "bootloader_random.h" +#include "bootloader_config.h" +#include "bootloader_clock.h" + +#include "flash_qio_mode.h" + +extern int _bss_start; +extern int _bss_end; +extern int _data_start; +extern int _data_end; + +static const char* TAG = "boot"; + +static esp_err_t bootloader_main(); +static void print_flash_info(const esp_image_header_t* pfhdr); +static void update_flash_config(const esp_image_header_t* pfhdr); +static void vddsdio_configure(); +static void flash_gpio_configure(); +static void uart_console_configure(void); +static void wdt_reset_check(void); + + +esp_err_t bootloader_init() +{ + cpu_configure_region_protection(); + + /* Sanity check that static RAM is after the stack */ +#ifndef NDEBUG + { + int *sp = get_sp(); + assert(&_bss_start <= &_bss_end); + assert(&_data_start <= &_data_end); + assert(sp < &_bss_start); + assert(sp < &_data_start); + } +#endif + + //Clear bss + memset(&_bss_start, 0, (&_bss_end - &_bss_start) * sizeof(_bss_start)); + + /* completely reset MMU for both CPUs + (in case serial bootloader was running) */ + Cache_Read_Disable(0); + Cache_Read_Disable(1); + Cache_Flush(0); + Cache_Flush(1); + mmu_init(0); + DPORT_REG_SET_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MMU_IA_CLR); + mmu_init(1); + DPORT_REG_CLR_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MMU_IA_CLR); + /* (above steps probably unnecessary for most serial bootloader + usage, all that's absolutely needed is that we unmask DROM0 + cache on the following two lines - normal ROM boot exits with + DROM0 cache unmasked, but serial bootloader exits with it + masked. However can't hurt to be thorough and reset + everything.) + + The lines which manipulate DPORT_APP_CACHE_MMU_IA_CLR bit are + necessary to work around a hardware bug. + */ + DPORT_REG_CLR_BIT(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CACHE_MASK_DROM0); + DPORT_REG_CLR_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MASK_DROM0); + + if(bootloader_main() != ESP_OK){ + return ESP_FAIL; + } + return ESP_OK; +} + +static esp_err_t bootloader_main() +{ + vddsdio_configure(); + flash_gpio_configure(); +#if (CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ == 240) + //Check if ESP32 is rated for a CPU frequency of 160MHz only + if (REG_GET_BIT(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_CPU_FREQ_RATED) && + REG_GET_BIT(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_CPU_FREQ_LOW)) { + ESP_LOGE(TAG, "Chip CPU frequency rated for 160MHz. Modify CPU frequency in menuconfig"); + return ESP_FAIL; + } +#endif + bootloader_clock_configure(); + uart_console_configure(); + wdt_reset_check(); + ESP_LOGI(TAG, "ESP-IDF %s 2nd stage bootloader", IDF_VER); + + esp_image_header_t fhdr; + + ESP_LOGI(TAG, "compile time " __TIME__ ); + ets_set_appcpu_boot_addr(0); + + /* disable watch dog here */ + REG_CLR_BIT( RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN ); + REG_CLR_BIT( TIMG_WDTCONFIG0_REG(0), TIMG_WDT_FLASHBOOT_MOD_EN ); + +#ifndef CONFIG_SPI_FLASH_ROM_DRIVER_PATCH + const uint32_t spiconfig = ets_efuse_get_spiconfig(); + if(spiconfig != EFUSE_SPICONFIG_SPI_DEFAULTS && spiconfig != EFUSE_SPICONFIG_HSPI_DEFAULTS) { + ESP_LOGE(TAG, "SPI flash pins are overridden. \"Enable SPI flash ROM driver patched functions\" must be enabled in menuconfig"); + return ESP_FAIL; + } +#endif + + esp_rom_spiflash_unlock(); + + ESP_LOGI(TAG, "Enabling RNG early entropy source..."); + bootloader_random_enable(); + +#if CONFIG_FLASHMODE_QIO || CONFIG_FLASHMODE_QOUT + bootloader_enable_qio_mode(); +#endif + + if (bootloader_flash_read(ESP_BOOTLOADER_OFFSET, &fhdr, sizeof(esp_image_header_t), true) != ESP_OK) { + ESP_LOGE(TAG, "failed to load bootloader header!"); + return ESP_FAIL; + } + + print_flash_info(&fhdr); + + update_flash_config(&fhdr); + return ESP_OK; +} + +static void update_flash_config(const esp_image_header_t* pfhdr) +{ + uint32_t size; + switch(pfhdr->spi_size) { + case ESP_IMAGE_FLASH_SIZE_1MB: + size = 1; + break; + case ESP_IMAGE_FLASH_SIZE_2MB: + size = 2; + break; + case ESP_IMAGE_FLASH_SIZE_4MB: + size = 4; + break; + case ESP_IMAGE_FLASH_SIZE_8MB: + size = 8; + break; + case ESP_IMAGE_FLASH_SIZE_16MB: + size = 16; + break; + default: + size = 2; + } + Cache_Read_Disable( 0 ); + // Set flash chip size + esp_rom_spiflash_config_param(g_rom_flashchip.device_id, size * 0x100000, 0x10000, 0x1000, 0x100, 0xffff); + // TODO: set mode + // TODO: set frequency + Cache_Flush(0); + Cache_Read_Enable( 0 ); +} + +static void print_flash_info(const esp_image_header_t* phdr) +{ +#if (BOOT_LOG_LEVEL >= BOOT_LOG_LEVEL_NOTICE) + + ESP_LOGD(TAG, "magic %02x", phdr->magic ); + ESP_LOGD(TAG, "segments %02x", phdr->segment_count ); + ESP_LOGD(TAG, "spi_mode %02x", phdr->spi_mode ); + ESP_LOGD(TAG, "spi_speed %02x", phdr->spi_speed ); + ESP_LOGD(TAG, "spi_size %02x", phdr->spi_size ); + + const char* str; + switch ( phdr->spi_speed ) { + case ESP_IMAGE_SPI_SPEED_40M: + str = "40MHz"; + break; + case ESP_IMAGE_SPI_SPEED_26M: + str = "26.7MHz"; + break; + case ESP_IMAGE_SPI_SPEED_20M: + str = "20MHz"; + break; + case ESP_IMAGE_SPI_SPEED_80M: + str = "80MHz"; + break; + default: + str = "20MHz"; + break; + } + ESP_LOGI(TAG, "SPI Speed : %s", str ); + + /* SPI mode could have been set to QIO during boot already, + so test the SPI registers not the flash header */ + uint32_t spi_ctrl = REG_READ(SPI_CTRL_REG(0)); + if (spi_ctrl & SPI_FREAD_QIO) { + str = "QIO"; + } else if (spi_ctrl & SPI_FREAD_QUAD) { + str = "QOUT"; + } else if (spi_ctrl & SPI_FREAD_DIO) { + str = "DIO"; + } else if (spi_ctrl & SPI_FREAD_DUAL) { + str = "DOUT"; + } else if (spi_ctrl & SPI_FASTRD_MODE) { + str = "FAST READ"; + } else { + str = "SLOW READ"; + } + ESP_LOGI(TAG, "SPI Mode : %s", str ); + + switch ( phdr->spi_size ) { + case ESP_IMAGE_FLASH_SIZE_1MB: + str = "1MB"; + break; + case ESP_IMAGE_FLASH_SIZE_2MB: + str = "2MB"; + break; + case ESP_IMAGE_FLASH_SIZE_4MB: + str = "4MB"; + break; + case ESP_IMAGE_FLASH_SIZE_8MB: + str = "8MB"; + break; + case ESP_IMAGE_FLASH_SIZE_16MB: + str = "16MB"; + break; + default: + str = "2MB"; + break; + } + ESP_LOGI(TAG, "SPI Flash Size : %s", str ); +#endif +} + +static void vddsdio_configure() +{ +#if CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V + rtc_vddsdio_config_t cfg = rtc_vddsdio_get_config(); + if (cfg.enable == 1 && cfg.tieh == 0) { // VDDSDIO regulator is enabled @ 1.8V + cfg.drefh = 3; + cfg.drefm = 3; + cfg.drefl = 3; + cfg.force = 1; + rtc_vddsdio_set_config(cfg); + ets_delay_us(10); // wait for regulator to become stable + } +#endif // CONFIG_BOOTLOADER_VDDSDIO_BOOST +} + +#define FLASH_CLK_IO 6 +#define FLASH_CS_IO 11 +#define FLASH_SPIQ_IO 7 +#define FLASH_SPID_IO 8 +#define FLASH_SPIWP_IO 10 +#define FLASH_SPIHD_IO 9 +#define FLASH_IO_MATRIX_DUMMY_40M 1 +#define FLASH_IO_MATRIX_DUMMY_80M 2 +static void IRAM_ATTR flash_gpio_configure() +{ + int spi_cache_dummy = 0; + int drv = 2; +#if CONFIG_FLASHMODE_QIO + spi_cache_dummy = SPI0_R_QIO_DUMMY_CYCLELEN; //qio 3 +#elif CONFIG_FLASHMODE_QOUT + spi_cache_dummy = SPI0_R_FAST_DUMMY_CYCLELEN; //qout 7 +#elif CONFIG_FLASHMODE_DIO + spi_cache_dummy = SPI0_R_DIO_DUMMY_CYCLELEN; //dio 3 +#elif CONFIG_FLASHMODE_DOUT + spi_cache_dummy = SPI0_R_FAST_DUMMY_CYCLELEN; //dout 7 +#endif + /* dummy_len_plus values defined in ROM for SPI flash configuration */ + extern uint8_t g_rom_spiflash_dummy_len_plus[]; +#if CONFIG_ESPTOOLPY_FLASHFREQ_40M + g_rom_spiflash_dummy_len_plus[0] = FLASH_IO_MATRIX_DUMMY_40M; + g_rom_spiflash_dummy_len_plus[1] = FLASH_IO_MATRIX_DUMMY_40M; + SET_PERI_REG_BITS(SPI_USER1_REG(0), SPI_USR_DUMMY_CYCLELEN_V, spi_cache_dummy + FLASH_IO_MATRIX_DUMMY_40M, SPI_USR_DUMMY_CYCLELEN_S); //DUMMY +#elif CONFIG_ESPTOOLPY_FLASHFREQ_80M + g_rom_spiflash_dummy_len_plus[0] = FLASH_IO_MATRIX_DUMMY_80M; + g_rom_spiflash_dummy_len_plus[1] = FLASH_IO_MATRIX_DUMMY_80M; + SET_PERI_REG_BITS(SPI_USER1_REG(0), SPI_USR_DUMMY_CYCLELEN_V, spi_cache_dummy + FLASH_IO_MATRIX_DUMMY_80M, SPI_USR_DUMMY_CYCLELEN_S); //DUMMY + drv = 3; +#endif + + uint32_t chip_ver = REG_GET_FIELD(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_VER_PKG); + uint32_t pkg_ver = chip_ver & 0x7; + + if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5) { + // For ESP32D2WD the SPI pins are already configured + // flash clock signal should come from IO MUX. + PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, FUNC_SD_CLK_SPICLK); + SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_CLK_U, FUN_DRV, drv, FUN_DRV_S); + } else if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD2) { + // For ESP32PICOD2 the SPI pins are already configured + // flash clock signal should come from IO MUX. + PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, FUNC_SD_CLK_SPICLK); + SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_CLK_U, FUN_DRV, drv, FUN_DRV_S); + } else if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4) { + // For ESP32PICOD4 the SPI pins are already configured + // flash clock signal should come from IO MUX. + PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, FUNC_SD_CLK_SPICLK); + SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_CLK_U, FUN_DRV, drv, FUN_DRV_S); + } else { + const uint32_t spiconfig = ets_efuse_get_spiconfig(); + if (spiconfig == EFUSE_SPICONFIG_SPI_DEFAULTS) { + gpio_matrix_out(FLASH_CS_IO, SPICS0_OUT_IDX, 0, 0); + gpio_matrix_out(FLASH_SPIQ_IO, SPIQ_OUT_IDX, 0, 0); + gpio_matrix_in(FLASH_SPIQ_IO, SPIQ_IN_IDX, 0); + gpio_matrix_out(FLASH_SPID_IO, SPID_OUT_IDX, 0, 0); + gpio_matrix_in(FLASH_SPID_IO, SPID_IN_IDX, 0); + gpio_matrix_out(FLASH_SPIWP_IO, SPIWP_OUT_IDX, 0, 0); + gpio_matrix_in(FLASH_SPIWP_IO, SPIWP_IN_IDX, 0); + gpio_matrix_out(FLASH_SPIHD_IO, SPIHD_OUT_IDX, 0, 0); + gpio_matrix_in(FLASH_SPIHD_IO, SPIHD_IN_IDX, 0); + //select pin function gpio + PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA0_U, PIN_FUNC_GPIO); + PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA1_U, PIN_FUNC_GPIO); + PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA2_U, PIN_FUNC_GPIO); + PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA3_U, PIN_FUNC_GPIO); + PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CMD_U, PIN_FUNC_GPIO); + // flash clock signal should come from IO MUX. + // set drive ability for clock + PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, FUNC_SD_CLK_SPICLK); + SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_CLK_U, FUN_DRV, drv, FUN_DRV_S); + } + } +} + +static void uart_console_configure(void) +{ +#if CONFIG_CONSOLE_UART_NONE + ets_install_putc1(NULL); + ets_install_putc2(NULL); +#else // CONFIG_CONSOLE_UART_NONE + const int uart_num = CONFIG_CONSOLE_UART_NUM; + + uartAttach(); + ets_install_uart_printf(); + + // Wait for UART FIFO to be empty. + uart_tx_wait_idle(0); + +#if CONFIG_CONSOLE_UART_CUSTOM + // Some constants to make the following code less upper-case + const int uart_tx_gpio = CONFIG_CONSOLE_UART_TX_GPIO; + const int uart_rx_gpio = CONFIG_CONSOLE_UART_RX_GPIO; + // Switch to the new UART (this just changes UART number used for + // ets_printf in ROM code). + uart_tx_switch(uart_num); + // If console is attached to UART1 or if non-default pins are used, + // need to reconfigure pins using GPIO matrix + if (uart_num != 0 || uart_tx_gpio != 1 || uart_rx_gpio != 3) { + // Change pin mode for GPIO1/3 from UART to GPIO + PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD_GPIO3); + PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD_GPIO1); + // Route GPIO signals to/from pins + // (arrays should be optimized away by the compiler) + const uint32_t tx_idx_list[3] = { U0TXD_OUT_IDX, U1TXD_OUT_IDX, U2TXD_OUT_IDX }; + const uint32_t rx_idx_list[3] = { U0RXD_IN_IDX, U1RXD_IN_IDX, U2RXD_IN_IDX }; + const uint32_t tx_idx = tx_idx_list[uart_num]; + const uint32_t rx_idx = rx_idx_list[uart_num]; + gpio_matrix_out(uart_tx_gpio, tx_idx, 0, 0); + gpio_matrix_in(uart_rx_gpio, rx_idx, 0); + } +#endif // CONFIG_CONSOLE_UART_CUSTOM + + // Set configured UART console baud rate + const int uart_baud = CONFIG_CONSOLE_UART_BAUDRATE; + uart_div_modify(uart_num, (rtc_clk_apb_freq_get() << 4) / uart_baud); + +#endif // CONFIG_CONSOLE_UART_NONE +} + +static void wdt_reset_cpu0_info_enable(void) +{ + //We do not reset core1 info here because it didn't work before cpu1 was up. So we put it into call_start_cpu1. + DPORT_REG_SET_BIT(DPORT_PRO_CPU_RECORD_CTRL_REG, DPORT_PRO_CPU_PDEBUG_ENABLE | DPORT_PRO_CPU_RECORD_ENABLE); + DPORT_REG_CLR_BIT(DPORT_PRO_CPU_RECORD_CTRL_REG, DPORT_PRO_CPU_RECORD_ENABLE); +} + +static void wdt_reset_info_dump(int cpu) +{ + uint32_t inst = 0, pid = 0, stat = 0, data = 0, pc = 0, + lsstat = 0, lsaddr = 0, lsdata = 0, dstat = 0; + const char *cpu_name = cpu ? "APP" : "PRO"; + + if (cpu == 0) { + stat = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_STATUS_REG); + pid = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PID_REG); + inst = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGINST_REG); + dstat = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGSTATUS_REG); + data = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGDATA_REG); + pc = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGPC_REG); + lsstat = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGLS0STAT_REG); + lsaddr = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGLS0ADDR_REG); + lsdata = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGLS0DATA_REG); + + } else { + stat = DPORT_REG_READ(DPORT_APP_CPU_RECORD_STATUS_REG); + pid = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PID_REG); + inst = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGINST_REG); + dstat = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGSTATUS_REG); + data = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGDATA_REG); + pc = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGPC_REG); + lsstat = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGLS0STAT_REG); + lsaddr = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGLS0ADDR_REG); + lsdata = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGLS0DATA_REG); + } + if (DPORT_RECORD_PDEBUGINST_SZ(inst) == 0 && + DPORT_RECORD_PDEBUGSTATUS_BBCAUSE(dstat) == DPORT_RECORD_PDEBUGSTATUS_BBCAUSE_WAITI) { + ESP_LOGW(TAG, "WDT reset info: %s CPU PC=0x%x (waiti mode)", cpu_name, pc); + } else { + ESP_LOGW(TAG, "WDT reset info: %s CPU PC=0x%x", cpu_name, pc); + } + ESP_LOGD(TAG, "WDT reset info: %s CPU STATUS 0x%08x", cpu_name, stat); + ESP_LOGD(TAG, "WDT reset info: %s CPU PID 0x%08x", cpu_name, pid); + ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGINST 0x%08x", cpu_name, inst); + ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGSTATUS 0x%08x", cpu_name, dstat); + ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGDATA 0x%08x", cpu_name, data); + ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGPC 0x%08x", cpu_name, pc); + ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0STAT 0x%08x", cpu_name, lsstat); + ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0ADDR 0x%08x", cpu_name, lsaddr); + ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0DATA 0x%08x", cpu_name, lsdata); +} + +static void wdt_reset_check(void) +{ + int wdt_rst = 0; + RESET_REASON rst_reas[2]; + + rst_reas[0] = rtc_get_reset_reason(0); + rst_reas[1] = rtc_get_reset_reason(1); + if (rst_reas[0] == RTCWDT_SYS_RESET || rst_reas[0] == TG0WDT_SYS_RESET || rst_reas[0] == TG1WDT_SYS_RESET || + rst_reas[0] == TGWDT_CPU_RESET || rst_reas[0] == RTCWDT_CPU_RESET) { + ESP_LOGW(TAG, "PRO CPU has been reset by WDT."); + wdt_rst = 1; + } + if (rst_reas[1] == RTCWDT_SYS_RESET || rst_reas[1] == TG0WDT_SYS_RESET || rst_reas[1] == TG1WDT_SYS_RESET || + rst_reas[1] == TGWDT_CPU_RESET || rst_reas[1] == RTCWDT_CPU_RESET) { + ESP_LOGW(TAG, "APP CPU has been reset by WDT."); + wdt_rst = 1; + } + if (wdt_rst) { + // if reset by WDT dump info from trace port + wdt_reset_info_dump(0); + wdt_reset_info_dump(1); + } + wdt_reset_cpu0_info_enable(); +} + +void __assert_func(const char *file, int line, const char *func, const char *expr) +{ + ESP_LOGE(TAG, "Assert failed in %s, %s:%d (%s)", func, file, line, expr); + while(1) {} +} diff --git a/components/bootloader_support/src/bootloader_utility.c b/components/bootloader_support/src/bootloader_utility.c new file mode 100644 index 000000000..883f937b0 --- /dev/null +++ b/components/bootloader_support/src/bootloader_utility.c @@ -0,0 +1,466 @@ +// Copyright 2018 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +#include +#include +#include +#include + +#include "esp_attr.h" +#include "esp_log.h" + +#include "rom/cache.h" +#include "rom/efuse.h" +#include "rom/ets_sys.h" +#include "rom/spi_flash.h" +#include "rom/crc.h" +#include "rom/rtc.h" +#include "rom/uart.h" +#include "rom/gpio.h" +#include "rom/secure_boot.h" + +#include "soc/soc.h" +#include "soc/cpu.h" +#include "soc/rtc.h" +#include "soc/dport_reg.h" +#include "soc/io_mux_reg.h" +#include "soc/efuse_reg.h" +#include "soc/rtc_cntl_reg.h" +#include "soc/timer_group_reg.h" +#include "soc/gpio_reg.h" +#include "soc/gpio_sig_map.h" + +#include "sdkconfig.h" +#include "esp_image_format.h" +#include "esp_secure_boot.h" +#include "esp_flash_encrypt.h" +#include "esp_flash_partitions.h" +#include "bootloader_flash.h" +#include "bootloader_random.h" +#include "bootloader_config.h" +#include "bootloader_common.h" + +static const char* TAG = "boot"; + +/* Reduce literal size for some generic string literals */ +#define MAP_ERR_MSG "Image contains multiple %s segments. Only the last one will be mapped." + +static void unpack_load_app(const esp_image_metadata_t *data); +static void set_cache_and_start_app(uint32_t drom_addr, + uint32_t drom_load_addr, + uint32_t drom_size, + uint32_t irom_addr, + uint32_t irom_load_addr, + uint32_t irom_size, + uint32_t entry_addr); + +bool bootloader_utility_load_partition_table(bootloader_state_t* bs) +{ + const esp_partition_info_t *partitions; + const int ESP_PARTITION_TABLE_DATA_LEN = 0xC00; /* length of actual data (signature is appended to this) */ + const char *partition_usage; + esp_err_t err; + int num_partitions; + +#ifdef CONFIG_SECURE_BOOT_ENABLED + if(esp_secure_boot_enabled()) { + ESP_LOGI(TAG, "Verifying partition table signature..."); + err = esp_secure_boot_verify_signature(ESP_PARTITION_TABLE_ADDR, ESP_PARTITION_TABLE_DATA_LEN); + if (err != ESP_OK) { + ESP_LOGE(TAG, "Failed to verify partition table signature."); + return false; + } + ESP_LOGD(TAG, "Partition table signature verified"); + } +#endif + + partitions = bootloader_mmap(ESP_PARTITION_TABLE_ADDR, ESP_PARTITION_TABLE_DATA_LEN); + if (!partitions) { + ESP_LOGE(TAG, "bootloader_mmap(0x%x, 0x%x) failed", ESP_PARTITION_TABLE_ADDR, ESP_PARTITION_TABLE_DATA_LEN); + return false; + } + ESP_LOGD(TAG, "mapped partition table 0x%x at 0x%x", ESP_PARTITION_TABLE_ADDR, (intptr_t)partitions); + + err = esp_partition_table_basic_verify(partitions, true, &num_partitions); + if (err != ESP_OK) { + ESP_LOGE(TAG, "Failed to verify partition table"); + return false; + } + + ESP_LOGI(TAG, "Partition Table:"); + ESP_LOGI(TAG, "## Label Usage Type ST Offset Length"); + + for(int i = 0; i < num_partitions; i++) { + const esp_partition_info_t *partition = &partitions[i]; + ESP_LOGD(TAG, "load partition table entry 0x%x", (intptr_t)partition); + ESP_LOGD(TAG, "type=%x subtype=%x", partition->type, partition->subtype); + partition_usage = "unknown"; + + /* valid partition table */ + switch(partition->type) { + case PART_TYPE_APP: /* app partition */ + switch(partition->subtype) { + case PART_SUBTYPE_FACTORY: /* factory binary */ + bs->factory = partition->pos; + partition_usage = "factory app"; + break; + case PART_SUBTYPE_TEST: /* test binary */ + bs->test = partition->pos; + partition_usage = "test app"; + break; + default: + /* OTA binary */ + if ((partition->subtype & ~PART_SUBTYPE_OTA_MASK) == PART_SUBTYPE_OTA_FLAG) { + bs->ota[partition->subtype & PART_SUBTYPE_OTA_MASK] = partition->pos; + ++bs->app_count; + partition_usage = "OTA app"; + } + else { + partition_usage = "Unknown app"; + } + break; + } + break; /* PART_TYPE_APP */ + case PART_TYPE_DATA: /* data partition */ + switch(partition->subtype) { + case PART_SUBTYPE_DATA_OTA: /* ota data */ + bs->ota_info = partition->pos; + partition_usage = "OTA data"; + break; + case PART_SUBTYPE_DATA_RF: + partition_usage = "RF data"; + break; + case PART_SUBTYPE_DATA_WIFI: + partition_usage = "WiFi data"; + break; + default: + partition_usage = "Unknown data"; + break; + } + break; /* PARTITION_USAGE_DATA */ + default: /* other partition type */ + break; + } + + /* print partition type info */ + ESP_LOGI(TAG, "%2d %-16s %-16s %02x %02x %08x %08x", i, partition->label, partition_usage, + partition->type, partition->subtype, + partition->pos.offset, partition->pos.size); + } + + bootloader_munmap(partitions); + + ESP_LOGI(TAG,"End of partition table"); + return true; +} + +/* Given a partition index, return the partition position data from the bootloader_state_t structure */ +static esp_partition_pos_t index_to_partition(const bootloader_state_t *bs, int index) +{ + if (index == FACTORY_INDEX) { + return bs->factory; + } + + if (index == TEST_APP_INDEX) { + return bs->test; + } + + if (index >= 0 && index < MAX_OTA_SLOTS && index < bs->app_count) { + return bs->ota[index]; + } + + esp_partition_pos_t invalid = { 0 }; + return invalid; +} + +static void log_invalid_app_partition(int index) +{ + const char *not_bootable = " is not bootable"; /* save a few string literal bytes */ + switch(index) { + case FACTORY_INDEX: + ESP_LOGE(TAG, "Factory app partition%s", not_bootable); + break; + case TEST_APP_INDEX: + ESP_LOGE(TAG, "Factory test app partition%s", not_bootable); + break; + default: + ESP_LOGE(TAG, "OTA app partition slot %d%s", index, not_bootable); + break; + } +} + +int bootloader_utility_get_selected_boot_partition(const bootloader_state_t *bs) +{ + esp_ota_select_entry_t sa,sb; + const esp_ota_select_entry_t *ota_select_map; + + if (bs->ota_info.offset != 0) { + // partition table has OTA data partition + if (bs->ota_info.size < 2 * SPI_SEC_SIZE) { + ESP_LOGE(TAG, "ota_info partition size %d is too small (minimum %d bytes)", bs->ota_info.size, sizeof(esp_ota_select_entry_t)); + return INVALID_INDEX; // can't proceed + } + + ESP_LOGD(TAG, "OTA data offset 0x%x", bs->ota_info.offset); + ota_select_map = bootloader_mmap(bs->ota_info.offset, bs->ota_info.size); + if (!ota_select_map) { + ESP_LOGE(TAG, "bootloader_mmap(0x%x, 0x%x) failed", bs->ota_info.offset, bs->ota_info.size); + return INVALID_INDEX; // can't proceed + } + memcpy(&sa, ota_select_map, sizeof(esp_ota_select_entry_t)); + memcpy(&sb, (uint8_t *)ota_select_map + SPI_SEC_SIZE, sizeof(esp_ota_select_entry_t)); + bootloader_munmap(ota_select_map); + + ESP_LOGD(TAG, "OTA sequence values A 0x%08x B 0x%08x", sa.ota_seq, sb.ota_seq); + if(sa.ota_seq == UINT32_MAX && sb.ota_seq == UINT32_MAX) { + ESP_LOGD(TAG, "OTA sequence numbers both empty (all-0xFF)"); + if (bs->factory.offset != 0) { + ESP_LOGI(TAG, "Defaulting to factory image"); + return FACTORY_INDEX; + } else { + ESP_LOGI(TAG, "No factory image, trying OTA 0"); + return 0; + } + } else { + bool ota_valid = false; + const char *ota_msg; + int ota_seq; // Raw OTA sequence number. May be more than # of OTA slots + if(bootloader_common_ota_select_valid(&sa) && bootloader_common_ota_select_valid(&sb)) { + ota_valid = true; + ota_msg = "Both OTA values"; + ota_seq = MAX(sa.ota_seq, sb.ota_seq) - 1; + } else if(bootloader_common_ota_select_valid(&sa)) { + ota_valid = true; + ota_msg = "Only OTA sequence A is"; + ota_seq = sa.ota_seq - 1; + } else if(bootloader_common_ota_select_valid(&sb)) { + ota_valid = true; + ota_msg = "Only OTA sequence B is"; + ota_seq = sb.ota_seq - 1; + } + + if (ota_valid) { + int ota_slot = ota_seq % bs->app_count; // Actual OTA partition selection + ESP_LOGD(TAG, "%s valid. Mapping seq %d -> OTA slot %d", ota_msg, ota_seq, ota_slot); + return ota_slot; + } else if (bs->factory.offset != 0) { + ESP_LOGE(TAG, "ota data partition invalid, falling back to factory"); + return FACTORY_INDEX; + } else { + ESP_LOGE(TAG, "ota data partition invalid and no factory, will try all partitions"); + return FACTORY_INDEX; + } + } + } + + // otherwise, start from factory app partition and let the search logic + // proceed from there + return FACTORY_INDEX; +} + +/* Return true if a partition has a valid app image that was successfully loaded */ +static bool try_load_partition(const esp_partition_pos_t *partition, esp_image_metadata_t *data) +{ + if (partition->size == 0) { + ESP_LOGD(TAG, "Can't boot from zero-length partition"); + return false; + } +#ifdef BOOTLOADER_BUILD + if (esp_image_load(ESP_IMAGE_LOAD, partition, data) == ESP_OK) { + ESP_LOGI(TAG, "Loaded app from partition at offset 0x%x", + partition->offset); + return true; + } +#endif + + return false; +} + +#define TRY_LOG_FORMAT "Trying partition index %d offs 0x%x size 0x%x" + +bool bootloader_utility_load_boot_image(const bootloader_state_t *bs, int start_index, esp_image_metadata_t *result) +{ + int index = start_index; + esp_partition_pos_t part; + + /* work backwards from start_index, down to the factory app */ + for(index = start_index; index >= FACTORY_INDEX; index--) { + part = index_to_partition(bs, index); + if (part.size == 0) { + continue; + } + ESP_LOGD(TAG, TRY_LOG_FORMAT, index, part.offset, part.size); + if (try_load_partition(&part, result)) { + return true; + } + log_invalid_app_partition(index); + } + + /* failing that work forwards from start_index, try valid OTA slots */ + for(index = start_index + 1; index < bs->app_count; index++) { + part = index_to_partition(bs, index); + if (part.size == 0) { + continue; + } + ESP_LOGD(TAG, TRY_LOG_FORMAT, index, part.offset, part.size); + if (try_load_partition(&part, result)) { + return true; + } + log_invalid_app_partition(index); + } + + if (try_load_partition(&bs->test, result)) { + ESP_LOGW(TAG, "Falling back to test app as only bootable partition"); + return true; + } + + ESP_LOGE(TAG, "No bootable app partitions in the partition table"); + bzero(result, sizeof(esp_image_metadata_t)); + return false; +} + +void bootloader_utility_load_image(const esp_image_metadata_t* image_data) +{ +#if defined(CONFIG_SECURE_BOOT_ENABLED) || defined(CONFIG_FLASH_ENCRYPTION_ENABLED) + esp_err_t err; +#endif +#ifdef CONFIG_SECURE_BOOT_ENABLED + /* Generate secure digest from this bootloader to protect future + modifications */ + ESP_LOGI(TAG, "Checking secure boot..."); + err = esp_secure_boot_permanently_enable(); + if (err != ESP_OK) { + ESP_LOGE(TAG, "Bootloader digest generation failed (%d). SECURE BOOT IS NOT ENABLED.", err); + /* Allow booting to continue, as the failure is probably + due to user-configured EFUSEs for testing... + */ + } +#endif + +#ifdef CONFIG_FLASH_ENCRYPTION_ENABLED + /* encrypt flash */ + ESP_LOGI(TAG, "Checking flash encryption..."); + bool flash_encryption_enabled = esp_flash_encryption_enabled(); + err = esp_flash_encrypt_check_and_update(); + if (err != ESP_OK) { + ESP_LOGE(TAG, "Flash encryption check failed (%d).", err); + return; + } + + if (!flash_encryption_enabled && esp_flash_encryption_enabled()) { + /* Flash encryption was just enabled for the first time, + so issue a system reset to ensure flash encryption + cache resets properly */ + ESP_LOGI(TAG, "Resetting with flash encryption enabled..."); + REG_WRITE(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_SYS_RST); + return; + } +#endif + + ESP_LOGI(TAG, "Disabling RNG early entropy source..."); + bootloader_random_disable(); + + // copy loaded segments to RAM, set up caches for mapped segments, and start application + unpack_load_app(image_data); +} + +static void unpack_load_app(const esp_image_metadata_t* data) +{ + uint32_t drom_addr = 0; + uint32_t drom_load_addr = 0; + uint32_t drom_size = 0; + uint32_t irom_addr = 0; + uint32_t irom_load_addr = 0; + uint32_t irom_size = 0; + + // Find DROM & IROM addresses, to configure cache mappings + for (int i = 0; i < data->image.segment_count; i++) { + const esp_image_segment_header_t *header = &data->segments[i]; + if (header->load_addr >= SOC_IROM_LOW && header->load_addr < SOC_IROM_HIGH) { + if (drom_addr != 0) { + ESP_LOGE(TAG, MAP_ERR_MSG, "DROM"); + } else { + ESP_LOGD(TAG, "Mapping segment %d as %s", i, "DROM"); + } + drom_addr = data->segment_data[i]; + drom_load_addr = header->load_addr; + drom_size = header->data_len; + } + if (header->load_addr >= SOC_DROM_LOW && header->load_addr < SOC_DROM_HIGH) { + if (irom_addr != 0) { + ESP_LOGE(TAG, MAP_ERR_MSG, "IROM"); + } else { + ESP_LOGD(TAG, "Mapping segment %d as %s", i, "IROM"); + } + irom_addr = data->segment_data[i]; + irom_load_addr = header->load_addr; + irom_size = header->data_len; + } + } + + ESP_LOGD(TAG, "calling set_cache_and_start_app"); + set_cache_and_start_app(drom_addr, + drom_load_addr, + drom_size, + irom_addr, + irom_load_addr, + irom_size, + data->image.entry_addr); +} + +static void set_cache_and_start_app( + uint32_t drom_addr, + uint32_t drom_load_addr, + uint32_t drom_size, + uint32_t irom_addr, + uint32_t irom_load_addr, + uint32_t irom_size, + uint32_t entry_addr) +{ + ESP_LOGD(TAG, "configure drom and irom and start"); + Cache_Read_Disable( 0 ); + Cache_Flush( 0 ); + + /* Clear the MMU entries that are already set up, + so the new app only has the mappings it creates. + */ + for (int i = 0; i < DPORT_FLASH_MMU_TABLE_SIZE; i++) { + DPORT_PRO_FLASH_MMU_TABLE[i] = DPORT_FLASH_MMU_TABLE_INVALID_VAL; + } + + uint32_t drom_page_count = (drom_size + 64*1024 - 1) / (64*1024); // round up to 64k + ESP_LOGV(TAG, "d mmu set paddr=%08x vaddr=%08x size=%d n=%d", drom_addr & 0xffff0000, drom_load_addr & 0xffff0000, drom_size, drom_page_count ); + int rc = cache_flash_mmu_set( 0, 0, drom_load_addr & 0xffff0000, drom_addr & 0xffff0000, 64, drom_page_count ); + ESP_LOGV(TAG, "rc=%d", rc ); + rc = cache_flash_mmu_set( 1, 0, drom_load_addr & 0xffff0000, drom_addr & 0xffff0000, 64, drom_page_count ); + ESP_LOGV(TAG, "rc=%d", rc ); + uint32_t irom_page_count = (irom_size + 64*1024 - 1) / (64*1024); // round up to 64k + ESP_LOGV(TAG, "i mmu set paddr=%08x vaddr=%08x size=%d n=%d", irom_addr & 0xffff0000, irom_load_addr & 0xffff0000, irom_size, irom_page_count ); + rc = cache_flash_mmu_set( 0, 0, irom_load_addr & 0xffff0000, irom_addr & 0xffff0000, 64, irom_page_count ); + ESP_LOGV(TAG, "rc=%d", rc ); + rc = cache_flash_mmu_set( 1, 0, irom_load_addr & 0xffff0000, irom_addr & 0xffff0000, 64, irom_page_count ); + ESP_LOGV(TAG, "rc=%d", rc ); + DPORT_REG_CLR_BIT( DPORT_PRO_CACHE_CTRL1_REG, (DPORT_PRO_CACHE_MASK_IRAM0) | (DPORT_PRO_CACHE_MASK_IRAM1 & 0) | (DPORT_PRO_CACHE_MASK_IROM0 & 0) | DPORT_PRO_CACHE_MASK_DROM0 | DPORT_PRO_CACHE_MASK_DRAM1 ); + DPORT_REG_CLR_BIT( DPORT_APP_CACHE_CTRL1_REG, (DPORT_APP_CACHE_MASK_IRAM0) | (DPORT_APP_CACHE_MASK_IRAM1 & 0) | (DPORT_APP_CACHE_MASK_IROM0 & 0) | DPORT_APP_CACHE_MASK_DROM0 | DPORT_APP_CACHE_MASK_DRAM1 ); + Cache_Read_Enable( 0 ); + + // Application will need to do Cache_Flush(1) and Cache_Read_Enable(1) + + ESP_LOGD(TAG, "start: 0x%08x", entry_addr); + typedef void (*entry_t)(void); + entry_t entry = ((entry_t) entry_addr); + + // TODO: we have used quite a bit of stack at this point. + // use "movsp" instruction to reset stack back to where ROM stack starts. + (*entry)(); +} diff --git a/components/bootloader/subproject/main/flash_qio_mode.c b/components/bootloader_support/src/flash_qio_mode.c similarity index 100% rename from components/bootloader/subproject/main/flash_qio_mode.c rename to components/bootloader_support/src/flash_qio_mode.c diff --git a/docs/en/api-guides/bootloader.rst b/docs/en/api-guides/bootloader.rst new file mode 100644 index 000000000..0b4509e64 --- /dev/null +++ b/docs/en/api-guides/bootloader.rst @@ -0,0 +1,15 @@ +Bootloader +===================== + +Bootloader performs the following functions: + +1. Minimal initial configuration of internal modules; +2. Select the application partition to boot, based on the partition table and ota_data (if any); +3. Load this image to RAM (IRAM & DRAM) and transfer management to it. + +Bootloader is located at the address `0x1000` in the flash. + +Customer bootloader +--------------------- +The current bootloader implementation allows the customer to override it. To do this, you must copy the folder `/esp-idf/components/bootloader` and then edit `/your_project/components/bootloader/subproject/main/bootloader_main.c`. + diff --git a/docs/en/api-guides/index.rst b/docs/en/api-guides/index.rst index e219ab116..3e8b2ece5 100644 --- a/docs/en/api-guides/index.rst +++ b/docs/en/api-guides/index.rst @@ -13,6 +13,7 @@ API Guides Thread Local Storage High Level Interrupts JTAG Debugging + Bootloader Partition Tables Secure Boot <../security/secure-boot> ULP Coprocessor diff --git a/docs/zh_CN/api-guides/bootloader.rst b/docs/zh_CN/api-guides/bootloader.rst new file mode 100644 index 000000000..5609a8e30 --- /dev/null +++ b/docs/zh_CN/api-guides/bootloader.rst @@ -0,0 +1 @@ +.. include:: ../../en/api-guides/bootloader.rst \ No newline at end of file