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bugfix(uart): fix esp32 uart fifo_cnt bug

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When using DPort to read fifo, fifo_cnt is not credible, we need to calculate the real cnt based on the fifo read and write pointer. When using AHB to read FIFO, we can use fifo_cnt to indicate the data length in fifo.
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xiongyu 2020-06-03 12:24:55 +08:00
parent 695ad84654
commit f75088d40d
1 changed files with 11 additions and 0 deletions
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11
components/driver/uart.c
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@ -885,6 +885,17 @@ static void uart_rx_intr_handler_default(void *param)
|| (uart_intr_status & UART_AT_CMD_CHAR_DET_INT_ST_M) || (uart_intr_status & UART_AT_CMD_CHAR_DET_INT_ST_M)
) { ) {
rx_fifo_len = uart_reg->status.rxfifo_cnt; rx_fifo_len = uart_reg->status.rxfifo_cnt;
typeof(uart_reg->mem_rx_status) rx_status = uart_reg->mem_rx_status;
// When using DPort to read fifo, fifo_cnt is not credible, we need to calculate the real cnt based on the fifo read and write pointer.
// When using AHB to read FIFO, we can use fifo_cnt to indicate the data length in fifo.
if (rx_status.wr_addr > rx_status.rd_addr) {
rx_fifo_len = rx_status.wr_addr - rx_status.rd_addr;
} else if (rx_status.wr_addr < rx_status.rd_addr) {
rx_fifo_len = (rx_status.wr_addr + 128) - rx_status.rd_addr;
} else {
rx_fifo_len = rx_fifo_len > 0 ? 128 : 0;
}
if(pat_flg == 1) { if(pat_flg == 1) {
uart_intr_status |= UART_AT_CMD_CHAR_DET_INT_ST_M; uart_intr_status |= UART_AT_CMD_CHAR_DET_INT_ST_M;
pat_flg = 0; pat_flg = 0;