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esp32: panic: do digital reset if cache error interrupt is set

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Even if frame->exccause != PANIC_RSN_CACHEERR, it is possible that
the cache error interrupt status is set. For example, this may happen
due to an invalid cache access in the panic handler itself.
Check cache error interrupt status instead of frame->exccause to
decide whether to do CPU reset or digital reset.

Also remove unnecessary esp_dport_access_int_pause from
esp_cache_err_get_cpuid, since the panic handler already calls
esp_dport_access_int_abort on entry.
This commit is contained in:
Ivan Grokhotkov 2019-12-19 23:24:28 +01:00
parent acca61c714
commit f52952cb45
2 changed files with 1 additions and 2 deletions
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1
components/esp32/cache_err_int.c
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@ -72,7 +72,6 @@ void esp_cache_err_int_init(void)
int IRAM_ATTR esp_cache_err_get_cpuid(void)
{
esp_dport_access_int_pause();
const uint32_t pro_mask =
DPORT_PRO_CPU_DISABLED_CACHE_IA_DRAM1 |
DPORT_PRO_CPU_DISABLED_CACHE_IA_DROM0 |

2
components/esp32/panic.c
View file

@ -642,7 +642,7 @@ static __attribute__((noreturn)) void commonErrorHandler(XtExcFrame *frame)
rtc_wdt_disable();
#if CONFIG_ESP32_PANIC_PRINT_REBOOT || CONFIG_ESP32_PANIC_SILENT_REBOOT
panicPutStr("Rebooting...\r\n");
if (frame->exccause != PANIC_RSN_CACHEERR) {
if (esp_cache_err_get_cpuid() == -1) {
esp_restart_noos();
} else {
// The only way to clear invalid cache access interrupt is to reset the digital part