Merge branch 'bugfix/i2s_bck_polariy' into 'master'
bugfix(i2s): fix bck polarity issue when using pll clock. See merge request !1428
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commit
f039aac1e5
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@ -344,6 +344,7 @@ esp_err_t i2s_set_clk(i2s_port_t i2s_num, uint32_t rate, i2s_bits_per_sample_t b
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i2s_stop(i2s_num);
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i2s_stop(i2s_num);
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uint32_t cur_mode = 0;
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uint32_t cur_mode = 0;
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if (p_i2s_obj[i2s_num]->channel_num != ch) {
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if (p_i2s_obj[i2s_num]->channel_num != ch) {
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p_i2s_obj[i2s_num]->channel_num = (ch == 2) ? 2 : 1;
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p_i2s_obj[i2s_num]->channel_num = (ch == 2) ? 2 : 1;
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@ -682,6 +683,11 @@ esp_err_t i2s_stop(i2s_port_t i2s_num)
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I2S[i2s_num]->lc_conf.in_rst = 0;
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I2S[i2s_num]->lc_conf.in_rst = 0;
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I2S[i2s_num]->lc_conf.out_rst = 1;
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I2S[i2s_num]->lc_conf.out_rst = 1;
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I2S[i2s_num]->lc_conf.out_rst = 0;
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I2S[i2s_num]->lc_conf.out_rst = 0;
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I2S[i2s_num]->conf.tx_reset = 1;
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I2S[i2s_num]->conf.tx_reset = 0;
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I2S[i2s_num]->conf.rx_reset = 1;
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I2S[i2s_num]->conf.rx_reset = 0;
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I2S_EXIT_CRITICAL();
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I2S_EXIT_CRITICAL();
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return 0;
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return 0;
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}
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}
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