From 61778d5b7cfe83311584a3b72ece3f1ffe59f8bf Mon Sep 17 00:00:00 2001 From: xiongyu Date: Tue, 31 Dec 2019 15:59:12 +0800 Subject: [PATCH] bugfix(i2s): fix adc output invert issue --- components/soc/include/hal/adc_hal.h | 2 +- components/soc/src/esp32/include/hal/adc_ll.h | 18 ++++++++++++++++-- .../soc/src/esp32s2/include/hal/adc_ll.h | 18 ++++++++++++++++-- components/soc/src/hal/adc_hal.c | 10 ++++++++-- 4 files changed, 41 insertions(+), 7 deletions(-) diff --git a/components/soc/include/hal/adc_hal.h b/components/soc/include/hal/adc_hal.h index 87317b562..a8597a5ea 100644 --- a/components/soc/include/hal/adc_hal.h +++ b/components/soc/include/hal/adc_hal.h @@ -59,7 +59,7 @@ void adc_hal_init(void); * * @prarm adc_n ADC unit. */ -#define adc_hal_output_invert(adc_n, inv_en) adc_ll_output_invert(adc_n, inv_en) +void adc_hal_output_invert(adc_ll_num_t adc_n, bool inv_en); /** * Set ADC module controller. diff --git a/components/soc/src/esp32/include/hal/adc_ll.h b/components/soc/src/esp32/include/hal/adc_ll.h index 2d3c6c982..019d4164d 100644 --- a/components/soc/src/esp32/include/hal/adc_ll.h +++ b/components/soc/src/esp32/include/hal/adc_ll.h @@ -435,11 +435,11 @@ static inline void adc_ll_set_atten(adc_ll_num_t adc_n, adc_channel_t channel, a } /** - * ADC module output data invert or not. + * ADC module RTC output data invert or not. * * @prarm adc_n ADC unit. */ -static inline void adc_ll_output_invert(adc_ll_num_t adc_n, bool inv_en) +static inline void adc_ll_rtc_output_invert(adc_ll_num_t adc_n, bool inv_en) { if (adc_n == ADC_NUM_1) { SENS.sar_read_ctrl.sar1_data_inv = inv_en; // Enable / Disable ADC data invert @@ -448,6 +448,20 @@ static inline void adc_ll_output_invert(adc_ll_num_t adc_n, bool inv_en) } } +/** + * ADC module Digital output data invert or not. + * + * @prarm adc_n ADC unit. + */ +static inline void adc_ll_dig_output_invert(adc_ll_num_t adc_n, bool inv_en) +{ + if (adc_n == ADC_NUM_1) { + SYSCON.saradc_ctrl2.sar1_inv = inv_en; // Enable / Disable ADC data invert + } else { // adc_n == ADC_NUM_2 + SYSCON.saradc_ctrl2.sar2_inv = inv_en; // Enable / Disable ADC data invert + } +} + /** * Set ADC module controller. * There are five SAR ADC controllers: diff --git a/components/soc/src/esp32s2/include/hal/adc_ll.h b/components/soc/src/esp32s2/include/hal/adc_ll.h index cc0d615e7..5ad1bd5d5 100644 --- a/components/soc/src/esp32s2/include/hal/adc_ll.h +++ b/components/soc/src/esp32s2/include/hal/adc_ll.h @@ -436,11 +436,11 @@ static inline void adc_ll_set_atten(adc_ll_num_t adc_n, adc_channel_t channel, a } /** - * ADC module output data invert or not. + * ADC module RTC output data invert or not. * * @prarm adc_n ADC unit. */ -static inline void adc_ll_output_invert(adc_ll_num_t adc_n, bool inv_en) +static inline void adc_ll_rtc_output_invert(adc_ll_num_t adc_n, bool inv_en) { if (adc_n == ADC_NUM_1) { SENS.sar_reader1_ctrl.sar1_data_inv = inv_en; // Enable / Disable ADC data invert @@ -449,6 +449,20 @@ static inline void adc_ll_output_invert(adc_ll_num_t adc_n, bool inv_en) } } +/** + * ADC module Digital output data invert or not. + * + * @prarm adc_n ADC unit. + */ +static inline void adc_ll_dig_output_invert(adc_ll_num_t adc_n, bool inv_en) +{ + if (adc_n == ADC_NUM_1) { + APB_CTRL.saradc_ctrl2.sar1_inv = inv_en; // Enable / Disable ADC data invert + } else { // adc_n == ADC_NUM_2 + APB_CTRL.saradc_ctrl2.sar2_inv = inv_en; // Enable / Disable ADC data invert + } +} + /** * Set ADC module controller. * There are five SAR ADC controllers: diff --git a/components/soc/src/hal/adc_hal.c b/components/soc/src/hal/adc_hal.c index bd016668e..9867ed26e 100644 --- a/components/soc/src/hal/adc_hal.c +++ b/components/soc/src/hal/adc_hal.c @@ -21,8 +21,8 @@ void adc_hal_init(void) adc_ll_dig_set_fsm_time(SOC_ADC_FSM_RSTB_WAIT_DEFAULT, SOC_ADC_FSM_START_WAIT_DEFAULT, SOC_ADC_FSM_STANDBY_WAIT_DEFAULT); adc_ll_dig_set_sample_cycle(ADC_FSM_SAMPLE_CYCLE_DEFAULT); - adc_ll_output_invert(ADC_NUM_1, SOC_ADC1_DATA_INVERT_DEFAULT); - adc_ll_output_invert(ADC_NUM_2, SOC_ADC2_DATA_INVERT_DEFAULT); + adc_hal_output_invert(ADC_NUM_1, SOC_ADC1_DATA_INVERT_DEFAULT); + adc_hal_output_invert(ADC_NUM_2, SOC_ADC2_DATA_INVERT_DEFAULT); } void adc_hal_dig_controller_config(const adc_hal_dig_config_t *cfg) @@ -80,4 +80,10 @@ int adc_hal_hall_convert(void) Sens_Vn1 = adc_hal_convert( ADC_NUM_1, ADC_CHANNEL_3 ); hall_value = (Sens_Vp1 - Sens_Vp0) - (Sens_Vn1 - Sens_Vn0); return hall_value; +} + +void adc_hal_output_invert(adc_ll_num_t adc_n, bool inv_en) +{ + adc_ll_rtc_output_invert(adc_n, inv_en); + adc_ll_dig_output_invert(adc_n, inv_en); } \ No newline at end of file