1. Change the deep sleep stub code to fix wake bug.

This commit is contained in:
xiaxiaotian 2016-09-28 11:52:39 +08:00
parent 103a2a0079
commit ec03c31ec4
3 changed files with 6 additions and 3 deletions

View file

@ -42,7 +42,6 @@
#include "esp_spi_flash.h" #include "esp_spi_flash.h"
#include "esp_ipc.h" #include "esp_ipc.h"
#include "esp_log.h" #include "esp_log.h"
#include "esp_deepsleep.h"
void start_cpu0(void) __attribute__((weak, alias("start_cpu0_default"))); void start_cpu0(void) __attribute__((weak, alias("start_cpu0_default")));
void start_cpu0_default(void) IRAM_ATTR; void start_cpu0_default(void) IRAM_ATTR;

View file

@ -7,6 +7,7 @@
#include "rom/cache.h" #include "rom/cache.h"
#include "rom/rtc.h" #include "rom/rtc.h"
#include "soc/rtc_cntl_reg.h" #include "soc/rtc_cntl_reg.h"
#include "soc/dport_reg.h"
#include "esp_attr.h" #include "esp_attr.h"
#include "esp_deepsleep.h" #include "esp_deepsleep.h"
@ -39,7 +40,10 @@ void esp_set_deep_sleep_wake_stub(esp_deep_sleep_wake_stub_fn_t new_stub)
} }
void RTC_IRAM_ATTR esp_default_wake_deep_sleep(void) { void RTC_IRAM_ATTR esp_default_wake_deep_sleep(void) {
mmu_init(0); //
//mmu_init(0);
REG_SET_BIT(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CACHE_MMU_IA_CLR);
REG_CLR_BIT(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CACHE_MMU_IA_CLR);
} }
void __attribute__((weak, alias("esp_default_wake_deep_sleep"))) esp_wake_deep_sleep(void); void __attribute__((weak, alias("esp_default_wake_deep_sleep"))) esp_wake_deep_sleep(void);

View file

@ -161,7 +161,7 @@ WAKEUP_REASON rtc_get_wakeup_cause(void);
* *
* @param uint32_t start_addr : 0 - 0x7ff for Fast RTC Memory. * @param uint32_t start_addr : 0 - 0x7ff for Fast RTC Memory.
* *
* @param uint32_t crc_len : 0 - 0x7ff, 0 for 1 byte, 0x7ff for 0x800 byte. * @param uint32_t crc_len : 0 - 0x7ff, 0 for 4 byte, 0x7ff for 0x2000 byte.
* *
* @return uint32_t : CRC32 result * @return uint32_t : CRC32 result
*/ */