esp32, esp32s2: update console initialization
This commit is contained in:
parent
fc8cd4048d
commit
e94848556b
7 changed files with 76 additions and 12 deletions
|
@ -498,6 +498,14 @@ menu "ESP32S2-specific"
|
|||
If enabled, this disables the linking of binary libraries in the application build. Note
|
||||
that after enabling this Wi-Fi/Bluetooth will not work.
|
||||
|
||||
config ESP32S2_KEEP_USB_ALIVE
|
||||
bool "Keep USB peripheral enabled at start up" if !ESP_CONSOLE_USB_CDC
|
||||
default y if ESP_CONSOLE_USB_CDC
|
||||
help
|
||||
During the application initialization process, all the peripherals except UARTs and timers
|
||||
are reset. Enable this option to keep USB peripheral enabled.
|
||||
This option is automatically enabled if "USB CDC" console is selected.
|
||||
|
||||
config ESP32S2_RTCDATA_IN_FAST_MEM
|
||||
bool "Place RTC_DATA_ATTR and RTC_RODATA_ATTR variables into RTC fast memory segment"
|
||||
default n
|
||||
|
|
|
@ -3,4 +3,25 @@ archive: libesp_system.a
|
|||
entries:
|
||||
panic (noflash)
|
||||
panic_handler (noflash)
|
||||
system_api:esp_system_abort (noflash)
|
||||
reset_reason (noflash)
|
||||
system_api:esp_system_abort (noflash)
|
||||
|
||||
if ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF:
|
||||
usb_console:esp_usb_console_write_char (noflash)
|
||||
usb_console:esp_usb_console_write_buf (noflash)
|
||||
usb_console:esp_usb_console_flush_internal (noflash)
|
||||
usb_console:esp_usb_console_osglue_wait_proc (noflash)
|
||||
usb_console:esp_usb_console_osglue_dis_int (noflash)
|
||||
usb_console:esp_usb_console_osglue_ena_int (noflash)
|
||||
usb_console:esp_usb_console_interrupt (noflash)
|
||||
usb_console:esp_usb_console_poll_interrupts (noflash)
|
||||
usb_console:esp_usb_console_cdc_acm_cb (noflash)
|
||||
usb_console:esp_usb_console_dfu_detach_cb (noflash)
|
||||
usb_console:esp_usb_console_before_restart (noflash)
|
||||
|
||||
[mapping:vfs_cdcacm]
|
||||
archive: libvfs.a
|
||||
entries:
|
||||
if ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF:
|
||||
vfs_cdcacm:cdcacm_tx_cb (noflash)
|
||||
vfs_cdcacm:cdcacm_rx_cb (noflash)
|
||||
|
|
|
@ -19,6 +19,7 @@
|
|||
#include "esp_spi_flash.h"
|
||||
#include "esp_private/system_internal.h"
|
||||
#include "esp_private/gdbstub.h"
|
||||
#include "esp_private/usb_console.h"
|
||||
#include "esp_ota_ops.h"
|
||||
|
||||
#if CONFIG_APPTRACE_ENABLE
|
||||
|
@ -62,6 +63,7 @@ static wdt_hal_context_t wdt1_context = {.inst = WDT_MWDT1, .mwdt_dev = &TIMERG1
|
|||
|
||||
#if !CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT
|
||||
|
||||
#if CONFIG_ESP_CONSOLE_UART
|
||||
static uart_hal_context_t s_panic_uart = { .dev = CONFIG_ESP_CONSOLE_UART_NUM == 0 ? &UART0 : &UART1 };
|
||||
|
||||
void panic_print_char(const char c)
|
||||
|
@ -70,6 +72,23 @@ void panic_print_char(const char c)
|
|||
while(!uart_hal_get_txfifo_len(&s_panic_uart));
|
||||
uart_hal_write_txfifo(&s_panic_uart, (uint8_t*) &c, 1, &sz);
|
||||
}
|
||||
#endif // CONFIG_ESP_CONSOLE_UART
|
||||
|
||||
|
||||
#if CONFIG_ESP_CONSOLE_USB_CDC
|
||||
void panic_print_char(const char c)
|
||||
{
|
||||
esp_usb_console_write_buf(&c, 1);
|
||||
/* result ignored */
|
||||
}
|
||||
#endif // CONFIG_ESP_CONSOLE_USB_CDC
|
||||
|
||||
#if CONFIG_ESP_CONSOLE_NONE
|
||||
void panic_print_char(const char c)
|
||||
{
|
||||
/* no-op */
|
||||
}
|
||||
#endif // CONFIG_ESP_CONSOLE_NONE
|
||||
|
||||
void panic_print_str(const char *str)
|
||||
{
|
||||
|
|
|
@ -355,7 +355,7 @@ void IRAM_ATTR call_start_cpu0(void)
|
|||
esp_perip_clk_init();
|
||||
intr_matrix_clear();
|
||||
|
||||
#ifndef CONFIG_ESP_CONSOLE_UART_NONE
|
||||
#ifdef CONFIG_ESP_CONSOLE_UART
|
||||
const int uart_clk_freq = APB_CLK_FREQ;
|
||||
uart_div_modify(CONFIG_ESP_CONSOLE_UART_NUM, (uart_clk_freq << 4) / CONFIG_ESP_CONSOLE_UART_BAUDRATE);
|
||||
#endif
|
||||
|
|
|
@ -187,7 +187,9 @@ void esp_clk_init(void)
|
|||
|
||||
// Wait for UART TX to finish, otherwise some UART output will be lost
|
||||
// when switching APB frequency
|
||||
uart_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM);
|
||||
if (CONFIG_ESP_CONSOLE_UART_NUM >= 0) {
|
||||
uart_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM);
|
||||
}
|
||||
|
||||
rtc_clk_cpu_freq_set_config(&new_config);
|
||||
|
||||
|
|
|
@ -132,7 +132,9 @@ void esp_clk_init(void)
|
|||
|
||||
// Wait for UART TX to finish, otherwise some UART output will be lost
|
||||
// when switching APB frequency
|
||||
uart_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM);
|
||||
if (CONFIG_ESP_CONSOLE_UART_NUM >= 0) {
|
||||
uart_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM);
|
||||
}
|
||||
|
||||
rtc_clk_cpu_freq_set_config(&new_config);
|
||||
|
||||
|
@ -271,7 +273,9 @@ void esp_perip_clk_init(void)
|
|||
#if CONFIG_ESP_CONSOLE_UART_NUM != 1
|
||||
DPORT_UART1_CLK_EN |
|
||||
#endif
|
||||
#ifndef CONFIG_ESP32S2_KEEP_USB_ALIVE
|
||||
DPORT_USB_CLK_EN |
|
||||
#endif
|
||||
DPORT_SPI2_CLK_EN |
|
||||
DPORT_I2C_EXT0_CLK_EN |
|
||||
DPORT_UHCI0_CLK_EN |
|
||||
|
|
|
@ -50,6 +50,9 @@
|
|||
#include "esp_pm.h"
|
||||
#include "esp_private/pm_impl.h"
|
||||
#include "esp_pthread.h"
|
||||
#include "esp_private/usb_console.h"
|
||||
#include "esp_vfs_cdcacm.h"
|
||||
|
||||
|
||||
// [refactor-todo] make this file completely target-independent
|
||||
#if CONFIG_IDF_TARGET_ESP32
|
||||
|
@ -195,18 +198,25 @@ static void IRAM_ATTR do_core_init(void)
|
|||
#endif
|
||||
|
||||
#ifdef CONFIG_VFS_SUPPORT_IO
|
||||
#ifdef CONFIG_ESP_CONSOLE_UART
|
||||
esp_vfs_dev_uart_register();
|
||||
const char *default_stdio_dev = "/dev/uart/" STRINGIFY(CONFIG_ESP_CONSOLE_UART_NUM);
|
||||
#endif // CONFIG_ESP_CONSOLE_UART
|
||||
#ifdef CONFIG_ESP_CONSOLE_USB_CDC
|
||||
ESP_ERROR_CHECK(esp_usb_console_init());
|
||||
ESP_ERROR_CHECK(esp_vfs_dev_cdcacm_register());
|
||||
const char *default_stdio_dev = "/dev/cdcacm";
|
||||
#endif // CONFIG_ESP_CONSOLE_USB_CDC
|
||||
#endif // CONFIG_VFS_SUPPORT_IO
|
||||
|
||||
#if defined(CONFIG_VFS_SUPPORT_IO) && !defined(CONFIG_ESP_CONSOLE_UART_NONE)
|
||||
#if defined(CONFIG_VFS_SUPPORT_IO) && !defined(CONFIG_ESP_CONSOLE_NONE)
|
||||
esp_reent_init(_GLOBAL_REENT);
|
||||
const char *default_uart_dev = "/dev/uart/" STRINGIFY(CONFIG_ESP_CONSOLE_UART_NUM);
|
||||
_GLOBAL_REENT->_stdin = fopen(default_uart_dev, "r");
|
||||
_GLOBAL_REENT->_stdout = fopen(default_uart_dev, "w");
|
||||
_GLOBAL_REENT->_stderr = fopen(default_uart_dev, "w");
|
||||
#else // defined(CONFIG_VFS_SUPPORT_IO) && !defined(CONFIG_ESP_CONSOLE_UART_NONE)
|
||||
_GLOBAL_REENT->_stdin = fopen(default_stdio_dev, "r");
|
||||
_GLOBAL_REENT->_stdout = fopen(default_stdio_dev, "w");
|
||||
_GLOBAL_REENT->_stderr = fopen(default_stdio_dev, "w");
|
||||
#else // defined(CONFIG_VFS_SUPPORT_IO) && !defined(CONFIG_ESP_CONSOLE_NONE)
|
||||
_REENT_SMALL_CHECK_INIT(_GLOBAL_REENT);
|
||||
#endif // defined(CONFIG_VFS_SUPPORT_IO) && !defined(CONFIG_ESP_CONSOLE_UART_NONE)
|
||||
#endif // defined(CONFIG_VFS_SUPPORT_IO) && !defined(CONFIG_ESP_CONSOLE_NONE)
|
||||
|
||||
#ifdef CONFIG_SECURE_FLASH_ENC_ENABLED
|
||||
esp_flash_encryption_init_checks();
|
||||
|
@ -337,7 +347,7 @@ void IRAM_ATTR start_cpu0_default(void)
|
|||
|
||||
IRAM_ATTR ESP_SYSTEM_INIT_FN(init_components0, BIT(0))
|
||||
{
|
||||
#ifdef CONFIG_PM_ENABLE
|
||||
#if defined(CONFIG_PM_ENABLE) && defined(CONFIG_ESP_CONSOLE_UART)
|
||||
const int uart_clk_freq = REF_CLK_FREQ;
|
||||
/* When DFS is enabled, use REFTICK as UART clock source */
|
||||
CLEAR_PERI_REG_MASK(UART_CONF0_REG(CONFIG_ESP_CONSOLE_UART_NUM), UART_TICK_REF_ALWAYS_ON);
|
||||
|
|
Loading…
Reference in a new issue