Merge branch 'bugfix/spi_cs_setup_fulldup' into 'master'
fix(spi_master): allow to use cs_ena_pretrans in full duplex mode without… See merge request idf/esp-idf!2576
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commit
e5d2406b1d
2 changed files with 20 additions and 10 deletions
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@ -333,8 +333,7 @@ esp_err_t spi_bus_add_device(spi_host_device_t host, const spi_device_interface_
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SPI_CHECK(freecs!=NO_CS, "no free cs pins for host", ESP_ERR_NOT_FOUND);
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SPI_CHECK(freecs!=NO_CS, "no free cs pins for host", ESP_ERR_NOT_FOUND);
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//The hardware looks like it would support this, but actually setting cs_ena_pretrans when transferring in full
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//The hardware looks like it would support this, but actually setting cs_ena_pretrans when transferring in full
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//duplex mode does absolutely nothing on the ESP32.
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//duplex mode does absolutely nothing on the ESP32.
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SPI_CHECK(dev_config->cs_ena_pretrans <= 1 || (dev_config->flags & SPI_DEVICE_HALFDUPLEX), "cs pretrans delay > 1 incompatible with full-duplex", ESP_ERR_INVALID_ARG);
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SPI_CHECK( dev_config->cs_ena_pretrans <= 1 || (dev_config->address_bits == 0 && dev_config->command_bits == 0) ||
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SPI_CHECK( dev_config->cs_ena_pretrans != 1 || (dev_config->address_bits == 0 && dev_config->command_bits == 0) ||
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(dev_config->flags & SPI_DEVICE_HALFDUPLEX), "In full-duplex mode, only support cs pretrans delay = 1 and without address_bits and command_bits", ESP_ERR_INVALID_ARG);
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(dev_config->flags & SPI_DEVICE_HALFDUPLEX), "In full-duplex mode, only support cs pretrans delay = 1 and without address_bits and command_bits", ESP_ERR_INVALID_ARG);
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duty_cycle = (dev_config->duty_cycle_pos==0? 128: dev_config->duty_cycle_pos);
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duty_cycle = (dev_config->duty_cycle_pos==0? 128: dev_config->duty_cycle_pos);
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@ -711,17 +710,26 @@ static void SPI_MASTER_ISR_ATTR spi_intr(void *arg)
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//Configure bit sizes, load addr and command
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//Configure bit sizes, load addr and command
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int cmdlen;
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int cmdlen;
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if ( trans->flags & SPI_TRANS_VARIABLE_CMD ) {
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int addrlen;
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cmdlen = ((spi_transaction_ext_t*)trans)->command_bits;
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if (!(dev->cfg.flags & SPI_DEVICE_HALFDUPLEX) && dev->cfg.cs_ena_pretrans != 0) {
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/* The command and address phase is not compatible with cs_ena_pretrans
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* in full duplex mode.
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*/
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cmdlen = 0;
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addrlen = 0;
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} else {
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if (trans->flags & SPI_TRANS_VARIABLE_CMD) {
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cmdlen = ((spi_transaction_ext_t *)trans)->command_bits;
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} else {
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} else {
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cmdlen = dev->cfg.command_bits;
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cmdlen = dev->cfg.command_bits;
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}
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}
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int addrlen;
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if (trans->flags & SPI_TRANS_VARIABLE_ADDR) {
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if ( trans->flags & SPI_TRANS_VARIABLE_ADDR ) {
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addrlen = ((spi_transaction_ext_t *)trans)->address_bits;
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addrlen = ((spi_transaction_ext_t*)trans)->address_bits;
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} else {
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} else {
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addrlen = dev->cfg.address_bits;
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addrlen = dev->cfg.address_bits;
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}
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}
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}
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host->hw->user1.usr_addr_bitlen=addrlen-1;
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host->hw->user1.usr_addr_bitlen=addrlen-1;
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host->hw->user2.usr_command_bitlen=cmdlen-1;
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host->hw->user2.usr_command_bitlen=cmdlen-1;
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host->hw->user.usr_addr=addrlen?1:0;
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host->hw->user.usr_addr=addrlen?1:0;
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@ -407,6 +407,8 @@ Known Issues
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2. Full duplex mode is not compatible with the *dummy bit workaround*, hence the frequency is limited. See :ref:`dummy
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2. Full duplex mode is not compatible with the *dummy bit workaround*, hence the frequency is limited. See :ref:`dummy
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bit speed-up workaround <dummy_bit_workaround>`.
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bit speed-up workaround <dummy_bit_workaround>`.
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3. ``cs_ena_pretrans`` is not compatible with command, address phases in full duplex mode.
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Application Example
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Application Example
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-------------------
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-------------------
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