From e0ed59d83fdbb589a834c6302e576f78399969a1 Mon Sep 17 00:00:00 2001
From: Jeroen Domburg <jeroen@espressif.com>
Date: Mon, 27 Mar 2017 16:04:34 +0800
Subject: [PATCH] Also add cache mode choice to menuconfig

---
 components/esp32/Kconfig     | 18 ++++++++++++++++++
 components/esp32/cpu_start.c |  4 ++++
 2 files changed, 22 insertions(+)

diff --git a/components/esp32/Kconfig b/components/esp32/Kconfig
index 27109b952..7fdb206ee 100644
--- a/components/esp32/Kconfig
+++ b/components/esp32/Kconfig
@@ -130,6 +130,24 @@ config SPIRAM_CACHE_WORKAROUND_TEST
         This setting helps testing the SPIRAM cache workaround. It generates a lot of interrupts so
         the bug, if still existing, triggers quicker.
 
+choice MEMMAP_SPIRAM_CACHE_TYPE
+    depends on !FREERTOS_UNICORE
+    prompt "Type of dual-core PSRAM caching strategy"
+    default MEMMAP_SPIRAM_CACHE_EVENODD
+    help
+        The PSRAM cache can work in two ways for dual-core operation: the cache of one CPU
+        can handle the even cache lines while the other one can handle the odd cache lines
+        (even/odd) or the cache of the PRO CPU handles the low 2MiB while the APP CPU cache
+        handles the high 2MiB.
+
+config MEMMAP_SPIRAM_CACHE_EVENODD
+    bool "Even/Odd"
+config MEMMAP_SPIRAM_CACHE_LOWHIGH
+    bool "Low/High"
+
+endchoice
+
+
 choice MEMMAP_SPIRAM_TYPE
     prompt "Type of SPI RAM chip in use"
     default MEMMAP_SPIRAM_TYPE_ESPPSRAM32
diff --git a/components/esp32/cpu_start.c b/components/esp32/cpu_start.c
index 6d810e6ea..dffaef014 100644
--- a/components/esp32/cpu_start.c
+++ b/components/esp32/cpu_start.c
@@ -93,7 +93,11 @@ static const char* TAG = "cpu_start";
 #if CONFIG_FREERTOS_UNICORE
 #define PSRAM_MODE PSRAM_VADDR_MODE_NORMAL
 #else
+#if CONFIG_MEMMAP_SPIRAM_CACHE_EVENODD
 #define PSRAM_MODE PSRAM_VADDR_MODE_EVENODD
+#else
+#define PSRAM_MODE PSRAM_VADDR_MODE_LOWHIGH
+#endif
 #endif
 
 /*