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intr_alloc: port*_CRITICAL vanilla FreeRTOS compliance

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Signed-off-by: Sachin Parekh <sachin.parekh@espressif.com>
This commit is contained in:
Sachin Parekh 2019-03-25 16:09:55 +05:30
parent f3db0b5a4a
commit db8041a67f
1 changed files with 8 additions and 8 deletions
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16
components/esp32/intr_alloc.c
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@ -494,7 +494,7 @@ static void IRAM_ATTR shared_intr_isr(void *arg)
{ {
vector_desc_t *vd=(vector_desc_t*)arg; vector_desc_t *vd=(vector_desc_t*)arg;
shared_vector_desc_t *sh_vec=vd->shared_vec_info; shared_vector_desc_t *sh_vec=vd->shared_vec_info;
portENTER_CRITICAL(&spinlock); portENTER_CRITICAL_ISR(&spinlock);
while(sh_vec) { while(sh_vec) {
if (!sh_vec->disabled) { if (!sh_vec->disabled) {
if ((sh_vec->statusreg == NULL) || (*sh_vec->statusreg & sh_vec->statusmask)) { if ((sh_vec->statusreg == NULL) || (*sh_vec->statusreg & sh_vec->statusmask)) {
@ -512,7 +512,7 @@ static void IRAM_ATTR shared_intr_isr(void *arg)
} }
sh_vec=sh_vec->next; sh_vec=sh_vec->next;
} }
portEXIT_CRITICAL(&spinlock); portEXIT_CRITICAL_ISR(&spinlock);
} }
#if CONFIG_SYSVIEW_ENABLE #if CONFIG_SYSVIEW_ENABLE
@ -520,7 +520,7 @@ static void IRAM_ATTR shared_intr_isr(void *arg)
static void IRAM_ATTR non_shared_intr_isr(void *arg) static void IRAM_ATTR non_shared_intr_isr(void *arg)
{ {
non_shared_isr_arg_t *ns_isr_arg=(non_shared_isr_arg_t*)arg; non_shared_isr_arg_t *ns_isr_arg=(non_shared_isr_arg_t*)arg;
portENTER_CRITICAL(&spinlock); portENTER_CRITICAL_ISR(&spinlock);
traceISR_ENTER(ns_isr_arg->source+ETS_INTERNAL_INTR_SOURCE_OFF); traceISR_ENTER(ns_isr_arg->source+ETS_INTERNAL_INTR_SOURCE_OFF);
// FIXME: can we call ISR and check port_switch_flag after releasing spinlock? // FIXME: can we call ISR and check port_switch_flag after releasing spinlock?
// when CONFIG_SYSVIEW_ENABLE = 0 ISRs for non-shared IRQs are called without spinlock // when CONFIG_SYSVIEW_ENABLE = 0 ISRs for non-shared IRQs are called without spinlock
@ -529,7 +529,7 @@ static void IRAM_ATTR non_shared_intr_isr(void *arg)
if (!port_switch_flag[xPortGetCoreID()]) { if (!port_switch_flag[xPortGetCoreID()]) {
traceISR_EXIT(); traceISR_EXIT();
} }
portEXIT_CRITICAL(&spinlock); portEXIT_CRITICAL_ISR(&spinlock);
} }
#endif #endif
@ -794,7 +794,7 @@ int esp_intr_get_cpu(intr_handle_t handle)
esp_err_t IRAM_ATTR esp_intr_enable(intr_handle_t handle) esp_err_t IRAM_ATTR esp_intr_enable(intr_handle_t handle)
{ {
if (!handle) return ESP_ERR_INVALID_ARG; if (!handle) return ESP_ERR_INVALID_ARG;
portENTER_CRITICAL(&spinlock); portENTER_CRITICAL_SAFE(&spinlock);
int source; int source;
if (handle->shared_vector_desc) { if (handle->shared_vector_desc) {
handle->shared_vector_desc->disabled=0; handle->shared_vector_desc->disabled=0;
@ -810,14 +810,14 @@ esp_err_t IRAM_ATTR esp_intr_enable(intr_handle_t handle)
if (handle->vector_desc->cpu!=xPortGetCoreID()) return ESP_ERR_INVALID_ARG; //Can only enable these ints on this cpu if (handle->vector_desc->cpu!=xPortGetCoreID()) return ESP_ERR_INVALID_ARG; //Can only enable these ints on this cpu
ESP_INTR_ENABLE(handle->vector_desc->intno); ESP_INTR_ENABLE(handle->vector_desc->intno);
} }
portEXIT_CRITICAL(&spinlock); portEXIT_CRITICAL_SAFE(&spinlock);
return ESP_OK; return ESP_OK;
} }
esp_err_t IRAM_ATTR esp_intr_disable(intr_handle_t handle) esp_err_t IRAM_ATTR esp_intr_disable(intr_handle_t handle)
{ {
if (!handle) return ESP_ERR_INVALID_ARG; if (!handle) return ESP_ERR_INVALID_ARG;
portENTER_CRITICAL(&spinlock); portENTER_CRITICAL_SAFE(&spinlock);
int source; int source;
bool disabled = 1; bool disabled = 1;
if (handle->shared_vector_desc) { if (handle->shared_vector_desc) {
@ -850,7 +850,7 @@ esp_err_t IRAM_ATTR esp_intr_disable(intr_handle_t handle)
} }
ESP_INTR_DISABLE(handle->vector_desc->intno); ESP_INTR_DISABLE(handle->vector_desc->intno);
} }
portEXIT_CRITICAL(&spinlock); portEXIT_CRITICAL_SAFE(&spinlock);
return ESP_OK; return ESP_OK;
} }