From d775cc4c4c87dc4b9260abc8e7c8183c0012c748 Mon Sep 17 00:00:00 2001 From: Angus Gratton Date: Fri, 25 May 2018 14:52:41 +1000 Subject: [PATCH] soc: Fix description of rtc_config_t.tieh, add macros Usage of TIEH was correct but description had 1.8V & 3.3V backwards. Add macro definitions for TIEH values to improve readability. --- components/bootloader_support/src/bootloader_init.c | 2 +- components/esp32/spiram_psram.c | 2 +- components/soc/esp32/include/soc/rtc.h | 5 ++++- components/soc/esp32/rtc_init.c | 4 ++-- 4 files changed, 8 insertions(+), 5 deletions(-) diff --git a/components/bootloader_support/src/bootloader_init.c b/components/bootloader_support/src/bootloader_init.c index 5a1ecd6ab..73a799562 100644 --- a/components/bootloader_support/src/bootloader_init.c +++ b/components/bootloader_support/src/bootloader_init.c @@ -276,7 +276,7 @@ static void vddsdio_configure() { #if CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V rtc_vddsdio_config_t cfg = rtc_vddsdio_get_config(); - if (cfg.enable == 1 && cfg.tieh == 0) { // VDDSDIO regulator is enabled @ 1.8V + if (cfg.enable == 1 && cfg.tieh == RTC_VDDSDIO_TIEH_1_8V) { // VDDSDIO regulator is enabled @ 1.8V cfg.drefh = 3; cfg.drefm = 3; cfg.drefl = 3; diff --git a/components/esp32/spiram_psram.c b/components/esp32/spiram_psram.c index 50a8571d8..ed20375da 100644 --- a/components/esp32/spiram_psram.c +++ b/components/esp32/spiram_psram.c @@ -570,7 +570,7 @@ esp_err_t IRAM_ATTR psram_enable(psram_cache_mode_t mode, psram_vaddr_mode_t vad #if CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V // For flash 80Mhz, we must update ldo voltage in case older version of bootloader didn't do this. rtc_vddsdio_config_t cfg = rtc_vddsdio_get_config(); - if (cfg.enable == 1 && cfg.tieh == 0) { // VDDSDIO regulator is enabled @ 1.8V + if (cfg.enable == 1 && cfg.tieh == RTC_VDDSDIO_TIEH_1_8V) { // VDDSDIO regulator is enabled @ 1.8V cfg.drefh = 3; cfg.drefm = 3; cfg.drefl = 3; diff --git a/components/soc/esp32/include/soc/rtc.h b/components/soc/esp32/include/soc/rtc.h index 86beea534..1ece26c97 100644 --- a/components/soc/esp32/include/soc/rtc.h +++ b/components/soc/esp32/include/soc/rtc.h @@ -578,13 +578,16 @@ typedef struct { */ void rtc_init(rtc_config_t cfg); +#define RTC_VDDSDIO_TIEH_1_8V 0 //!< TIEH field value for 1.8V VDDSDIO +#define RTC_VDDSDIO_TIEH_3_3V 1 //!< TIEH field value for 3.3V VDDSDIO + /** * Structure describing vddsdio configuration */ typedef struct { uint32_t force : 1; //!< If 1, use configuration from RTC registers; if 0, use EFUSE/bootstrapping pins. uint32_t enable : 1; //!< Enable VDDSDIO regulator - uint32_t tieh : 1; //!< Select VDDSDIO voltage: 1 — 1.8V, 0 — 3.3V + uint32_t tieh : 1; //!< Select VDDSDIO voltage. One of RTC_VDDSDIO_TIEH_1_8V, RTC_VDDSDIO_TIEH_3_3V uint32_t drefh : 2; //!< Tuning parameter for VDDSDIO regulator uint32_t drefm : 2; //!< Tuning parameter for VDDSDIO regulator uint32_t drefl : 2; //!< Tuning parameter for VDDSDIO regulator diff --git a/components/soc/esp32/rtc_init.c b/components/soc/esp32/rtc_init.c index 43374d6b0..0fa5d8687 100644 --- a/components/soc/esp32/rtc_init.c +++ b/components/soc/esp32/rtc_init.c @@ -132,8 +132,8 @@ rtc_vddsdio_config_t rtc_vddsdio_get_config() // Otherwise, VDD_SDIO is controlled by bootstrapping pin uint32_t strap_reg = REG_READ(GPIO_STRAP_REG); result.force = 0; - result.tieh = (strap_reg & BIT(5)) ? 0 : 1; - result.enable = result.tieh == 0; // only power on the regulator if VDD=1.8 + result.tieh = (strap_reg & BIT(5)) ? RTC_VDDSDIO_TIEH_1_8V : RTC_VDDSDIO_TIEH_3_3V; + result.enable = result.tieh == RTC_VDDSDIO_TIEH_1_8V; // only power on the regulator if VDD=1.8 return result; }