From d4e38152ef1a110659e83a6da6c638265e653f64 Mon Sep 17 00:00:00 2001
From: kooho <2229179028@qq.com>
Date: Thu, 19 Jul 2018 21:41:35 +0800
Subject: [PATCH] driver(uart): Fixed uart tx_empty interrupt wdt timeout bug
 for release/v3.1

---
 components/driver/test/test_uart.c | 20 +++++++++++++++++++-
 components/driver/uart.c           |  5 +++--
 2 files changed, 22 insertions(+), 3 deletions(-)

diff --git a/components/driver/test/test_uart.c b/components/driver/test/test_uart.c
index f49c73ef7..da6ffd1ff 100644
--- a/components/driver/test/test_uart.c
+++ b/components/driver/test/test_uart.c
@@ -45,4 +45,22 @@ TEST_CASE("test uart get baud-rate","[uart]")
     TEST_ASSERT(UART_TOLERANCE_CHECK(baud_rate1, (1.0 + TOLERANCE)*UART_BAUD_11520, (1.0 - TOLERANCE)*UART_BAUD_11520))
     TEST_ASSERT(UART_TOLERANCE_CHECK(baud_rate2, (1.0 + TOLERANCE)*UART_BAUD_115200, (1.0 - TOLERANCE)*UART_BAUD_115200))
     ESP_LOGI(UART_TAG, "get baud-rate test passed  ....\n");
-}
\ No newline at end of file
+}
+
+TEST_CASE("test uart tx data with break","[uart]")
+{
+    const int buf_len = 200;
+    const int send_len = 128;
+    const int brk_len = 10;
+    char *psend = (char *)malloc(buf_len);
+    TEST_ASSERT( psend != NULL);
+    memset(psend, '0', buf_len);
+    uart_config(UART_BAUD_115200, false);
+    printf("Uart%d send %d bytes with break\n", UART_NUM1, send_len);
+    uart_write_bytes_with_break(UART_NUM1, (const char *)psend, send_len, brk_len);
+    uart_wait_tx_done(UART_NUM1, (portTickType)portMAX_DELAY);
+    //If the code is running here, it means the test passed, otherwise it will crash due to the interrupt wdt timeout.
+    printf("Send data with break test passed\n");
+    free(psend);
+}
+
diff --git a/components/driver/uart.c b/components/driver/uart.c
index ea1a8fc44..d9bbdac47 100644
--- a/components/driver/uart.c
+++ b/components/driver/uart.c
@@ -755,7 +755,6 @@ static void uart_rx_intr_handler_default(void *param)
                                 p_uart->tx_ptr = NULL;
                                 p_uart->tx_len_tot = p_uart->tx_head->tx_data.size;
                                 if(p_uart->tx_head->type == UART_DATA_BREAK) {
-                                    p_uart->tx_len_tot = p_uart->tx_head->tx_data.size;
                                     p_uart->tx_brk_flg = 1;
                                     p_uart->tx_brk_len = p_uart->tx_head->tx_data.brk_len;
                                 }
@@ -795,7 +794,7 @@ static void uart_rx_intr_handler_default(void *param)
                             p_uart->tx_ptr = NULL;
                             //Sending item done, now we need to send break if there is a record.
                             //Set TX break signal after FIFO is empty
-                            if(p_uart->tx_brk_flg == 1 && p_uart->tx_len_tot == 0) {
+                            if(p_uart->tx_len_tot == 0 && p_uart->tx_brk_flg == 1) {
                                 UART_ENTER_CRITICAL_ISR(&uart_spinlock[uart_num]);
                                 uart_reg->int_ena.tx_brk_done = 0;
                                 uart_reg->idle_conf.tx_brk_num = p_uart->tx_brk_len;
@@ -804,6 +803,8 @@ static void uart_rx_intr_handler_default(void *param)
                                 uart_reg->int_ena.tx_brk_done = 1;
                                 UART_EXIT_CRITICAL_ISR(&uart_spinlock[uart_num]);
                                 p_uart->tx_waiting_brk = 1;
+                                //do not enable TX empty interrupt
+                                en_tx_flg = false;
                             } else {
                                 //enable TX empty interrupt
                                 en_tx_flg = true;