From 1833b8aeaba72b4aa04f150f918243c2fb49ae54 Mon Sep 17 00:00:00 2001 From: Xia Xiaotian Date: Tue, 4 Feb 2020 14:37:16 +0800 Subject: [PATCH] soc: clear PHY status when cpu start --- components/soc/esp32/rtc_init.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/components/soc/esp32/rtc_init.c b/components/soc/esp32/rtc_init.c index 942b9409a..9b2911d42 100644 --- a/components/soc/esp32/rtc_init.c +++ b/components/soc/esp32/rtc_init.c @@ -24,7 +24,8 @@ void rtc_init(rtc_config_t cfg) { - CLEAR_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG, RTC_CNTL_PVTMON_PU); + CLEAR_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG, RTC_CNTL_PVTMON_PU | RTC_CNTL_TXRF_I2C_PU | + RTC_CNTL_RFRX_PBUS_PU | RTC_CNTL_CKGEN_I2C_PU | RTC_CNTL_PLL_I2C_PU); REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_PLL_BUF_WAIT, cfg.pll_wait); REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_XTL_BUF_WAIT, cfg.xtal_wait);