diff --git a/components/esp_common/include/esp_private/system_internal.h b/components/esp_common/include/esp_private/system_internal.h
index 9b60b2ffe..9b383cd60 100644
--- a/components/esp_common/include/esp_private/system_internal.h
+++ b/components/esp_common/include/esp_private/system_internal.h
@@ -36,6 +36,11 @@ extern "C" {
  */
 void esp_restart_noos(void) __attribute__ ((noreturn));
 
+/**
+ * @brief Similar to esp_restart_noos, but resets all the digital peripherals.
+ */
+void esp_restart_noos_dig(void) __attribute__ ((noreturn));
+
 /**
  * @brief  Internal function to set reset reason hint
  *
diff --git a/components/esp_system/port/panic_handler.c b/components/esp_system/port/panic_handler.c
index d458147d4..312776f97 100644
--- a/components/esp_system/port/panic_handler.c
+++ b/components/esp_system/port/panic_handler.c
@@ -542,25 +542,6 @@ void xt_unhandled_exception(XtExcFrame *frame)
     panic_handler(frame, false);
 }
 
-static __attribute__((noreturn)) void esp_digital_reset(void)
-{
-    // make sure all the panic handler output is sent from UART FIFO
-    uart_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM);
-    // switch to XTAL (otherwise we will keep running from the PLL)
-
-    rtc_clk_cpu_freq_set_xtal();
-
-#if CONFIG_IDF_TARGET_ESP32
-    esp_cpu_unstall(PRO_CPU_NUM);
-#endif
-
-    // reset the digital part
-    SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_SYS_RST);
-    while (true) {
-        ;
-    }
-}
-
 void __attribute__((noreturn)) panic_restart(void)
 {
     bool digital_reset_needed = false;
@@ -576,7 +557,7 @@ void __attribute__((noreturn)) panic_restart(void)
     }
 #endif
     if (digital_reset_needed) {
-        esp_digital_reset();
+        esp_restart_noos_dig();
     }
     esp_restart_noos();
 }
diff --git a/components/esp_system/system_api.c b/components/esp_system/system_api.c
index e02d5907b..c2820aec4 100644
--- a/components/esp_system/system_api.c
+++ b/components/esp_system/system_api.c
@@ -3,16 +3,16 @@
 #include "esp_heap_caps.h"
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
-
-#if CONFIG_IDF_TARGET_ESP32S2
 #include "soc/rtc.h"
 #include "soc/rtc_cntl_reg.h"
+#include "panic_internal.h"
+#if CONFIG_IDF_TARGET_ESP32
+#include "esp32/rom/uart.h"
+#elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/uart.h"
 #include "esp32s2/memprot.h"
 #endif
 
-#include "esp_system.h"
-#include "panic_internal.h"
 
 #define SHUTDOWN_HANDLERS_NO 2
 static shutdown_handler_t shutdown_handlers[SHUTDOWN_HANDLERS_NO];
@@ -41,22 +41,25 @@ esp_err_t esp_unregister_shutdown_handler(shutdown_handler_t handler)
     return ESP_ERR_INVALID_STATE;
 }
 
-#if CONFIG_IDF_TARGET_ESP32S2
-static __attribute__((noreturn)) void esp_digital_reset(void)
+void IRAM_ATTR esp_restart_noos_dig(void)
 {
     // make sure all the panic handler output is sent from UART FIFO
-    uart_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM);
-    // switch to XTAL (otherwise we will keep running from the PLL)
+    if (CONFIG_ESP_CONSOLE_UART_NUM >= 0) {
+        uart_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM);
+    }
 
+    // switch to XTAL (otherwise we will keep running from the PLL)
     rtc_clk_cpu_freq_set_xtal();
 
+#if CONFIG_IDF_TARGET_ESP32
+    esp_cpu_unstall(PRO_CPU_NUM);
+#endif
     // reset the digital part
     SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_SYS_RST);
     while (true) {
         ;
     }
 }
-#endif
 
 void IRAM_ATTR esp_restart(void)
 {
@@ -70,8 +73,8 @@ void IRAM_ATTR esp_restart(void)
     vTaskSuspendAll();
 
 #if CONFIG_IDF_TARGET_ESP32S2
-    if ( esp_memprot_is_intr_ena_any() || esp_memprot_is_locked_any()) {
-        esp_digital_reset();
+    if (esp_memprot_is_intr_ena_any() || esp_memprot_is_locked_any()) {
+        esp_restart_noos_dig();
     }
 #endif
     esp_restart_noos();
@@ -95,4 +98,4 @@ const char *esp_get_idf_version(void)
 void __attribute__((noreturn)) esp_system_abort(const char *details)
 {
     panic_abort(details);
-}
\ No newline at end of file
+}