components/freertos: fixed typos and licence placement on external code
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3 changed files with 12 additions and 11 deletions
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@ -51,7 +51,7 @@ static void test_task(void *arg) {
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nested1();
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}
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TEST_CASE("isr handling time test", "[freertos] [ignore]")
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TEST_CASE("isr latency test", "[freertos] [ignore]")
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{
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end_sema = xSemaphoreCreateBinary();
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TEST_ASSERT(end_sema != NULL);
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@ -1,3 +1,9 @@
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/*
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* Copyright (c) 2017, Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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@ -14,13 +20,8 @@
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*/
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/* File adapted to use on IDF FreeRTOS component, extracted
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* originally from zephyr RTOS code base
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*/
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/*
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* Copyright (c) 2017, Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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* originally from zephyr RTOS code base:
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* https://github.com/zephyrproject-rtos/zephyr/blob/dafd348/arch/xtensa/include/xtensa-asm2-s.h
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*/
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#ifndef __XT_ASM_UTILS_H
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@ -200,7 +200,7 @@ _not_l1:
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addi sp, sp, XT_STK_FRMSZ /* go back to spill register region */
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SPILL_ALL_WINDOWS /* place the live register windows there */
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addi sp, sp, -XT_STK_FRMSZ /* return the current stack pointer and proceed with conext save*/
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addi sp, sp, -XT_STK_FRMSZ /* return the current stack pointer and proceed with context save*/
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#ifdef CONFIG_FREERTOS_ISR_STATS
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rsr a3, CCOUNT
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@ -211,8 +211,8 @@ _not_l1:
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#endif
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l32i a12, sp, XT_STK_TMP0 /* temp. save stuff in stack frame */
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l32i a13, sp, XT_STK_TMP1
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l32i a12, sp, XT_STK_TMP0 /* restore the temp saved registers */
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l32i a13, sp, XT_STK_TMP1 /* our return address is there */
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l32i a9, sp, XT_STK_TMP2
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#if XCHAL_EXTRA_SA_SIZE > 0 || !defined(__XTENSA_CALL0_ABI__)
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