diff --git a/components/esp32/test/test_dport.c b/components/esp32/test/test_dport.c index 6b5960bf4..96fa0b109 100644 --- a/components/esp32/test/test_dport.c +++ b/components/esp32/test/test_dport.c @@ -1,11 +1,12 @@ - -#include #include #include +#include "esp_types.h" +#include "esp_clk.h" #include "freertos/FreeRTOS.h" #include "freertos/task.h" #include "freertos/semphr.h" +#include "freertos/xtensa_timer.h" #include "soc/cpu.h" #include "unity.h" #include "rom/uart.h" @@ -99,49 +100,52 @@ TEST_CASE("access DPORT and APB at same time", "[esp32]") { dport_test_result = false; apb_test_result = false; - printf("CPU_FREQ = %d MHz\n", rtc_clk_cpu_freq_value(rtc_clk_cpu_freq_get()) / MHZ); + printf("CPU_FREQ = %d MHz\n", esp_clk_cpu_freq()); run_tasks("accessDPORT", accessDPORT, "accessAPB", accessAPB, 10000); } -void run_tasks_with_change_freq_cpu (rtc_cpu_freq_t cpu_freq) +void run_tasks_with_change_freq_cpu(int cpu_freq_mhz) { - dport_test_result = false; - apb_test_result = false; - rtc_cpu_freq_t cur_freq = rtc_clk_cpu_freq_get(); - uint32_t freq_before_changed = rtc_clk_cpu_freq_value(cur_freq) / MHZ; - uint32_t freq_changed = freq_before_changed; - printf("CPU_FREQ = %d MHz\n", freq_before_changed); - - if (cur_freq != cpu_freq) { - uart_tx_wait_idle(CONFIG_CONSOLE_UART_NUM); - - rtc_clk_cpu_freq_set(cpu_freq); - - const int uart_num = CONFIG_CONSOLE_UART_NUM; - const int uart_baud = CONFIG_CONSOLE_UART_BAUDRATE; - uart_div_modify(uart_num, (rtc_clk_apb_freq_get() << 4) / uart_baud); - - freq_changed = rtc_clk_cpu_freq_value(rtc_clk_cpu_freq_get()) / MHZ; - printf("CPU_FREQ switching to %d MHz\n", freq_changed); - } - run_tasks("accessDPORT", accessDPORT, "accessAPB", accessAPB, 10000 / ((freq_before_changed <= freq_changed) ? 1 : (freq_before_changed / freq_changed))); - - // return old freq. - uart_tx_wait_idle(CONFIG_CONSOLE_UART_NUM); - rtc_clk_cpu_freq_set(cur_freq); const int uart_num = CONFIG_CONSOLE_UART_NUM; const int uart_baud = CONFIG_CONSOLE_UART_BAUDRATE; + dport_test_result = false; + apb_test_result = false; + rtc_cpu_freq_config_t old_config; + rtc_clk_cpu_freq_get_config(&old_config); + + printf("CPU_FREQ = %d MHz\n", old_config.freq_mhz); + + if (cpu_freq_mhz != old_config.freq_mhz) { + rtc_cpu_freq_config_t new_config; + bool res = rtc_clk_cpu_freq_mhz_to_config(cpu_freq_mhz, &new_config); + assert(res && "invalid frequency value"); + + uart_tx_wait_idle(uart_num); + rtc_clk_cpu_freq_set_config(&new_config); + uart_div_modify(uart_num, (rtc_clk_apb_freq_get() << 4) / uart_baud); + /* adjust RTOS ticks */ + _xt_tick_divisor = cpu_freq_mhz * 1000000 / XT_TICK_PER_SEC; + vTaskDelay(2); + + printf("CPU_FREQ switched to %d MHz\n", cpu_freq_mhz); + } + run_tasks("accessDPORT", accessDPORT, "accessAPB", accessAPB, 10000); + + // return old freq. + uart_tx_wait_idle(uart_num); + rtc_clk_cpu_freq_set_config(&old_config); uart_div_modify(uart_num, (rtc_clk_apb_freq_get() << 4) / uart_baud); + _xt_tick_divisor = old_config.freq_mhz * 1000000 / XT_TICK_PER_SEC; } TEST_CASE("access DPORT and APB at same time (Freq CPU and APB = 80 MHz)", "[esp32] [ignore]") { - run_tasks_with_change_freq_cpu(RTC_CPU_FREQ_80M); + run_tasks_with_change_freq_cpu(80); } TEST_CASE("access DPORT and APB at same time (Freq CPU and APB = 40 MHz (XTAL))", "[esp32]") { - run_tasks_with_change_freq_cpu(RTC_CPU_FREQ_XTAL); + run_tasks_with_change_freq_cpu((int) rtc_clk_xtal_freq_get()); } static uint32_t stall_other_cpu_counter; diff --git a/components/esp32/test/test_pm.c b/components/esp32/test/test_pm.c index fa432eddc..e34658b7e 100644 --- a/components/esp32/test/test_pm.c +++ b/components/esp32/test/test_pm.c @@ -2,6 +2,7 @@ #include #include #include +#include #include "unity.h" #include "esp_pm.h" #include "esp_clk.h" @@ -25,19 +26,17 @@ TEST_CASE("Can dump power management lock stats", "[pm]") static void switch_freq(int mhz) { - rtc_cpu_freq_t max_freq; - assert(rtc_clk_cpu_freq_from_mhz(mhz, &max_freq)); + int xtal_freq = rtc_clk_xtal_freq_get(); esp_pm_config_esp32_t pm_config = { - .max_cpu_freq = max_freq, - .min_cpu_freq = RTC_CPU_FREQ_XTAL, + .max_freq_mhz = mhz, + .min_freq_mhz = MIN(mhz, xtal_freq), }; ESP_ERROR_CHECK( esp_pm_configure(&pm_config) ); - printf("Waiting for frequency to be set to %d (%d MHz)...\n", max_freq, mhz); + printf("Waiting for frequency to be set to %d MHz...\n", mhz); while (esp_clk_cpu_freq() / 1000000 != mhz) { - vTaskDelay(pdMS_TO_TICKS(1000)); - printf("Frequency is %d MHz\n", esp_clk_cpu_freq()); + vTaskDelay(pdMS_TO_TICKS(200)); + printf("Frequency is %d MHz\n", esp_clk_cpu_freq() / 1000000); } - printf("Frequency is set to %d MHz\n", mhz); } TEST_CASE("Can switch frequency using esp_pm_configure", "[pm]") @@ -52,6 +51,10 @@ TEST_CASE("Can switch frequency using esp_pm_configure", "[pm]") switch_freq(240); switch_freq(40); switch_freq(80); + switch_freq(10); + switch_freq(80); + switch_freq(20); + switch_freq(40); switch_freq(orig_freq_mhz); } diff --git a/components/esp32/test/test_sleep.c b/components/esp32/test/test_sleep.c index abd5a2080..2212de3c4 100644 --- a/components/esp32/test/test_sleep.c +++ b/components/esp32/test/test_sleep.c @@ -177,13 +177,16 @@ TEST_CASE("light sleep and frequency switching", "[deepsleep]") uart_div_modify(CONFIG_CONSOLE_UART_NUM, (uart_clk_freq << 4) / CONFIG_CONSOLE_UART_BAUDRATE); #endif + rtc_cpu_freq_config_t config_xtal, config_default; + rtc_clk_cpu_freq_get_config(&config_default); + rtc_clk_cpu_freq_mhz_to_config((int) rtc_clk_xtal_freq_get(), &config_xtal); + esp_sleep_enable_timer_wakeup(1000); - rtc_cpu_freq_t default_freq = rtc_clk_cpu_freq_get(); for (int i = 0; i < 1000; ++i) { if (i % 2 == 0) { - rtc_clk_cpu_freq_set_fast(RTC_CPU_FREQ_XTAL); + rtc_clk_cpu_freq_set_config_fast(&config_xtal); } else { - rtc_clk_cpu_freq_set_fast(default_freq); + rtc_clk_cpu_freq_set_config_fast(&config_default); } printf("%d\n", i); fflush(stdout); diff --git a/components/soc/esp32/test/test_rtc_clk.c b/components/soc/esp32/test/test_rtc_clk.c index 39c3ac7fd..ee05a302b 100644 --- a/components/soc/esp32/test/test_rtc_clk.c +++ b/components/soc/esp32/test/test_rtc_clk.c @@ -95,7 +95,7 @@ TEST_CASE("Output 8M XTAL clock to GPIO25", "[rtc_clk][ignore]") pull_out_clk(RTC_IO_DEBUG_SEL0_8M); } -static void test_clock_switching(void (*switch_func)(rtc_cpu_freq_t)) +static void test_clock_switching(void (*switch_func)(const rtc_cpu_freq_config_t* config)) { uart_tx_wait_idle(CONFIG_CONSOLE_UART_NUM); @@ -103,11 +103,16 @@ static void test_clock_switching(void (*switch_func)(rtc_cpu_freq_t)) ref_clock_init(); uint64_t t_start = ref_clock_get(); - rtc_cpu_freq_t cur_freq = rtc_clk_cpu_freq_get(); + rtc_cpu_freq_config_t cur_config; + rtc_clk_cpu_freq_get_config(&cur_config); + + rtc_cpu_freq_config_t xtal_config; + rtc_clk_cpu_freq_mhz_to_config((uint32_t) rtc_clk_xtal_freq_get(), &xtal_config); + int count = 0; while (ref_clock_get() - t_start < test_duration_sec * 1000000) { - switch_func(RTC_CPU_FREQ_XTAL); - switch_func(cur_freq); + switch_func(&xtal_config); + switch_func(&cur_config); ++count; } uint64_t t_end = ref_clock_get(); @@ -126,12 +131,12 @@ TEST_CASE("Calculate 8M clock frequency", "[rtc_clk]") TEST_CASE("Test switching between PLL and XTAL", "[rtc_clk]") { - test_clock_switching(rtc_clk_cpu_freq_set); + test_clock_switching(rtc_clk_cpu_freq_set_config); } TEST_CASE("Test fast switching between PLL and XTAL", "[rtc_clk]") { - test_clock_switching(rtc_clk_cpu_freq_set_fast); + test_clock_switching(rtc_clk_cpu_freq_set_config_fast); } #define COUNT_TEST 3