From b9f6b579f1b62e53ab45f13c2b6eacbc9c038cfc Mon Sep 17 00:00:00 2001 From: Ivan Grokhotkov Date: Tue, 7 Aug 2018 16:57:19 +0300 Subject: [PATCH] ulp: add documentation for JUMPS instruction conditions Hardware implements conditions LE, LT, GE, and conditions EQ and GT are implemented in the assembler by emitting two JUMPS instructions with other conditions. --- docs/api-guides/ulp_instruction_set.rst | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/docs/api-guides/ulp_instruction_set.rst b/docs/api-guides/ulp_instruction_set.rst index be5fef58e..e21059f50 100644 --- a/docs/api-guides/ulp_instruction_set.rst +++ b/docs/api-guides/ulp_instruction_set.rst @@ -512,10 +512,29 @@ Note that when accessing RTC memories and RTC registers, ULP coprocessor has low - *Condition*: - *EQ* (equal) – jump if value in stage_cnt == threshold - *LT* (less than) – jump if value in stage_cnt < threshold + - *LE* (less or equal) - jump if value in stage_cnt <= threshold - *GT* (greater than) – jump if value in stage_cnt > threshold + - *GE* (greater or equal) — jump if value in stage_cnt >= threshold **Cycles** - 2 cycles to execute, 2 cycles to fetch next instruction + Conditions *LE*, *LT*, *GE*: 2 cycles to execute, 2 cycles to fetch next instruction + + Conditions *EQ*, *GT* are implemented in the assembler using two **JUMPS** instructions:: + + // JUMPS target, threshold, EQ is implemented as: + + JUMPS next, threshold, LT + JUMPS target, threshold, LE + next: + + // JUMPS target, threshold, GT is implemented as: + + JUMPS next, threshold, LE + JUMPS target, threshold, GE + next: + + Therefore the execution time will depend on the branches taken: either 2 cycles to execute + 2 cycles to fetch, or 4 cycles to execute + 4 cycles to fetch. + **Description** The instruction makes a jump to a relative address if condition is true. Condition is the result of comparison of count register value and threshold value.