diff --git a/components/driver/i2s.c b/components/driver/i2s.c
index 2bb7d74b8..ed5bd1147 100644
--- a/components/driver/i2s.c
+++ b/components/driver/i2s.c
@@ -25,9 +25,11 @@
 #include "esp32/rom/lldesc.h"
 #include "driver/gpio.h"
 #include "driver/i2s.h"
+#if SOC_I2S_SUPPORTS_ADC_DAC
 #include "driver/dac.h"
 #include "hal/i2s_hal.h"
 #include "adc1_i2s_private.h"
+#endif
 
 #include "esp_intr_alloc.h"
 #include "esp_err.h"
@@ -95,8 +97,10 @@ typedef struct {
 static i2s_obj_t *p_i2s_obj[I2S_NUM_MAX] = {0};
 
 static portMUX_TYPE i2s_spinlock[I2S_NUM_MAX];
+#if SOC_I2S_SUPPORTS_ADC_DAC
 static int _i2s_adc_unit = -1;
 static int _i2s_adc_channel = -1;
+#endif
 
 static i2s_dma_t *i2s_create_dma_queue(i2s_port_t i2s_num, int dma_buf_count, int dma_buf_len);
 static esp_err_t i2s_destroy_dma_queue(i2s_port_t i2s_num, i2s_dma_t *dma);
@@ -398,7 +402,9 @@ esp_err_t i2s_set_clk(i2s_port_t i2s_num, uint32_t rate, i2s_bits_per_sample_t b
     double mclk;
     int sdm0, sdm1, sdm2, odir, m_scale = 8;
     int fi2s_clk = rate*channel*bits*m_scale;
+#if SOC_I2S_SUPPORTS_ADC_DAC
     if (p_i2s_obj[i2s_num]->mode & (I2S_MODE_DAC_BUILT_IN | I2S_MODE_ADC_BUILT_IN)) {
+
         //DAC uses bclk as sample clock, not WS. WS can be something arbitrary.
         //Rate as given to this function is the intended sample rate;
         //According to the TRM, WS clk equals to the sample rate, and bclk is double the speed of WS
@@ -410,7 +416,8 @@ esp_err_t i2s_set_clk(i2s_port_t i2s_num, uint32_t rate, i2s_bits_per_sample_t b
         clkmInteger = clkmdiv;
         clkmDecimals = (clkmdiv - clkmInteger) / denom;
         bck = mclk / b_clk;
-#if I2S_SUPPORTS_PDM
+#endif
+#if SOC_I2S_SUPPORTS_PDM
     } else if (p_i2s_obj[i2s_num]->mode & I2S_MODE_PDM) {
         uint32_t b_clk = 0;
         if (p_i2s_obj[i2s_num]->mode & I2S_MODE_TX) {
@@ -431,8 +438,9 @@ esp_err_t i2s_set_clk(i2s_port_t i2s_num, uint32_t rate, i2s_bits_per_sample_t b
         clkmInteger = clkmdiv;
         clkmDecimals = (clkmdiv - clkmInteger) / denom;
         bck = mclk / b_clk;
+    } else
 #endif
-    } else {
+    {
         clkmInteger = clkmdiv;
         clkmDecimals = (clkmdiv - clkmInteger) / denom;
         mclk = clkmInteger + denom * clkmDecimals;
@@ -685,6 +693,7 @@ esp_err_t i2s_stop(i2s_port_t i2s_num)
     return ESP_OK;
 }
 
+#if SOC_I2S_SUPPORTS_ADC_DAC
 esp_err_t i2s_set_dac_mode(i2s_dac_mode_t dac_mode)
 {
     I2S_CHECK((dac_mode < I2S_DAC_CHANNEL_MAX), "i2s dac mode error", ESP_ERR_INVALID_ARG);
@@ -721,13 +730,19 @@ esp_err_t i2s_set_adc_mode(adc_unit_t adc_unit, adc1_channel_t adc_channel)
     _i2s_adc_channel = adc_channel;
     return adc_i2s_mode_init(adc_unit, adc_channel);
 }
+#endif
 
 esp_err_t i2s_set_pin(i2s_port_t i2s_num, const i2s_pin_config_t *pin)
 {
     I2S_CHECK((i2s_num < I2S_NUM_MAX), "i2s_num error", ESP_ERR_INVALID_ARG);
     if (pin == NULL) {
+#if SOC_I2S_SUPPORTS_ADC_DAC
         return i2s_set_dac_mode(I2S_DAC_CHANNEL_BOTH_EN);
+#else
+        return ESP_ERR_INVALID_ARG;
+#endif
     }
+
     if (pin->bck_io_num != -1 && !GPIO_IS_VALID_GPIO(pin->bck_io_num)) {
         ESP_LOGE(I2S_TAG, "bck_io_num error");
         return ESP_FAIL;
@@ -803,7 +818,7 @@ esp_err_t i2s_set_sample_rates(i2s_port_t i2s_num, uint32_t rate)
     return i2s_set_clk(i2s_num, rate, p_i2s_obj[i2s_num]->bits_per_sample, p_i2s_obj[i2s_num]->channel_num);
 }
 
-#if I2S_SUPPORTS_PDM
+#if SOC_I2S_SUPPORTS_PDM
 esp_err_t i2s_set_pdm_rx_down_sample(i2s_port_t i2s_num, i2s_pdm_dsr_t dsr)
 {
     I2S_CHECK((i2s_num < I2S_NUM_MAX), "i2s_num error", ESP_ERR_INVALID_ARG);
@@ -816,14 +831,17 @@ static esp_err_t i2s_param_config(i2s_port_t i2s_num, const i2s_config_t *i2s_co
 {
     I2S_CHECK((i2s_num < I2S_NUM_MAX), "i2s_num error", ESP_ERR_INVALID_ARG);
     I2S_CHECK((i2s_config), "param null", ESP_ERR_INVALID_ARG);
+#if SOC_I2S_SUPPORTS_ADC_DAC
     I2S_CHECK(!((i2s_config->mode & I2S_MODE_ADC_BUILT_IN) && (i2s_num != I2S_NUM_0)), "I2S ADC built-in only support on I2S0", ESP_ERR_INVALID_ARG);
     I2S_CHECK(!((i2s_config->mode & I2S_MODE_DAC_BUILT_IN) && (i2s_num != I2S_NUM_0)), "I2S DAC built-in only support on I2S0", ESP_ERR_INVALID_ARG);
+#endif
     I2S_CHECK(((i2s_config->communication_format & I2S_COMM_FORMAT_I2S) || (i2s_config->communication_format & I2S_COMM_FORMAT_PCM)), "I2S communication format invalid.", ESP_ERR_INVALID_ARG);
-#if I2S_SUPPORTS_PDM
+#if SOC_I2S_SUPPORTS_PDM
     I2S_CHECK(!((i2s_config->mode & I2S_MODE_PDM) && (i2s_num != I2S_NUM_0)), "I2S DAC PDM only support on I2S0", ESP_ERR_INVALID_ARG);
 #endif
     periph_module_enable(i2s_periph_signal[i2s_num].module);
 
+#if SOC_I2S_SUPPORTS_ADC_DAC
     if(i2s_config->mode & I2S_MODE_ADC_BUILT_IN) {
         //in ADC built-in mode, we need to call i2s_set_adc_mode to
         //initialize the specific ADC channel.
@@ -831,6 +849,7 @@ static esp_err_t i2s_param_config(i2s_port_t i2s_num, const i2s_config_t *i2s_co
         //In default data mode, the ADC data is in 12-bit resolution mode.
         adc_power_always_on();
     }
+#endif
     // configure I2S data port interface.
     i2s_reset_fifo(i2s_num);
     i2s_hal_config_param(&(p_i2s_obj[i2s_num]->hal), i2s_config);
@@ -1035,6 +1054,7 @@ esp_err_t i2s_write(i2s_port_t i2s_num, const void *src, size_t size, size_t *by
     return ESP_OK;
 }
 
+#if SOC_I2S_SUPPORTS_ADC_DAC
 esp_err_t i2s_adc_enable(i2s_port_t i2s_num)
 {
     I2S_CHECK((i2s_num < I2S_NUM_MAX), "i2s_num error", ESP_ERR_INVALID_ARG);
@@ -1058,6 +1078,7 @@ esp_err_t i2s_adc_disable(i2s_port_t i2s_num)
     adc1_lock_release();
     return ESP_OK;
 }
+#endif
 
 esp_err_t i2s_write_expand(i2s_port_t i2s_num, const void *src, size_t size, size_t src_bits, size_t aim_bits, size_t *bytes_written, TickType_t ticks_to_wait)
 {
diff --git a/components/driver/include/driver/i2s.h b/components/driver/include/driver/i2s.h
index 5c7160945..f976a31c0 100644
--- a/components/driver/include/driver/i2s.h
+++ b/components/driver/include/driver/i2s.h
@@ -17,12 +17,17 @@
 #include "esp_types.h"
 #include "esp_err.h"
 #include "freertos/FreeRTOS.h"
+#include "freertos/semphr.h"
 #include "soc/i2s_periph.h"
 #include "soc/rtc_periph.h"
 #include "soc/i2s_caps.h"
-#include "driver/periph_ctrl.h"
-#include "driver/adc.h" // adc1_channel_t typedef
+#include "hal/i2s_hal.h"
 #include "hal/i2s_types.h"
+#include "driver/periph_ctrl.h"
+#include "esp_intr_alloc.h"
+#if SOC_I2S_SUPPORTS_ADC_DAC
+#include "driver/adc.h"
+#endif
 
 #ifdef __cplusplus
 extern "C" {
@@ -54,7 +59,7 @@ typedef intr_handle_t i2s_isr_handle_t;
  */
 esp_err_t i2s_set_pin(i2s_port_t i2s_num, const i2s_pin_config_t *pin);
 
-#if I2S_SUPPORTS_PDM
+#if SOC_I2S_SUPPORTS_PDM
 /**
  * @brief Set PDM mode down-sample rate
  *        In PDM RX mode, there would be 2 rounds of downsample process in hardware.
@@ -288,6 +293,7 @@ esp_err_t i2s_set_clk(i2s_port_t i2s_num, uint32_t rate, i2s_bits_per_sample_t b
  */
 float i2s_get_clk(i2s_port_t i2s_num);
 
+#if SOC_I2S_SUPPORTS_ADC_DAC
 /**
  * @brief Set built-in ADC mode for I2S DMA, this function will initialize ADC pad,
  *        and set ADC parameters.
@@ -322,6 +328,7 @@ esp_err_t i2s_adc_enable(i2s_port_t i2s_num);
  *     - ESP_ERR_INVALID_STATE  Driver state error
  */
 esp_err_t i2s_adc_disable(i2s_port_t i2s_num);
+#endif
 
 #ifdef __cplusplus
 }
diff --git a/components/driver/test/test_i2s.c b/components/driver/test/test_i2s.c
index 2853ba974..639213c0a 100644
--- a/components/driver/test/test_i2s.c
+++ b/components/driver/test/test_i2s.c
@@ -1,8 +1,8 @@
 /**
  * I2S test environment UT_T1_I2S:
  * We use internal signals instead of external wiring, but please keep the following IO connections, or connect nothing to prevent the signal from being disturbed.
- * connect GPIO18 and GPIO19, GPIO25(ESP32)/GPIO17(ESP32-S2) and GPIO26, GPIO21 and GPIO22(ESP32)/GPIO20(ESP32-S2)
- * Please do not connect GPIO32(ESP32)/GPIO5(ESP32-S2) any pull-up resistors externally, it will be used to test i2s adc function.
+ * connect GPIO15 and GPIO19, GPIO25(ESP32)/GPIO17(ESP32-S2) and GPIO26, GPIO21 and GPIO22(ESP32)/GPIO20(ESP32-S2)
+ * Please do not connect GPIO32(ESP32) any pull-up resistors externally, it will be used to test i2s adc function.
  */
 
 #include <stdio.h>
@@ -10,12 +10,13 @@
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
 #include "driver/i2s.h"
+#include "driver/gpio.h"
 #include "unity.h"
 #include "math.h"
 
 #define SAMPLE_RATE     (36000)
 #define SAMPLE_BITS     (16)
-#define MASTER_BCK_IO 18
+#define MASTER_BCK_IO 15
 #define SLAVE_BCK_IO 19
 #define SLAVE_WS_IO 26
 #define DATA_IN_IO 21
@@ -27,11 +28,14 @@
 #elif CONFIG_IDF_TARGET_ESP32S2
 #define MASTER_WS_IO 28
 #define DATA_OUT_IO 20
-#define ADC1_CHANNEL_4_IO 5
 #endif
 
 #define PERCENT_DIFF 0.0001
 
+#define I2S_TEST_MODE_SLAVE_TO_MAXTER 0
+#define I2S_TEST_MODE_MASTER_TO_SLAVE 1
+#define I2S_TEST_MODE_LOOPBACK        2
+
 // mode: 0, master rx, slave tx. mode: 1, master tx, slave rx. mode: 2, master tx rx loopback
 // Since ESP32-S2 has only one I2S, only loop back test can be tested.
 static void i2s_test_io_config(int mode)
@@ -45,9 +49,9 @@ static void i2s_test_io_config(int mode)
     gpio_set_direction(MASTER_WS_IO, GPIO_MODE_INPUT_OUTPUT);
     gpio_set_direction(DATA_OUT_IO, GPIO_MODE_INPUT_OUTPUT);
 
-#if CONFIG_IDF_TARGET_ESP32
     switch (mode) {
-        case 0: {
+#if SOC_I2S_NUM > 1
+        case I2S_TEST_MODE_SLAVE_TO_MAXTER: {
             gpio_matrix_out(MASTER_BCK_IO, I2S0I_BCK_OUT_IDX, 0, 0);
             gpio_matrix_in(MASTER_BCK_IO, I2S1O_BCK_IN_IDX, 0);
 
@@ -59,7 +63,7 @@ static void i2s_test_io_config(int mode)
         }
         break;
 
-        case 1: {
+        case I2S_TEST_MODE_MASTER_TO_SLAVE: {
             gpio_matrix_out(MASTER_BCK_IO, I2S0O_BCK_OUT_IDX, 0, 0);
             gpio_matrix_in(MASTER_BCK_IO, I2S1I_BCK_IN_IDX, 0);
 
@@ -70,22 +74,18 @@ static void i2s_test_io_config(int mode)
             gpio_matrix_in(DATA_OUT_IO, I2S1I_DATA_IN15_IDX, 0);  
         }
         break;
-
-        case 2: {
-            gpio_matrix_out(DATA_OUT_IO, I2S0O_DATA_OUT23_IDX, 0, 0);
-            gpio_matrix_in(DATA_OUT_IO, I2S0I_DATA_IN15_IDX, 0); 
-        }
-        break;
-    }
-#else 
-    switch (mode) {
-        case 2: {
-            gpio_matrix_out(DATA_OUT_IO, I2S0O_DATA_OUT23_IDX, 0, 0);
-            gpio_matrix_in(DATA_OUT_IO, I2S0I_DATA_IN15_IDX, 0); 
-        }
-        break;
-    }
 #endif
+        case I2S_TEST_MODE_LOOPBACK: {
+            gpio_matrix_out(DATA_OUT_IO, I2S0O_DATA_OUT23_IDX, 0, 0);
+            gpio_matrix_in(DATA_OUT_IO, I2S0I_DATA_IN15_IDX, 0); 
+        }
+        break;
+
+        default: {
+            TEST_FAIL_MESSAGE("error: mode not supported");
+        }
+        break;
+    }
 }
 
 
@@ -109,13 +109,14 @@ TEST_CASE("I2S basic driver install, uninstall, set pin test", "[i2s]")
         .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
     };
 
+#if CONFIG_IDF_TARGET_ESP32
     //install and start i2s driver
     TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
     //for internal DAC, this will enable both of the internal channels
     TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, NULL));
-    i2s_test_io_config(1);
     //stop & destroy i2s driver
     TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
+#endif
 
     // normal  i2s
     i2s_pin_config_t pin_config = {
@@ -126,7 +127,6 @@ TEST_CASE("I2S basic driver install, uninstall, set pin test", "[i2s]")
     };
     TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
     TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &pin_config));
-    i2s_test_io_config(1);
     TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
 
     //error param test
@@ -139,7 +139,7 @@ TEST_CASE("I2S basic driver install, uninstall, set pin test", "[i2s]")
     TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
 }
 
-TEST_CASE("I2S Loopback test(master tx and rx)", "[i2s][test_env=UT_T1_I2S]")
+TEST_CASE("I2S Loopback test(master tx and rx)", "[i2s]")
 {
     // master driver installed and send data
     i2s_config_t master_i2s_config = {
@@ -161,7 +161,7 @@ TEST_CASE("I2S Loopback test(master tx and rx)", "[i2s][test_env=UT_T1_I2S]")
     };
     TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
     TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
-    i2s_test_io_config(2);
+    i2s_test_io_config(I2S_TEST_MODE_LOOPBACK);
     printf("\r\nheap size: %d\n", esp_get_free_heap_size());
 
     uint8_t* data_wr = (uint8_t*)malloc(sizeof(uint8_t)*400);
@@ -194,9 +194,9 @@ TEST_CASE("I2S Loopback test(master tx and rx)", "[i2s][test_env=UT_T1_I2S]")
         }
         length = length + bytes_read;
     }
-    // test the readed data right or not
+    // test the read data right or not
     for(int i=end_position-99; i<=end_position; i++) {
-        TEST_ASSERT(*(i2s_read_buff + i) == (i-end_position+100));
+        TEST_ASSERT_EQUAL_UINT8((i-end_position+100), *(i2s_read_buff + i));
     }
     free(data_wr);
     free(i2s_read_buff);
@@ -204,7 +204,8 @@ TEST_CASE("I2S Loopback test(master tx and rx)", "[i2s][test_env=UT_T1_I2S]")
 }
 
 #if !DISABLED_FOR_TARGETS(ESP32S2)
-TEST_CASE("I2S adc test", "[i2s][test_env=UT_T1_I2S]")
+/* ESP32S2 has only single I2S port and hence following test cases are not applicable */
+TEST_CASE("I2S adc test", "[i2s]")
 {
     // init I2S ADC
     i2s_config_t i2s_config = {
@@ -259,8 +260,7 @@ TEST_CASE("I2S adc test", "[i2s][test_env=UT_T1_I2S]")
     i2s_driver_uninstall(I2S_NUM_0);
 }
 
-/* ESP32S2BETA has only single I2S port and hence following test cases are not applicable */
-TEST_CASE("I2S write and read test(master tx and slave rx)", "[i2s][test_env=UT_T1_I2S]")
+TEST_CASE("I2S write and read test(master tx and slave rx)", "[i2s]")
 {
     // master driver installed and send data
     i2s_config_t master_i2s_config = {
@@ -282,7 +282,7 @@ TEST_CASE("I2S write and read test(master tx and slave rx)", "[i2s][test_env=UT_
     };
     TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
     TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
-    i2s_test_io_config(1);
+    i2s_test_io_config(I2S_TEST_MODE_MASTER_TO_SLAVE);
     printf("\r\nheap size: %d\n", esp_get_free_heap_size());
 
     i2s_config_t slave_i2s_config = {
@@ -305,7 +305,7 @@ TEST_CASE("I2S write and read test(master tx and slave rx)", "[i2s][test_env=UT_
     // slave driver installed and receive data
     TEST_ESP_OK(i2s_driver_install(I2S_NUM_1, &slave_i2s_config, 0, NULL));
     TEST_ESP_OK(i2s_set_pin(I2S_NUM_1, &slave_pin_config));
-    i2s_test_io_config(1);
+    i2s_test_io_config(I2S_TEST_MODE_MASTER_TO_SLAVE);
     printf("\r\nheap size: %d\n", esp_get_free_heap_size());
 
     uint8_t* data_wr = (uint8_t*)malloc(sizeof(uint8_t)*400);
@@ -337,7 +337,7 @@ TEST_CASE("I2S write and read test(master tx and slave rx)", "[i2s][test_env=UT_
     }
     // test the readed data right or not
     for(int i=end_position-99; i<=end_position; i++) {
-        TEST_ASSERT(*(i2s_read_buff + i) == (i-end_position+100));
+        TEST_ASSERT_EQUAL_UINT8((i-end_position+100), *(i2s_read_buff + i));
     }
     free(data_wr);
     free(i2s_read_buff);
@@ -345,7 +345,7 @@ TEST_CASE("I2S write and read test(master tx and slave rx)", "[i2s][test_env=UT_
     i2s_driver_uninstall(I2S_NUM_1);
 }
 
-TEST_CASE("I2S write and read test(master rx and slave tx)", "[i2s][test_env=UT_T1_I2S]")
+TEST_CASE("I2S write and read test(master rx and slave tx)", "[i2s]")
 {
     // master driver installed and send data
     i2s_config_t master_i2s_config = {
@@ -367,7 +367,7 @@ TEST_CASE("I2S write and read test(master rx and slave tx)", "[i2s][test_env=UT_
     };
     TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
     TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
-    i2s_test_io_config(0);
+    i2s_test_io_config(I2S_TEST_MODE_SLAVE_TO_MAXTER);
     printf("\r\nheap size: %d\n", esp_get_free_heap_size());
 
     i2s_config_t slave_i2s_config = {
@@ -390,7 +390,7 @@ TEST_CASE("I2S write and read test(master rx and slave tx)", "[i2s][test_env=UT_
     // slave driver installed and receive data
     TEST_ESP_OK(i2s_driver_install(I2S_NUM_1, &slave_i2s_config, 0, NULL));
     TEST_ESP_OK(i2s_set_pin(I2S_NUM_1, &slave_pin_config));
-    i2s_test_io_config(0);
+    i2s_test_io_config(I2S_TEST_MODE_SLAVE_TO_MAXTER);
 
     uint8_t* data_wr = (uint8_t*)malloc(sizeof(uint8_t)*400);
     size_t i2s_bytes_write = 0;
@@ -422,7 +422,7 @@ TEST_CASE("I2S write and read test(master rx and slave tx)", "[i2s][test_env=UT_
     }
     // test the readed data right or not
     for(int i=end_position-99; i<=end_position; i++) {
-        TEST_ASSERT(*(i2s_read_buff + i) == (i-end_position+100));
+        TEST_ASSERT_EQUAL_UINT8((i-end_position+100), *(i2s_read_buff + i));
     }
     free(data_wr);
     free(i2s_read_buff);
@@ -453,14 +453,12 @@ TEST_CASE("I2S memory leaking test", "[i2s]")
 
     TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
     TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
-    i2s_test_io_config(1);
     i2s_driver_uninstall(I2S_NUM_0);
     int initial_size = esp_get_free_heap_size();
 
     for(int i=0; i<100; i++) {
         TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
         TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
-        i2s_test_io_config(1);
         i2s_driver_uninstall(I2S_NUM_0);
         TEST_ASSERT(initial_size == esp_get_free_heap_size());
     }
@@ -496,7 +494,6 @@ TEST_CASE("I2S APLL clock variation test", "[i2s]")
 
     TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
     TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &pin_config));
-    i2s_test_io_config(1);
     TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
     int initial_size = esp_get_free_heap_size();
 
@@ -510,7 +507,6 @@ TEST_CASE("I2S APLL clock variation test", "[i2s]")
 
             TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
             TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &pin_config));
-            i2s_test_io_config(1);
             TEST_ASSERT((fabs((i2s_get_clk(I2S_NUM_0) - sample_rate_arr[i]))/(sample_rate_arr[i]))*100 < PERCENT_DIFF);
             TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
             TEST_ASSERT(initial_size == esp_get_free_heap_size());
diff --git a/components/soc/include/hal/i2s_hal.h b/components/soc/include/hal/i2s_hal.h
index 21e800977..aa0392261 100644
--- a/components/soc/include/hal/i2s_hal.h
+++ b/components/soc/include/hal/i2s_hal.h
@@ -158,7 +158,7 @@ void i2s_hal_set_rx_mode(i2s_hal_context_t *hal, i2s_channel_t ch, i2s_bits_per_
  */
 void i2s_hal_set_in_link(i2s_hal_context_t *hal, uint32_t rx_eof_num, uint32_t addr);
 
-#if I2S_SUPPORTS_PDM
+#if SOC_I2S_SUPPORTS_PDM
 /**
  * @brief Get I2S tx pdm
  *
@@ -248,7 +248,7 @@ void i2s_hal_stop_tx(i2s_hal_context_t *hal);
  */
 void i2s_hal_stop_rx(i2s_hal_context_t *hal);
 
-#if I2S_SUPPORTS_PDM
+#if SOC_I2S_SUPPORTS_PDM
 /**
  * @brief Set I2S pdm rx down sample
  *
diff --git a/components/soc/include/hal/i2s_types.h b/components/soc/include/hal/i2s_types.h
index f1bd67d19..0846741ce 100644
--- a/components/soc/include/hal/i2s_types.h
+++ b/components/soc/include/hal/i2s_types.h
@@ -82,7 +82,7 @@ typedef enum {
     I2S_CHANNEL_FMT_ONLY_LEFT,
 } i2s_channel_fmt_t;
 
-#if I2S_SUPPORTS_PDM
+#if SOC_I2S_SUPPORTS_PDM
 /**
  * @brief PDM sample rate ratio, measured in Hz.
  *
@@ -113,9 +113,11 @@ typedef enum {
     I2S_MODE_SLAVE = 2,
     I2S_MODE_TX = 4,
     I2S_MODE_RX = 8,
+#if SOC_I2S_SUPPORTS_ADC_DAC
     I2S_MODE_DAC_BUILT_IN = 16,       /*!< Output I2S data to built-in DAC, no matter the data format is 16bit or 32 bit, the DAC module will only take the 8bits from MSB*/
     I2S_MODE_ADC_BUILT_IN = 32,       /*!< Input I2S data from built-in ADC, each data can be 12-bit width at most*/
-#if I2S_SUPPORTS_PDM
+#endif
+#if SOC_I2S_SUPPORTS_PDM
     I2S_MODE_PDM = 64,
 #endif
 } i2s_mode_t;
@@ -182,7 +184,7 @@ typedef struct {
     int data_in_num;    /*!< DATA in pin*/
 } i2s_pin_config_t;
 
-#if I2S_SUPPORTS_PDM
+#if SOC_I2S_SUPPORTS_PDM
 /**
  * @brief I2S PDM RX downsample mode
  */
diff --git a/components/soc/soc/esp32/include/soc/i2s_caps.h b/components/soc/soc/esp32/include/soc/i2s_caps.h
index 5c111790c..07c707e69 100644
--- a/components/soc/soc/esp32/include/soc/i2s_caps.h
+++ b/components/soc/soc/esp32/include/soc/i2s_caps.h
@@ -28,8 +28,9 @@ extern "C" {
 // ESP32 have 2 I2S
 #define SOC_I2S_NUM            (2)
 
-#define I2S_SUPPORTS_PDM       (1) // ESP32 support PDM
-#define I2S_SUPPORTS_DMA_EQUAL (0) // ESP32 don't support dma equal
+#define SOC_I2S_SUPPORTS_PDM       (1) // ESP32 support PDM
+#define SOC_I2S_SUPPORTS_DMA_EQUAL (0) // ESP32 don't support dma equal
+#define SOC_I2S_SUPPORTS_ADC_DAC   (1) // ESP32 support ADC and DAC
 
 #ifdef __cplusplus
 }
diff --git a/components/soc/soc/esp32s2/include/soc/i2s_caps.h b/components/soc/soc/esp32s2/include/soc/i2s_caps.h
index 2432c3a60..17d46803f 100644
--- a/components/soc/soc/esp32s2/include/soc/i2s_caps.h
+++ b/components/soc/soc/esp32s2/include/soc/i2s_caps.h
@@ -25,5 +25,6 @@
 // ESP32-S2 have 2 I2S
 #define SOC_I2S_NUM            (1)
 
-#define I2S_SUPPORTS_PDM       (0) // ESP32-S2 don't support PDM
-#define I2S_SUPPORTS_DMA_EQUAL (1) // ESP32-S2 need dma equal
+#define SOC_I2S_SUPPORTS_PDM       (0) // ESP32-S2 don't support PDM
+#define SOC_I2S_SUPPORTS_DMA_EQUAL (1) // ESP32-S2 need dma equal
+#define SOC_I2S_SUPPORTS_ADC_DAC   (0) // ESP32-S2 don't support ADC and DAC
diff --git a/components/soc/src/hal/i2s_hal.c b/components/soc/src/hal/i2s_hal.c
index ca8e725ab..be3d5aef0 100644
--- a/components/soc/src/hal/i2s_hal.c
+++ b/components/soc/src/hal/i2s_hal.c
@@ -32,7 +32,7 @@ void i2s_hal_set_tx_mode(i2s_hal_context_t *hal, i2s_channel_t ch, i2s_bits_per_
         i2s_ll_set_tx_fifo_mod(hal->dev, (ch == I2S_CHANNEL_STEREO) ? 2 : 3);
     }
     i2s_ll_set_tx_chan_mod(hal->dev, (ch == I2S_CHANNEL_STEREO) ? 0 : 1);
-#if I2S_SUPPORTS_DMA_EQUAL
+#if SOC_I2S_SUPPORTS_DMA_EQUAL
     i2s_ll_set_tx_dma_equal(hal->dev, (ch == I2S_CHANNEL_STEREO) ? 0 : 1);
 #endif
 }
@@ -45,7 +45,7 @@ void i2s_hal_set_rx_mode(i2s_hal_context_t *hal, i2s_channel_t ch, i2s_bits_per_
         i2s_ll_set_rx_fifo_mod(hal->dev, (ch == I2S_CHANNEL_STEREO) ? 2 : 3);
     }
     i2s_ll_set_rx_chan_mod(hal->dev, (ch == I2S_CHANNEL_STEREO) ? 0 : 1);
-#if I2S_SUPPORTS_DMA_EQUAL
+#if SOC_I2S_SUPPORTS_DMA_EQUAL
     i2s_ll_set_rx_dma_equal(hal->dev, (ch == I2S_CHANNEL_STEREO) ? 0 : 1);
 #endif
 }
@@ -56,7 +56,7 @@ void i2s_hal_set_in_link(i2s_hal_context_t *hal, uint32_t bytes_num, uint32_t ad
     i2s_ll_set_rx_eof_num(hal->dev, bytes_num);
 }
 
-#if I2S_SUPPORTS_PDM
+#if SOC_I2S_SUPPORTS_PDM
 void i2s_hal_get_tx_pdm(i2s_hal_context_t *hal, int *fp, int *fs)
 {
     i2s_ll_get_tx_pdm_fp(hal->dev, (uint32_t *)fp);
@@ -129,7 +129,7 @@ void i2s_hal_config_param(i2s_hal_context_t *hal, const i2s_config_t *i2s_config
 
     i2s_ll_set_lcd_en(hal->dev, 0);
     i2s_ll_set_camera_en(hal->dev, 0);
-#if I2S_SUPPORTS_PDM
+#if SOC_I2S_SUPPORTS_PDM
     i2s_ll_set_pcm2pdm_conv_en(hal->dev, 0);
     i2s_ll_set_pdm2pcm_conv_en(hal->dev, 0);
 #endif
@@ -172,13 +172,15 @@ void i2s_hal_config_param(i2s_hal_context_t *hal, const i2s_config_t *i2s_config
         }
     }
 
+#if SOC_I2S_SUPPORTS_ADC_DAC
     if (i2s_config->mode & (I2S_MODE_DAC_BUILT_IN | I2S_MODE_ADC_BUILT_IN)) {
         i2s_ll_set_lcd_en(hal->dev, 1);
         i2s_ll_set_tx_right_first(hal->dev, 1);
         i2s_ll_set_camera_en(hal->dev, 0);
     }
+#endif
 
-#if I2S_SUPPORTS_PDM
+#if SOC_I2S_SUPPORTS_PDM
     if (i2s_config->mode & I2S_MODE_PDM) {
         i2s_ll_set_rx_fifo_mod_force_en(hal->dev, 1);
         i2s_ll_set_tx_fifo_mod_force_en(hal->dev, 1);
diff --git a/examples/peripherals/i2s_adc_dac/CMakeLists.txt b/examples/peripherals/i2s_adc_dac/CMakeLists.txt
index 247885daf..4d8f5ef28 100644
--- a/examples/peripherals/i2s_adc_dac/CMakeLists.txt
+++ b/examples/peripherals/i2s_adc_dac/CMakeLists.txt
@@ -2,6 +2,6 @@
 # in this exact order for cmake to work correctly
 cmake_minimum_required(VERSION 3.5)
 
-set(SUPPORTED_TARGETS esp32 esp32s2beta)
+set(SUPPORTED_TARGETS esp32)
 include($ENV{IDF_PATH}/tools/cmake/project.cmake)
 project(i2s-adc-dac)
diff --git a/examples/peripherals/i2s_adc_dac/main/app_main.c b/examples/peripherals/i2s_adc_dac/main/app_main.c
index 075e81e6f..c97fe96aa 100644
--- a/examples/peripherals/i2s_adc_dac/main/app_main.c
+++ b/examples/peripherals/i2s_adc_dac/main/app_main.c
@@ -9,9 +9,7 @@
 #include "driver/i2s.h"
 #include "driver/adc.h"
 #include "audio_example_file.h"
-#ifdef CONFIG_IDF_TARGET_ESP32
 #include "esp_adc_cal.h"
-#endif
 
 static const char* TAG = "ad/da";
 #define V_REF   1100
@@ -272,17 +270,11 @@ void adc_read_task(void* arg)
 {
     adc1_config_width(ADC_WIDTH_12Bit);
     adc1_config_channel_atten(ADC1_TEST_CHANNEL, ADC_ATTEN_11db);
-#ifdef CONFIG_IDF_TARGET_ESP32
     esp_adc_cal_characteristics_t characteristics;
     esp_adc_cal_characterize(ADC_UNIT_1, ADC_ATTEN_DB_11, ADC_WIDTH_BIT_12, V_REF, &characteristics);
-#endif
     while(1) {
         uint32_t voltage;
-#ifdef CONFIG_IDF_TARGET_ESP32
         esp_adc_cal_get_voltage(ADC1_TEST_CHANNEL, &characteristics, &voltage);
-#else
-        voltage = adc1_get_raw(ADC1_TEST_CHANNEL) * (3300.0 / 4095); // At 11 dB attenuation the maximum voltage is limited by VDD_A(3300 mV), not the full scale voltage.
-#endif
         ESP_LOGI(TAG, "%d mV", voltage);
         vTaskDelay(200 / portTICK_RATE_MS);
     }
diff --git a/tools/ci/config/target-test.yml b/tools/ci/config/target-test.yml
index d42ef24a4..a5eb60b6d 100644
--- a/tools/ci/config/target-test.yml
+++ b/tools/ci/config/target-test.yml
@@ -345,7 +345,7 @@ UT_001:
 
 UT_002:
   extends: .unit_test_template
-  parallel: 13
+  parallel: 14
   tags:
     - ESP32_IDF
     - UT_T1_1
@@ -419,7 +419,7 @@ UT_017:
 
 UT_018:
   extends: .unit_test_template
-  parallel: 3
+  parallel: 4
   tags:
     - ESP32_IDF
     - UT_T1_1
@@ -453,19 +453,6 @@ UT_024:
     - UT_T1_MCPWM
     - psram
 
-UT_026:
-  extends: .unit_test_template
-  tags:
-    - ESP32_IDF
-    - UT_T1_I2S
-    - psram
-
-UT_027:
-  extends: .unit_test_template
-  tags:
-    - ESP32S2BETA_IDF
-    - UT_T1_I2S
-
 UT_028:
   extends: .unit_test_template
   tags: