From ad986849a62d93be378a216980a5af58db0d9a19 Mon Sep 17 00:00:00 2001 From: Ivan Grokhotkov Date: Mon, 18 Nov 2019 13:51:03 +0100 Subject: [PATCH] timer: remove check for POWERON_RESET in the test case The test case may run after an RTC_WDT_RESET (if we are on rev. 0 ESP32), or software reset (when running test cases locally). Also moving the test case next to the other timer group driver tests. --- components/driver/test/test_timer.c | 53 +++++++++++++++++++ components/esp32/test/test_reset_reason.c | 62 ----------------------- 2 files changed, 53 insertions(+), 62 deletions(-) diff --git a/components/driver/test/test_timer.c b/components/driver/test/test_timer.c index c859d4598..ebd23ffc2 100644 --- a/components/driver/test/test_timer.c +++ b/components/driver/test/test_timer.c @@ -836,3 +836,56 @@ TEST_CASE("Timer interrupt register", "[hw_timer]") } TEST_ASSERT_INT_WITHIN(100, heap_size, esp_get_free_heap_size()); } + +// The following test cases are used to check if the timer_group fix works. +// Some applications use a software reset, at the reset time, timer_group happens to generate an interrupt. +// but software reset does not clear interrupt status, this is not safe for application when enable the interrupt of timer_group. +// This case will check under this fix, whether the interrupt status is cleared after timer_group initialization. +static void timer_group_test_init(void) +{ + static const uint32_t time_ms = 100; //Alarm value 100ms. + static const uint16_t timer_div = 10; //Timer prescaler + static const uint32_t ste_val = time_ms * (TIMER_BASE_CLK / timer_div / 1000); + timer_config_t config = { + .divider = timer_div, + .counter_dir = TIMER_COUNT_UP, + .counter_en = TIMER_PAUSE, + .alarm_en = TIMER_ALARM_EN, + .intr_type = TIMER_INTR_LEVEL, + .auto_reload = true, + }; + timer_init(TIMER_GROUP_0, TIMER_0, &config); + timer_set_counter_value(TIMER_GROUP_0, TIMER_0, 0x00000000ULL); + timer_set_alarm_value(TIMER_GROUP_0, TIMER_0, ste_val); + //Now the timer is ready. + //We only need to check the interrupt status and don't have to register a interrupt routine. +} + +static void timer_group_test_first_stage(void) +{ + static uint8_t loop_cnt = 0; + timer_group_test_init(); + //Start timer + timer_start(TIMER_GROUP_0, TIMER_0); + //Waiting for timer_group to generate an interrupt + while( !(timer_group_get_intr_status_in_isr(TIMER_GROUP_0) & TIMER_INTR_T0) && + loop_cnt++ < 100) { + vTaskDelay(200); + } + //TIMERG0.int_raw.t0 == 1 means an interruption has occurred + TEST_ASSERT(timer_group_get_intr_status_in_isr(TIMER_GROUP_0) & TIMER_INTR_T0); + esp_restart(); +} + +static void timer_group_test_second_stage(void) +{ + TEST_ASSERT_EQUAL(ESP_RST_SW, esp_reset_reason()); + timer_group_test_init(); + //After the timer_group is initialized, TIMERG0.int_raw.t0 should be cleared. + TEST_ASSERT_EQUAL(0, TIMERG0.int_raw.t0); +} + +TEST_CASE_MULTIPLE_STAGES("timer_group software reset test", + "[intr_status][intr_status = 0]", + timer_group_test_first_stage, + timer_group_test_second_stage); diff --git a/components/esp32/test/test_reset_reason.c b/components/esp32/test/test_reset_reason.c index 4f8316328..3877dfee9 100644 --- a/components/esp32/test/test_reset_reason.c +++ b/components/esp32/test/test_reset_reason.c @@ -244,66 +244,4 @@ TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_BROWNOUT after brownout event", check_reset_reason_brownout); -// The following test cases are used to check if the timer_group fix works. -// Some applications use a software reset, at the reset time, timer_group happens to generate an interrupt. -// but software reset does not clear interrupt status, this is not safe for application when enable the interrupt of timer_group. -// This case will check under this fix, whether the interrupt status is cleared after timer_group initialization. -static void timer_group_test_init(void) -{ - static const uint32_t time_ms = 100; //Alarm value 100ms. - static const uint16_t timer_div = 10; //Timer prescaler - static const uint32_t ste_val = time_ms * (TIMER_BASE_CLK / timer_div / 1000); - timer_config_t config = { - .divider = timer_div, - .counter_dir = TIMER_COUNT_UP, - .counter_en = TIMER_PAUSE, - .alarm_en = TIMER_ALARM_EN, - .intr_type = TIMER_INTR_LEVEL, - .auto_reload = true, - }; - timer_init(TIMER_GROUP_0, TIMER_0, &config); - timer_set_counter_value(TIMER_GROUP_0, TIMER_0, 0x00000000ULL); - timer_set_alarm_value(TIMER_GROUP_0, TIMER_0, ste_val); - //Now the timer is ready. - //We only need to check the interrupt status and don't have to register a interrupt routine. -} - -static void timer_group_test_first_stage(void) -{ - RESET_REASON rst_res = rtc_get_reset_reason(0); - if(rst_res != POWERON_RESET){ - printf("Not power on reset\n"); - } - TEST_ASSERT_EQUAL(POWERON_RESET, rst_res); - static uint8_t loop_cnt = 0; - timer_group_test_init(); - //Start timer - timer_start(TIMER_GROUP_0, TIMER_0); - //Waiting for timer_group to generate an interrupt - while( !(timer_group_get_intr_status_in_isr(TIMER_GROUP_0) & TIMER_INTR_T0) && - loop_cnt++ < 100) { - vTaskDelay(200); - } - //TIMERG0.int_raw.t0 == 1 means an interruption has occurred - TEST_ASSERT(timer_group_get_intr_status_in_isr(TIMER_GROUP_0) & TIMER_INTR_T0); - esp_restart(); -} - -static void timer_group_test_second_stage(void) -{ - RESET_REASON rst_res = rtc_get_reset_reason(0); - if(rst_res != SW_CPU_RESET){ - printf("Not software reset\n"); - } - TEST_ASSERT_EQUAL(SW_CPU_RESET, rst_res); - timer_group_test_init(); - //After the timer_group is initialized, TIMERG0.int_raw.t0 should be cleared. - TEST_ASSERT_EQUAL(0, TIMERG0.int_raw.t0); -} - -TEST_CASE_MULTIPLE_STAGES("timer_group software reset test", - "[intr_status][intr_status = 0]", - timer_group_test_first_stage, - timer_group_test_second_stage); - /* Not tested here: ESP_RST_SDIO */