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Merge branch 'feature/efuse_esp32s2_add_fields_in_table_v4.2' into 'release/v4.2'

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efuse: Add some fields in efuse_table and update esp_efuse_get_pkg_ver() (v4.2)

See merge request espressif/esp-idf!9994
This commit is contained in:
Angus Gratton 2020-08-17 12:50:49 +08:00
commit a8b8a1531e
5 changed files with 64 additions and 15 deletions
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1
components/bootloader_support/src/bootloader_efuse_esp32s2.c
View file

@ -18,6 +18,7 @@
uint8_t bootloader_common_get_chip_revision(void) uint8_t bootloader_common_get_chip_revision(void)
{ {
// should return the same value as esp_efuse_get_chip_ver()
/* No other revisions for ESP32-S2 */ /* No other revisions for ESP32-S2 */
return 0; return 0;
} }

54
components/efuse/esp32s2/esp_efuse_table.c
View file

@ -17,7 +17,7 @@
#include <assert.h> #include <assert.h>
#include "esp_efuse_table.h" #include "esp_efuse_table.h"
// md5_digest_table 21c19cced6c4c11c1f731e2ece7d74ab // md5_digest_table d9cd89987a033ef74503daeb4dd8dd07
// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY. // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
// If you want to change some fields, you need to change esp_efuse_table.csv file // If you want to change some fields, you need to change esp_efuse_table.csv file
// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file. // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@ -219,6 +219,10 @@ static const esp_efuse_desc_t USB_EXT_PHY_ENABLE[] = {
{EFUSE_BLK0, 57, 1}, // Enable external PHY, {EFUSE_BLK0, 57, 1}, // Enable external PHY,
}; };
static const esp_efuse_desc_t BLOCK0_VERSION[] = {
{EFUSE_BLK0, 59, 2}, // BLOCK0 efuse version,
};
static const esp_efuse_desc_t VDD_SPI_XPD[] = { static const esp_efuse_desc_t VDD_SPI_XPD[] = {
{EFUSE_BLK0, 68, 1}, // VDD_SPI regulator power up, {EFUSE_BLK0, 68, 1}, // VDD_SPI regulator power up,
}; };
@ -380,16 +384,28 @@ static const esp_efuse_desc_t SPI_PAD_CONFIG_D7[] = {
{EFUSE_BLK1, 108, 6}, // SPI_PAD_configure D7, {EFUSE_BLK1, 108, 6}, // SPI_PAD_configure D7,
}; };
static const esp_efuse_desc_t CLK8M_FREQ[] = { static const esp_efuse_desc_t WAFER_VERSION[] = {
{EFUSE_BLK1, 114, 12}, // The frequency of 8M CLK (0.01MHz), {EFUSE_BLK1, 114, 3}, // WAFER version 0:A,
};
static const esp_efuse_desc_t PKG_VERSION[] = {
{EFUSE_BLK1, 117, 4}, // Package version 0:ESP32-S2 1:ESP32-S2FH16 2:ESP32-S2FH32,
};
static const esp_efuse_desc_t BLOCK1_VERSION[] = {
{EFUSE_BLK1, 121, 3}, // BLOCK1 efuse version 0:No calibration 1:With calibration,
}; };
static const esp_efuse_desc_t SYS_DATA_PART0[] = { static const esp_efuse_desc_t SYS_DATA_PART0[] = {
{EFUSE_BLK1, 126, 66}, // System configuration, {EFUSE_BLK1, 126, 66}, // System configuration,
}; };
static const esp_efuse_desc_t SYS_DATA_PART1[] = { static const esp_efuse_desc_t OPTIONAL_UNIQUE_ID[] = {
{EFUSE_BLK2, 0, 256}, // System configuration, {EFUSE_BLK2, 0, 128}, // Optional unique 128-bit ID,
};
static const esp_efuse_desc_t BLOCK2_VERSION[] = {
{EFUSE_BLK2, 132, 3}, // Version of BLOCK2,
}; };
static const esp_efuse_desc_t USER_DATA[] = { static const esp_efuse_desc_t USER_DATA[] = {
@ -673,6 +689,11 @@ const esp_efuse_desc_t* ESP_EFUSE_USB_EXT_PHY_ENABLE[] = {
NULL NULL
}; };
const esp_efuse_desc_t* ESP_EFUSE_BLOCK0_VERSION[] = {
&BLOCK0_VERSION[0], // BLOCK0 efuse version
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_XPD[] = { const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_XPD[] = {
&VDD_SPI_XPD[0], // VDD_SPI regulator power up &VDD_SPI_XPD[0], // VDD_SPI regulator power up
NULL NULL
@ -873,8 +894,18 @@ const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D7[] = {
NULL NULL
}; };
const esp_efuse_desc_t* ESP_EFUSE_CLK8M_FREQ[] = { const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION[] = {
&CLK8M_FREQ[0], // The frequency of 8M CLK (0.01MHz) &WAFER_VERSION[0], // WAFER version 0:A
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_PKG_VERSION[] = {
&PKG_VERSION[0], // Package version 0:ESP32-S2 1:ESP32-S2FH16 2:ESP32-S2FH32
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_BLOCK1_VERSION[] = {
&BLOCK1_VERSION[0], // BLOCK1 efuse version 0:No calibration 1:With calibration
NULL NULL
}; };
@ -883,8 +914,13 @@ const esp_efuse_desc_t* ESP_EFUSE_SYS_DATA_PART0[] = {
NULL NULL
}; };
const esp_efuse_desc_t* ESP_EFUSE_SYS_DATA_PART1[] = { const esp_efuse_desc_t* ESP_EFUSE_OPTIONAL_UNIQUE_ID[] = {
&SYS_DATA_PART1[0], // System configuration &OPTIONAL_UNIQUE_ID[0], // Optional unique 128-bit ID
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_BLOCK2_VERSION[] = {
&BLOCK2_VERSION[0], // Version of BLOCK2
NULL NULL
}; };

11
components/efuse/esp32s2/esp_efuse_table.csv
View file

@ -66,6 +66,7 @@
DIS_DOWNLOAD_MANUAL_ENCRYPT, EFUSE_BLK0, 51, 1, Disable flash encrypt function, other than SPI/Legacy SPI boot mode DIS_DOWNLOAD_MANUAL_ENCRYPT, EFUSE_BLK0, 51, 1, Disable flash encrypt function, other than SPI/Legacy SPI boot mode
USB_EXCHG_PINS, EFUSE_BLK0, 56, 1, Exchange D+ D- pins USB_EXCHG_PINS, EFUSE_BLK0, 56, 1, Exchange D+ D- pins
USB_EXT_PHY_ENABLE, EFUSE_BLK0, 57, 1, Enable external PHY USB_EXT_PHY_ENABLE, EFUSE_BLK0, 57, 1, Enable external PHY
BLOCK0_VERSION, EFUSE_BLK0, 59, 2, BLOCK0 efuse version
# EFUSE_RD_REPEAT_DATA1_REG # # EFUSE_RD_REPEAT_DATA1_REG #
VDD_SPI_XPD, EFUSE_BLK0, 68, 1, VDD_SPI regulator power up VDD_SPI_XPD, EFUSE_BLK0, 68, 1, VDD_SPI regulator power up
@ -122,11 +123,17 @@
SPI_PAD_CONFIG_D5, EFUSE_BLK1, 96, 6, SPI_PAD_configure D5 SPI_PAD_CONFIG_D5, EFUSE_BLK1, 96, 6, SPI_PAD_configure D5
SPI_PAD_CONFIG_D6, EFUSE_BLK1, 102, 6, SPI_PAD_configure D6 SPI_PAD_CONFIG_D6, EFUSE_BLK1, 102, 6, SPI_PAD_configure D6
SPI_PAD_CONFIG_D7, EFUSE_BLK1, 108, 6, SPI_PAD_configure D7 SPI_PAD_CONFIG_D7, EFUSE_BLK1, 108, 6, SPI_PAD_configure D7
CLK8M_FREQ, EFUSE_BLK1, 114, 12, The frequency of 8M CLK (0.01MHz) WAFER_VERSION, EFUSE_BLK1, 114, 3, WAFER version 0:A
PKG_VERSION, EFUSE_BLK1, 117, 4, Package version 0:ESP32-S2 1:ESP32-S2FH16 2:ESP32-S2FH32
BLOCK1_VERSION, EFUSE_BLK1, 121, 3, BLOCK1 efuse version 0:No calibration 1:With calibration
SYS_DATA_PART0, EFUSE_BLK1, 126, 66, System configuration SYS_DATA_PART0, EFUSE_BLK1, 126, 66, System configuration
# SYS_DATA_PART1 BLOCK# - System configuration
#######################
OPTIONAL_UNIQUE_ID, EFUSE_BLK2, 0, 128, Optional unique 128-bit ID
BLOCK2_VERSION, EFUSE_BLK2, 132, 3, Version of BLOCK2
################ ################
SYS_DATA_PART1, EFUSE_BLK2, 0, 256, System configuration
USER_DATA, EFUSE_BLK3, 0, 256, User data USER_DATA, EFUSE_BLK3, 0, 256, User data
KEY0, EFUSE_BLK4, 0, 256, Key0 or user data KEY0, EFUSE_BLK4, 0, 256, Key0 or user data
KEY1, EFUSE_BLK5, 0, 256, Key1 or user data KEY1, EFUSE_BLK5, 0, 256, Key1 or user data

Can't render this file because it contains an unexpected character in line 7 and column 87.

10
components/efuse/esp32s2/include/esp_efuse_table.h
View file

@ -17,7 +17,7 @@ extern "C" {
#endif #endif
// md5_digest_table 21c19cced6c4c11c1f731e2ece7d74ab // md5_digest_table d9cd89987a033ef74503daeb4dd8dd07
// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY. // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
// If you want to change some fields, you need to change esp_efuse_table.csv file // If you want to change some fields, you need to change esp_efuse_table.csv file
// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file. // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@ -73,6 +73,7 @@ extern const esp_efuse_desc_t* ESP_EFUSE_HARD_DIS_JTAG[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT[]; extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT[];
extern const esp_efuse_desc_t* ESP_EFUSE_USB_EXCHG_PINS[]; extern const esp_efuse_desc_t* ESP_EFUSE_USB_EXCHG_PINS[];
extern const esp_efuse_desc_t* ESP_EFUSE_USB_EXT_PHY_ENABLE[]; extern const esp_efuse_desc_t* ESP_EFUSE_USB_EXT_PHY_ENABLE[];
extern const esp_efuse_desc_t* ESP_EFUSE_BLOCK0_VERSION[];
extern const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_XPD[]; extern const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_XPD[];
extern const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_TIEH[]; extern const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_TIEH[];
extern const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_FORCE[]; extern const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_FORCE[];
@ -112,9 +113,12 @@ extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D4[];
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D5[]; extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D5[];
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D6[]; extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D6[];
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D7[]; extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D7[];
extern const esp_efuse_desc_t* ESP_EFUSE_CLK8M_FREQ[]; extern const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION[];
extern const esp_efuse_desc_t* ESP_EFUSE_PKG_VERSION[];
extern const esp_efuse_desc_t* ESP_EFUSE_BLOCK1_VERSION[];
extern const esp_efuse_desc_t* ESP_EFUSE_SYS_DATA_PART0[]; extern const esp_efuse_desc_t* ESP_EFUSE_SYS_DATA_PART0[];
extern const esp_efuse_desc_t* ESP_EFUSE_SYS_DATA_PART1[]; extern const esp_efuse_desc_t* ESP_EFUSE_OPTIONAL_UNIQUE_ID[];
extern const esp_efuse_desc_t* ESP_EFUSE_BLOCK2_VERSION[];
extern const esp_efuse_desc_t* ESP_EFUSE_USER_DATA[]; extern const esp_efuse_desc_t* ESP_EFUSE_USER_DATA[];
extern const esp_efuse_desc_t* ESP_EFUSE_KEY0[]; extern const esp_efuse_desc_t* ESP_EFUSE_KEY0[];
extern const esp_efuse_desc_t* ESP_EFUSE_KEY1[]; extern const esp_efuse_desc_t* ESP_EFUSE_KEY1[];

3
components/efuse/src/esp32s2/esp_efuse_fields.c
View file

@ -32,6 +32,7 @@ const static char *TAG = "efuse";
// Returns chip version from efuse // Returns chip version from efuse
uint8_t esp_efuse_get_chip_ver(void) uint8_t esp_efuse_get_chip_ver(void)
{ {
// should return the same value as bootloader_common_get_chip_revision()
uint32_t chip_ver = 0; uint32_t chip_ver = 0;
// TODO: ESP32S2 does not have this field // TODO: ESP32S2 does not have this field
return chip_ver; return chip_ver;
@ -41,7 +42,7 @@ uint8_t esp_efuse_get_chip_ver(void)
uint32_t esp_efuse_get_pkg_ver(void) uint32_t esp_efuse_get_pkg_ver(void)
{ {
uint32_t pkg_ver = 0; uint32_t pkg_ver = 0;
// TODO: ESP32S2 does not have this field esp_efuse_read_field_blob(ESP_EFUSE_PKG_VERSION, &pkg_ver, 4);
return pkg_ver; return pkg_ver;
} }