diff --git a/components/esp32/dport_access.c b/components/esp32/dport_access.c
index aa4bdbea0..dbb956e82 100644
--- a/components/esp32/dport_access.c
+++ b/components/esp32/dport_access.c
@@ -193,3 +193,13 @@ void esp_dport_access_int_init(void)
         xTaskCreatePinnedToCore(&dport_access_init_core1, "dport1", 512, NULL, 5, NULL, 1);
     }
 }
+
+void esp_dport_access_int_deinit(void)
+{
+    portENTER_CRITICAL_ISR(&g_dport_mux);
+    dport_core_state[0] = DPORT_CORE_STATE_IDLE;
+#ifndef CONFIG_FREERTOS_UNICORE
+    dport_core_state[1] = DPORT_CORE_STATE_IDLE;
+#endif
+    portEXIT_CRITICAL_ISR(&g_dport_mux);
+}
diff --git a/components/esp32/include/esp_dport_access.h b/components/esp32/include/esp_dport_access.h
index 7e6f73247..8b081c5ae 100644
--- a/components/esp32/include/esp_dport_access.h
+++ b/components/esp32/include/esp_dport_access.h
@@ -22,6 +22,7 @@ extern "C" {
 void esp_dport_access_stall_other_cpu_start(void);
 void esp_dport_access_stall_other_cpu_end(void);
 void esp_dport_access_int_init(void);
+void esp_dport_access_int_deinit(void);
 
 #if defined(BOOTLOADER_BUILD) || defined(CONFIG_FREERTOS_UNICORE) || !defined(ESP_PLATFORM)
 #define DPORT_STALL_OTHER_CPU_START()
diff --git a/components/esp32/system_api.c b/components/esp32/system_api.c
index a7193548b..942807600 100644
--- a/components/esp32/system_api.c
+++ b/components/esp32/system_api.c
@@ -246,11 +246,13 @@ void IRAM_ATTR esp_restart(void)
 */
 void IRAM_ATTR esp_restart_noos()
 {
-
     const uint32_t core_id = xPortGetCoreID();
     const uint32_t other_core_id = core_id == 0 ? 1 : 0;
     esp_cpu_stall(other_core_id);
 
+    // other core is now stalled, can access DPORT registers directly
+    esp_dport_access_int_deinit();
+
     // We need to disable TG0/TG1 watchdogs
     // First enable RTC watchdog to be on the safe side
     REG_WRITE(RTC_CNTL_WDTWPROTECT_REG, RTC_CNTL_WDT_WKEY_VALUE);