esp32: Add UT for DPORT
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2 changed files with 78 additions and 3 deletions
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@ -415,4 +415,81 @@ TEST_CASE("Check pre-read workaround DPORT and Hi-interrupt", "[esp32]")
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// Hi-interrupt - CPU1
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run_tasks("accessAPB", accessAPB, "accessDPORT2", accessDPORT2, 10000);
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}
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static uint32_t s_shift_counter;
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/*
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The test_dport_access_reg_read() is similar DPORT_REG_READ() but has differents:
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- generate an interrupt by SET_CCOMPARE
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- additional branch command helps get good reproducing an issue with breaking the DPORT pre-read workaround
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- uncomment (1) and comment (2) it allows seeing the broken pre-read workaround
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For pre-reading the workaround, it is important that the two reading commands APB and DPORT
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are executed without interruption. For this reason, it disables interrupts and to do reading inside the safe area.
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But despite a disabling interrupt it was still possible that these two readings can be interrupted.
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The reason is linked with work parallel execution commands in the pipeline (it is not a bug).
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To resolve this issue (1) was moved to (2) position into the disabled interrupt part.
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When the read command is interrupted after stage E(execute), the result of its execution will be saved in the internal buffer,
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and after returning from the interrupt, this command takes this value from the buffer without repeating the reading,
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which is critical for the DPORT pre-read workaround. To fix it we added additional command under safe area ((1)->(2)).
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*/
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static uint32_t IRAM_ATTR test_dport_access_reg_read(uint32_t reg)
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{
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#if defined(BOOTLOADER_BUILD) || !defined(CONFIG_ESP32_DPORT_WORKAROUND) || !defined(ESP_PLATFORM)
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return _DPORT_REG_READ(reg);
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#else
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uint32_t apb;
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unsigned int intLvl;
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XTHAL_SET_CCOMPARE(2, XTHAL_GET_CCOUNT() + s_shift_counter);
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__asm__ __volatile__ (\
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/* "movi %[APB], "XTSTR(0x3ff40078)"\n" */ /* (1) uncomment for reproduce issue */ \
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"bnez %[APB], kl1\n" /* this branch command helps get good reproducing */ \
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"kl1:\n"\
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"rsil %[LVL], "XTSTR(CONFIG_ESP32_DPORT_DIS_INTERRUPT_LVL)"\n"\
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"movi %[APB], "XTSTR(0x3ff40078)"\n" /* (2) comment for reproduce issue */ \
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"l32i %[APB], %[APB], 0\n"\
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"l32i %[REG], %[REG], 0\n"\
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"wsr %[LVL], "XTSTR(PS)"\n"\
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"rsync\n"\
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: [APB]"=a"(apb), [REG]"+a"(reg), [LVL]"=a"(intLvl)\
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: \
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: "memory" \
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);
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return reg;
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#endif
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}
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// The accessDPORT3 task is similar accessDPORT2 but uses test_dport_access_reg_read() instead of usual DPORT_REG_READ().
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static void accessDPORT3(void *pvParameters)
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{
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xSemaphoreHandle *sema = (xSemaphoreHandle *) pvParameters;
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dport_test_result = true;
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TEST_ESP_OK(esp_intr_alloc(ETS_INTERNAL_TIMER2_INTR_SOURCE, ESP_INTR_FLAG_LEVEL5 | ESP_INTR_FLAG_IRAM, NULL, NULL, &inth));
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int i = 0;
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while (exit_flag == false) {
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if (test_dport_access_reg_read(DPORT_DATE_REG) != test_dport_access_reg_read(DPORT_DATE_REG)) {
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dport_test_result = false;
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break;
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}
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if ((++i % 100) == 0) {
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s_shift_counter = (s_shift_counter + 1) % 30;
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}
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}
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esp_intr_free(inth);
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printf("accessDPORT3 finish\n");
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xSemaphoreGive(*sema);
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vTaskDelete(NULL);
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}
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TEST_CASE("Check pre-read workaround DPORT and Hi-interrupt (2)", "[esp32]")
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{
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s_shift_counter = 1;
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xt_highint5_read_apb = 0;
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dport_test_result = false;
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apb_test_result = true;
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// Access DPORT(pre-read method) - CPU1
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// Hi-interrupt - CPU1
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run_tasks("accessAPB", accessAPB, "accessDPORT3", accessDPORT3, 10000);
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}
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#endif // CONFIG_FREERTOS_UNICORE
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@ -28,9 +28,7 @@ xt_highint5:
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bnez a0, .read_apb_reg
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// Short interrupt
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esync
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rsr a0, CCOUNT
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addi a0, a0, 27
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movi a0, 0
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wsr a0, CCOMPARE2
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esync
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