Merge branch 'bugfix/rtc_vddsdio_details' into 'master'
Fix minor VDDSDIO details See merge request idf/esp-idf!2449
This commit is contained in:
commit
9e09df25fb
4 changed files with 8 additions and 5 deletions
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@ -276,7 +276,7 @@ static void vddsdio_configure()
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{
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{
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#if CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V
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#if CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V
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rtc_vddsdio_config_t cfg = rtc_vddsdio_get_config();
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rtc_vddsdio_config_t cfg = rtc_vddsdio_get_config();
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if (cfg.enable == 1 && cfg.tieh == 0) { // VDDSDIO regulator is enabled @ 1.8V
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if (cfg.enable == 1 && cfg.tieh == RTC_VDDSDIO_TIEH_1_8V) { // VDDSDIO regulator is enabled @ 1.8V
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cfg.drefh = 3;
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cfg.drefh = 3;
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cfg.drefm = 3;
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cfg.drefm = 3;
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cfg.drefl = 3;
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cfg.drefl = 3;
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@ -570,7 +570,7 @@ esp_err_t IRAM_ATTR psram_enable(psram_cache_mode_t mode, psram_vaddr_mode_t vad
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#if CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V
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#if CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V
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// For flash 80Mhz, we must update ldo voltage in case older version of bootloader didn't do this.
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// For flash 80Mhz, we must update ldo voltage in case older version of bootloader didn't do this.
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rtc_vddsdio_config_t cfg = rtc_vddsdio_get_config();
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rtc_vddsdio_config_t cfg = rtc_vddsdio_get_config();
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if (cfg.enable == 1 && cfg.tieh == 0) { // VDDSDIO regulator is enabled @ 1.8V
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if (cfg.enable == 1 && cfg.tieh == RTC_VDDSDIO_TIEH_1_8V) { // VDDSDIO regulator is enabled @ 1.8V
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cfg.drefh = 3;
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cfg.drefh = 3;
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cfg.drefm = 3;
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cfg.drefm = 3;
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cfg.drefl = 3;
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cfg.drefl = 3;
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@ -578,13 +578,16 @@ typedef struct {
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*/
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*/
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void rtc_init(rtc_config_t cfg);
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void rtc_init(rtc_config_t cfg);
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#define RTC_VDDSDIO_TIEH_1_8V 0 //!< TIEH field value for 1.8V VDDSDIO
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#define RTC_VDDSDIO_TIEH_3_3V 1 //!< TIEH field value for 3.3V VDDSDIO
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/**
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/**
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* Structure describing vddsdio configuration
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* Structure describing vddsdio configuration
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*/
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*/
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typedef struct {
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typedef struct {
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uint32_t force : 1; //!< If 1, use configuration from RTC registers; if 0, use EFUSE/bootstrapping pins.
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uint32_t force : 1; //!< If 1, use configuration from RTC registers; if 0, use EFUSE/bootstrapping pins.
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uint32_t enable : 1; //!< Enable VDDSDIO regulator
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uint32_t enable : 1; //!< Enable VDDSDIO regulator
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uint32_t tieh : 1; //!< Select VDDSDIO voltage: 1 — 1.8V, 0 — 3.3V
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uint32_t tieh : 1; //!< Select VDDSDIO voltage. One of RTC_VDDSDIO_TIEH_1_8V, RTC_VDDSDIO_TIEH_3_3V
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uint32_t drefh : 2; //!< Tuning parameter for VDDSDIO regulator
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uint32_t drefh : 2; //!< Tuning parameter for VDDSDIO regulator
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uint32_t drefm : 2; //!< Tuning parameter for VDDSDIO regulator
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uint32_t drefm : 2; //!< Tuning parameter for VDDSDIO regulator
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uint32_t drefl : 2; //!< Tuning parameter for VDDSDIO regulator
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uint32_t drefl : 2; //!< Tuning parameter for VDDSDIO regulator
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@ -132,8 +132,8 @@ rtc_vddsdio_config_t rtc_vddsdio_get_config()
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// Otherwise, VDD_SDIO is controlled by bootstrapping pin
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// Otherwise, VDD_SDIO is controlled by bootstrapping pin
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uint32_t strap_reg = REG_READ(GPIO_STRAP_REG);
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uint32_t strap_reg = REG_READ(GPIO_STRAP_REG);
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result.force = 0;
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result.force = 0;
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result.tieh = (strap_reg & BIT(5)) ? 0 : 1;
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result.tieh = (strap_reg & BIT(5)) ? RTC_VDDSDIO_TIEH_1_8V : RTC_VDDSDIO_TIEH_3_3V;
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result.enable = result.tieh == 0; // only power on the regulator if VDD=1.8
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result.enable = 1;
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return result;
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return result;
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}
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}
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