Merge branch 'bugfix/i2c_add_xqueue_static_allocation' into 'master'
driver(i2c, rmt): Add xQueue and xSemaphore static allocation support when intr_alloc_flag set to ESP_INTR_FLAG_IRAM. See merge request idf/esp-idf!2335
This commit is contained in:
commit
9c53b599b2
4 changed files with 127 additions and 2 deletions
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@ -66,6 +66,7 @@ static DRAM_ATTR i2c_dev_t* const I2C[I2C_NUM_MAX] = { &I2C0, &I2C1 };
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#define I2C_GPIO_PULLUP_ERR_STR "this i2c pin does not support internal pull-up"
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#define I2C_ACK_TYPE_ERR_STR "i2c ack type error"
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#define I2C_DATA_LEN_ERR_STR "i2c data read length error"
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#define I2C_PSRAM_BUFFER_WARN_STR "Using buffer allocated from psram"
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#define I2C_FIFO_FULL_THRESH_VAL (28)
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#define I2C_FIFO_EMPTY_THRESH_VAL (5)
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#define I2C_IO_INIT_LEVEL (1)
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@ -124,6 +125,11 @@ typedef struct {
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i2c_cmd_desc_t cmd_link; /*!< I2C command link */
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QueueHandle_t cmd_evt_queue; /*!< I2C command event queue */
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#if CONFIG_SPIRAM_USE_MALLOC
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uint8_t* evt_queue_storage; /*!< The buffer that will hold the items in the queue */
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int intr_alloc_flags; /*!< Used to allocate the interrupt */
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StaticQueue_t evt_queue_buffer; /*!< The buffer that will hold the queue structure*/
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#endif
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xSemaphoreHandle cmd_mux; /*!< semaphore to lock command process */
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size_t tx_fifo_remain; /*!< tx fifo remain length, for master mode */
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size_t rx_fifo_remain; /*!< rx fifo remain length, for master mode */
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@ -156,7 +162,16 @@ esp_err_t i2c_driver_install(i2c_port_t i2c_num, i2c_mode_t mode, size_t slv_rx_
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ESP_ERR_INVALID_ARG);
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uint32_t intr_mask = 0;
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if (p_i2c_obj[i2c_num] == NULL) {
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#if !CONFIG_SPIRAM_USE_MALLOC
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p_i2c_obj[i2c_num] = (i2c_obj_t*) calloc(1, sizeof(i2c_obj_t));
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#else
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if( !(intr_alloc_flags & ESP_INTR_FLAG_IRAM) ) {
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p_i2c_obj[i2c_num] = (i2c_obj_t*) calloc(1, sizeof(i2c_obj_t));
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} else {
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p_i2c_obj[i2c_num] = (i2c_obj_t*) heap_caps_calloc(1, sizeof(i2c_obj_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
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}
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#endif
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if (p_i2c_obj[i2c_num] == NULL) {
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ESP_LOGE(I2C_TAG, I2C_DRIVER_MALLOC_ERR_STR);
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return ESP_FAIL;
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@ -168,6 +183,9 @@ esp_err_t i2c_driver_install(i2c_port_t i2c_num, i2c_mode_t mode, size_t slv_rx_
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p_i2c->rx_cnt = 0;
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p_i2c->status = I2C_STATUS_IDLE;
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#if CONFIG_SPIRAM_USE_MALLOC
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p_i2c->intr_alloc_flags = intr_alloc_flags;
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#endif
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p_i2c->rx_fifo_remain = I2C_FIFO_LEN;
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p_i2c->tx_fifo_remain = I2C_FIFO_LEN;
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@ -205,7 +223,21 @@ esp_err_t i2c_driver_install(i2c_port_t i2c_num, i2c_mode_t mode, size_t slv_rx_
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} else {
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//semaphore to sync sending process, because we only have 32 bytes for hardware fifo.
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p_i2c->cmd_mux = xSemaphoreCreateMutex();
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#if !CONFIG_SPIRAM_USE_MALLOC
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p_i2c->cmd_evt_queue = xQueueCreate(I2C_EVT_QUEUE_LEN, sizeof(i2c_cmd_evt_t));
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#else
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if( !(intr_alloc_flags & ESP_INTR_FLAG_IRAM) ) {
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p_i2c->cmd_evt_queue = xQueueCreate(I2C_EVT_QUEUE_LEN, sizeof(i2c_cmd_evt_t));
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} else {
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p_i2c->evt_queue_storage = (uint8_t *)heap_caps_calloc(I2C_EVT_QUEUE_LEN, sizeof(i2c_cmd_evt_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
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if( p_i2c->evt_queue_storage == NULL ) {
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ESP_LOGE(I2C_TAG, I2C_DRIVER_MALLOC_ERR_STR);
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goto err;
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}
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memset(&p_i2c->evt_queue_buffer, 0, sizeof(StaticQueue_t));
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p_i2c->cmd_evt_queue = xQueueCreateStatic(I2C_EVT_QUEUE_LEN, sizeof(i2c_cmd_evt_t), p_i2c->evt_queue_storage, &p_i2c->evt_queue_buffer);
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}
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#endif
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if (p_i2c->cmd_mux == NULL || p_i2c->cmd_evt_queue == NULL) {
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ESP_LOGE(I2C_TAG, I2C_SEM_ERR_STR);
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goto err;
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@ -262,6 +294,12 @@ esp_err_t i2c_driver_install(i2c_port_t i2c_num, i2c_mode_t mode, size_t slv_rx_
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if (p_i2c_obj[i2c_num]->slv_tx_mux) {
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vSemaphoreDelete(p_i2c_obj[i2c_num]->slv_tx_mux);
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}
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#if CONFIG_SPIRAM_USE_MALLOC
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if (p_i2c_obj[i2c_num]->evt_queue_storage) {
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free(p_i2c_obj[i2c_num]->evt_queue_storage);
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p_i2c_obj[i2c_num]->evt_queue_storage = NULL;
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}
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#endif
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}
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free(p_i2c_obj[i2c_num]);
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p_i2c_obj[i2c_num] = NULL;
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@ -324,6 +362,12 @@ esp_err_t i2c_driver_delete(i2c_port_t i2c_num)
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p_i2c->tx_ring_buf = NULL;
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p_i2c->tx_buf_length = 0;
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}
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#if CONFIG_SPIRAM_USE_MALLOC
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if (p_i2c_obj[i2c_num]->evt_queue_storage) {
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free(p_i2c_obj[i2c_num]->evt_queue_storage);
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p_i2c_obj[i2c_num]->evt_queue_storage = NULL;
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}
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#endif
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free(p_i2c_obj[i2c_num]);
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p_i2c_obj[i2c_num] = NULL;
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@ -839,7 +883,11 @@ esp_err_t i2c_set_pin(i2c_port_t i2c_num, int sda_io_num, int scl_io_num, gpio_p
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i2c_cmd_handle_t i2c_cmd_link_create()
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{
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#if !CONFIG_SPIRAM_USE_MALLOC
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i2c_cmd_desc_t* cmd_desc = (i2c_cmd_desc_t*) calloc(1, sizeof(i2c_cmd_desc_t));
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#else
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i2c_cmd_desc_t* cmd_desc = (i2c_cmd_desc_t*) heap_caps_calloc(1, sizeof(i2c_cmd_desc_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
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#endif
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return (i2c_cmd_handle_t) cmd_desc;
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}
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@ -865,7 +913,11 @@ static esp_err_t i2c_cmd_link_append(i2c_cmd_handle_t cmd_handle, i2c_cmd_t* cmd
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{
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i2c_cmd_desc_t* cmd_desc = (i2c_cmd_desc_t*) cmd_handle;
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if (cmd_desc->head == NULL) {
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cmd_desc->head = (i2c_cmd_link_t*) malloc(sizeof(i2c_cmd_link_t));
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#if !CONFIG_SPIRAM_USE_MALLOC
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cmd_desc->head = (i2c_cmd_link_t*) calloc(1, sizeof(i2c_cmd_link_t));
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#else
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cmd_desc->head = (i2c_cmd_link_t*) heap_caps_calloc(1, sizeof(i2c_cmd_link_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
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#endif
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if (cmd_desc->head == NULL) {
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ESP_LOGE(I2C_TAG, I2C_CMD_MALLOC_ERR_STR);
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goto err;
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@ -873,7 +925,11 @@ static esp_err_t i2c_cmd_link_append(i2c_cmd_handle_t cmd_handle, i2c_cmd_t* cmd
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cmd_desc->cur = cmd_desc->head;
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cmd_desc->free = cmd_desc->head;
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} else {
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cmd_desc->cur->next = (i2c_cmd_link_t*) malloc(sizeof(i2c_cmd_link_t));
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#if !CONFIG_SPIRAM_USE_MALLOC
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cmd_desc->cur->next = (i2c_cmd_link_t*) calloc(1, sizeof(i2c_cmd_link_t));
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#else
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cmd_desc->cur->next = (i2c_cmd_link_t*) heap_caps_calloc(1, sizeof(i2c_cmd_link_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
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#endif
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if (cmd_desc->cur->next == NULL) {
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ESP_LOGE(I2C_TAG, I2C_CMD_MALLOC_ERR_STR);
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goto err;
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@ -1128,6 +1184,23 @@ static void IRAM_ATTR i2c_master_cmd_begin_static(i2c_port_t i2c_num)
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return;
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}
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#if CONFIG_SPIRAM_USE_MALLOC
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//Check whether read or write buffer in cmd_link is internal.
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static bool is_cmd_link_buffer_internal(i2c_cmd_link_t *link)
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{
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i2c_cmd_link_t* cmd_link = link;
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while(cmd_link != NULL) {
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if (cmd_link->cmd.op_code == I2C_CMD_WRITE || cmd_link->cmd.op_code == I2C_CMD_READ) {
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if( cmd_link->cmd.data != NULL && !esp_ptr_internal(cmd_link->cmd.data)) {
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return false;
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}
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}
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cmd_link = cmd_link->next;
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}
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return true;
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}
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#endif
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esp_err_t i2c_master_cmd_begin(i2c_port_t i2c_num, i2c_cmd_handle_t cmd_handle, TickType_t ticks_to_wait)
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{
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I2C_CHECK(( i2c_num < I2C_NUM_MAX ), I2C_NUM_ERROR_STR, ESP_ERR_INVALID_ARG);
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@ -1135,6 +1208,16 @@ esp_err_t i2c_master_cmd_begin(i2c_port_t i2c_num, i2c_cmd_handle_t cmd_handle,
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I2C_CHECK(p_i2c_obj[i2c_num]->mode == I2C_MODE_MASTER, I2C_MASTER_MODE_ERR_STR, ESP_ERR_INVALID_STATE);
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I2C_CHECK(cmd_handle != NULL, I2C_CMD_LINK_INIT_ERR_STR, ESP_ERR_INVALID_ARG);
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#if CONFIG_SPIRAM_USE_MALLOC
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//If the i2c read or write buffer is not in internal RAM, we will return ESP_FAIL
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//to avoid the ISR handler function crashing when the cache is disabled.
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if( (p_i2c_obj[i2c_num]->intr_alloc_flags & ESP_INTR_FLAG_IRAM) ) {
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if( !is_cmd_link_buffer_internal(((i2c_cmd_desc_t*)cmd_handle)->head) ) {
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ESP_LOGE(I2C_TAG, I2C_PSRAM_BUFFER_WARN_STR);
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return ESP_ERR_INVALID_ARG;
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}
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}
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#endif
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// Sometimes when the FSM get stuck, the ACK_ERR interrupt will occur endlessly until we reset the FSM and clear bus.
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static uint8_t clear_bus_cnt = 0;
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esp_err_t ret = ESP_FAIL;
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@ -113,6 +113,10 @@ typedef void* i2c_cmd_handle_t; /*!< I2C command handle */
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* Only slave mode will use this value, driver will ignore this value in master mode.
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* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
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* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
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* @note
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* In master mode, if the cache is likely to be disabled(such as write flash) and the slave is time-sensitive,
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* `ESP_INTR_FLAG_IRAM` is suggested to be used. In this case, please use the memory allocated from internal RAM in i2c read and write function,
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* because we can not access the psram(if psram is enabled) in interrupt handle function when cache is disabled.
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*
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* @return
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* - ESP_OK Success
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@ -272,6 +276,8 @@ esp_err_t i2c_master_write_byte(i2c_cmd_handle_t cmd_handle, uint8_t data, bool
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*
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* @param cmd_handle I2C cmd link
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* @param data data to send
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* @note
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* If the psram is enabled and intr_flag is `ESP_INTR_FLAG_IRAM`, please use the memory allocated from internal RAM.
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* @param data_len data length
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* @param ack_en enable ack check for master
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*
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@ -289,6 +295,8 @@ esp_err_t i2c_master_write(i2c_cmd_handle_t cmd_handle, uint8_t* data, size_t da
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*
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* @param cmd_handle I2C cmd link
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* @param data pointer accept the data byte
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* @note
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* If the psram is enabled and intr_flag is `ESP_INTR_FLAG_IRAM`, please use the memory allocated from internal RAM.
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* @param ack ack value for read command
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*
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* @return
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@ -305,6 +313,8 @@ esp_err_t i2c_master_read_byte(i2c_cmd_handle_t cmd_handle, uint8_t* data, i2c_a
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*
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* @param cmd_handle I2C cmd link
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* @param data data buffer to accept the data from bus
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* @note
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* If the psram is enabled and intr_flag is `ESP_INTR_FLAG_IRAM`, please use the memory allocated from internal RAM.
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* @param data_len read data length
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* @param ack ack value for read command
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*
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@ -632,6 +632,7 @@ esp_err_t rmt_fill_tx_items(rmt_channel_t channel, const rmt_item32_t* item, uin
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* @param rx_buf_size Size of RMT RX ringbuffer. Can be 0 if the RX ringbuffer is not used.
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*
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* @param intr_alloc_flags Flags for the RMT driver interrupt handler. Pass 0 for default flags. See esp_intr_alloc.h for details.
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* If ESP_INTR_FLAG_IRAM is used, please do not use the memory allocated from psram when calling rmt_write_items.
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*
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* @return
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* - ESP_ERR_INVALID_STATE Driver is already installed, call rmt_driver_uninstall first.
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@ -660,6 +661,7 @@ esp_err_t rmt_driver_uninstall(rmt_channel_t channel);
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* @param channel RMT channel (0 - 7)
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*
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* @param rmt_item head point of RMT items array.
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* If ESP_INTR_FLAG_IRAM is used, please do not use the memory allocated from psram when calling rmt_write_items.
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*
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* @param item_num RMT data item number.
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*
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@ -45,6 +45,7 @@
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#define RMT_CLK_DIV_ERROR_STR "RMT CLK DIV ERR"
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#define RMT_DRIVER_ERROR_STR "RMT DRIVER ERR"
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#define RMT_DRIVER_LENGTH_ERROR_STR "RMT PARAM LEN ERROR"
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#define RMT_PSRAM_BUFFER_WARN_STR "Using buffer allocated from psram"
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static const char* RMT_TAG = "rmt";
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static uint8_t s_rmt_driver_channels; // Bitmask (bits 0-7) of installed drivers' channels
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@ -70,6 +71,10 @@ typedef struct {
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rmt_channel_t channel;
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const rmt_item32_t* tx_data;
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xSemaphoreHandle tx_sem;
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#if CONFIG_SPIRAM_USE_MALLOC
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int intr_alloc_flags;
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StaticSemaphore_t tx_sem_buffer;
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#endif
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RingbufHandle_t tx_buf;
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RingbufHandle_t rx_buf;
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} rmt_obj_t;
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@ -690,7 +695,15 @@ esp_err_t rmt_driver_install(rmt_channel_t channel, size_t rx_buf_size, int intr
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return ESP_ERR_INVALID_STATE;
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}
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#if !CONFIG_SPIRAM_USE_MALLOC
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p_rmt_obj[channel] = (rmt_obj_t*) malloc(sizeof(rmt_obj_t));
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#else
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if( !(intr_alloc_flags & ESP_INTR_FLAG_IRAM) ) {
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p_rmt_obj[channel] = (rmt_obj_t*) malloc(sizeof(rmt_obj_t));
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} else {
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p_rmt_obj[channel] = (rmt_obj_t*) heap_caps_calloc(1, sizeof(rmt_obj_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
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}
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#endif
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if(p_rmt_obj[channel] == NULL) {
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ESP_LOGE(RMT_TAG, "RMT driver malloc error");
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@ -706,7 +719,16 @@ esp_err_t rmt_driver_install(rmt_channel_t channel, size_t rx_buf_size, int intr
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p_rmt_obj[channel]->wait_done = false;
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if(p_rmt_obj[channel]->tx_sem == NULL) {
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#if !CONFIG_SPIRAM_USE_MALLOC
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p_rmt_obj[channel]->tx_sem = xSemaphoreCreateBinary();
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#else
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p_rmt_obj[channel]->intr_alloc_flags = intr_alloc_flags;
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if( !(intr_alloc_flags & ESP_INTR_FLAG_IRAM) ) {
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p_rmt_obj[channel]->tx_sem = xSemaphoreCreateBinary();
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} else {
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p_rmt_obj[channel]->tx_sem = xSemaphoreCreateBinaryStatic(&p_rmt_obj[channel]->tx_sem_buffer);
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}
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#endif
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xSemaphoreGive(p_rmt_obj[channel]->tx_sem);
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}
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if(p_rmt_obj[channel]->rx_buf == NULL && rx_buf_size > 0) {
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@ -736,6 +758,14 @@ esp_err_t rmt_write_items(rmt_channel_t channel, const rmt_item32_t* rmt_item, i
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RMT_CHECK(p_rmt_obj[channel] != NULL, RMT_DRIVER_ERROR_STR, ESP_FAIL);
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RMT_CHECK(rmt_item != NULL, RMT_ADDR_ERROR_STR, ESP_FAIL);
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RMT_CHECK(item_num > 0, RMT_DRIVER_LENGTH_ERROR_STR, ESP_ERR_INVALID_ARG);
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#if CONFIG_SPIRAM_USE_MALLOC
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if( p_rmt_obj[channel]->intr_alloc_flags & ESP_INTR_FLAG_IRAM ) {
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if( !esp_ptr_internal(rmt_item) ) {
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ESP_LOGE(RMT_TAG, RMT_PSRAM_BUFFER_WARN_STR);
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return ESP_ERR_INVALID_ARG;
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}
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}
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#endif
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rmt_obj_t* p_rmt = p_rmt_obj[channel];
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int block_num = RMT.conf_ch[channel].conf0.mem_size;
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int item_block_len = block_num * RMT_MEM_ITEM_NUM;
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