From 9baa7826be9e2fcf194a934763f54d3ba0a677ba Mon Sep 17 00:00:00 2001 From: "Michael (XIAO Xufeng)" Date: Tue, 6 Aug 2019 17:59:26 +0800 Subject: [PATCH] fix unit test and examples for s2beta --- components/app_update/test/test_switch_ota.c | 6 +- .../test/test_verify_image.c | 1 - components/driver/test/CMakeLists.txt | 12 +- components/driver/test/component.mk | 1 + .../driver/test/{ => esp32}/test_gpio.c | 9 +- components/driver/test/esp32/test_i2s.c | 187 +++ .../driver/test/{ => esp32}/test_ledc.c | 1 - .../driver/test/{ => esp32}/test_pcnt.c | 1 - components/driver/test/{ => esp32}/test_pwm.c | 1 - .../test/include/test/test_common_spi.h | 39 +- components/driver/test/test_i2s.c | 166 --- .../driver/test/test_sdmmc_sdspi_init.cpp | 7 + components/driver/test/test_spi_master.c | 47 +- components/driver/test/test_spi_param.c | 66 +- components/driver/test/test_spi_sio.c | 12 +- components/driver/test/test_spi_slave.c | 8 +- components/efuse/test/CMakeLists.txt | 9 +- components/esp32/test/CMakeLists.txt | 25 +- components/esp32/test/test_aes_sha_rsa.c | 1 - components/esp32/test/test_intr_alloc.c | 5 +- components/esp32/test/test_sleep.c | 25 +- components/esp_eth/test/CMakeLists.txt | 8 +- components/esp_event/test/CMakeLists.txt | 11 +- components/esp_event/test/component.mk | 2 + components/esp_event/test/esp32/test_event.c | 1220 +++++++++++++++++ components/esp_event/test/test_event.c | 77 -- components/esp_wifi/test/CMakeLists.txt | 12 +- components/esp_wifi/test/component.mk | 1 + .../esp_wifi/test/{ => esp32}/test_phy_rtc.c | 21 +- components/fatfs/test/CMakeLists.txt | 14 +- components/fatfs/test/component.mk | 1 + .../fatfs/test/{ => esp32}/test_fatfs_sdmmc.c | 2 +- components/freertos/test/CMakeLists.txt | 14 +- components/freertos/test/component.mk | 1 + .../test_freertos_task_delay_until.c | 6 - components/heap/test/test_malloc.c | 1 - components/newlib/test/test_time.c | 1 - components/sdmmc/test/CMakeLists.txt | 8 +- components/sdmmc/test/test_sdio.c | 2 - components/spi_flash/test/CMakeLists.txt | 6 +- components/spi_flash/test/component.mk | 1 + .../test/{ => esp32}/test_esp_flash.c | 0 components/ulp/test/CMakeLists.txt | 16 +- components/ulp/test/component.mk | 8 +- components/ulp/test/{ => esp32}/test_ulp.c | 0 components/ulp/test/{ => esp32}/test_ulp_as.c | 0 .../ulp/{test_jumps.S => test_jumps_esp32.S} | 0 components/vfs/test/CMakeLists.txt | 14 +- components/vfs/test/component.mk | 1 + .../vfs/test/{ => esp32}/test_vfs_uart.c | 0 components/wear_levelling/test/CMakeLists.txt | 15 +- components/wear_levelling/test/component.mk | 1 + .../wear_levelling/test/esp32/test_wl.c | 88 ++ components/wear_levelling/test/test_wl.c | 86 +- .../spi_master/main/CMakeLists.txt | 2 +- 55 files changed, 1782 insertions(+), 487 deletions(-) rename components/driver/test/{ => esp32}/test_gpio.c (99%) create mode 100644 components/driver/test/esp32/test_i2s.c rename components/driver/test/{ => esp32}/test_ledc.c (99%) rename components/driver/test/{ => esp32}/test_pcnt.c (99%) rename components/driver/test/{ => esp32}/test_pwm.c (99%) create mode 100644 components/esp_event/test/esp32/test_event.c rename components/esp_wifi/test/{ => esp32}/test_phy_rtc.c (94%) rename components/fatfs/test/{ => esp32}/test_fatfs_sdmmc.c (99%) rename components/freertos/test/{ => esp32}/test_freertos_task_delay_until.c (95%) rename components/spi_flash/test/{ => esp32}/test_esp_flash.c (100%) rename components/ulp/test/{ => esp32}/test_ulp.c (100%) rename components/ulp/test/{ => esp32}/test_ulp_as.c (100%) rename components/ulp/test/ulp/{test_jumps.S => test_jumps_esp32.S} (100%) rename components/vfs/test/{ => esp32}/test_vfs_uart.c (100%) create mode 100644 components/wear_levelling/test/esp32/test_wl.c diff --git a/components/app_update/test/test_switch_ota.c b/components/app_update/test/test_switch_ota.c index f0d056d9b..9d95bb009 100644 --- a/components/app_update/test/test_switch_ota.c +++ b/components/app_update/test/test_switch_ota.c @@ -7,9 +7,13 @@ #include "string.h" #include "sdkconfig.h" +#if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/spi_flash.h" #include "esp32/rom/rtc.h" -#include "esp32/rom/ets_sys.h" +#elif CONFIG_IDF_TARGET_ESP32S2BETA +#include "esp32s2beta/rom/spi_flash.h" +#include "esp32s2beta/rom/rtc.h" +#endif #include "freertos/FreeRTOS.h" #include "freertos/task.h" diff --git a/components/bootloader_support/test/test_verify_image.c b/components/bootloader_support/test/test_verify_image.c index d5a7c84ae..c07512893 100644 --- a/components/bootloader_support/test/test_verify_image.c +++ b/components/bootloader_support/test/test_verify_image.c @@ -5,7 +5,6 @@ #include #include #include "string.h" -#include "esp32/rom/ets_sys.h" #include "freertos/FreeRTOS.h" #include "freertos/task.h" diff --git a/components/driver/test/CMakeLists.txt b/components/driver/test/CMakeLists.txt index 7102bae72..f6245349c 100644 --- a/components/driver/test/CMakeLists.txt +++ b/components/driver/test/CMakeLists.txt @@ -1,3 +1,9 @@ -idf_component_register(SRC_DIRS "." "param_test" - INCLUDE_DIRS "include" "param_test/include" - REQUIRES unity test_utils driver nvs_flash) \ No newline at end of file +set(srcdirs . param_test) +if(IDF_TARGET STREQUAL "esp32") + list(APPEND srcdirs "esp32") +endif() + +idf_component_register(SRC_DIRS ${srcdirs} + INCLUDE_DIRS include param_test/include + REQUIRES unity test_utils driver nvs_flash + ) diff --git a/components/driver/test/component.mk b/components/driver/test/component.mk index 2f9f42ccd..f37a1fa51 100644 --- a/components/driver/test/component.mk +++ b/components/driver/test/component.mk @@ -2,6 +2,7 @@ #Component Makefile # +COMPONENT_SRCDIRS += esp32 COMPONENT_SRCDIRS += param_test COMPONENT_PRIV_INCLUDEDIRS += param_test/include diff --git a/components/driver/test/test_gpio.c b/components/driver/test/esp32/test_gpio.c similarity index 99% rename from components/driver/test/test_gpio.c rename to components/driver/test/esp32/test_gpio.c index c40815683..8777e5207 100644 --- a/components/driver/test/test_gpio.c +++ b/components/driver/test/esp32/test_gpio.c @@ -4,7 +4,7 @@ */ #include #include -#include "esp32/rom/uart.h" + #include "esp_system.h" #include "esp_sleep.h" #include "unity.h" @@ -12,6 +12,13 @@ #include "freertos/FreeRTOS.h" #include "freertos/task.h" #include "freertos/queue.h" +#include "sdkconfig.h" + +#if CONFIG_IDF_TARGET_ESP32 +#include "esp32/rom/uart.h" +#elif CONFIG_IDF_TARGET_ESP32S2BETA +#include "esp32s2beta/rom/uart.h" +#endif #define WAKE_UP_IGNORE 1 // gpio_wakeup function development is not completed yet, set it deprecated. #define GPIO_OUTPUT_IO 18 // default output GPIO diff --git a/components/driver/test/esp32/test_i2s.c b/components/driver/test/esp32/test_i2s.c new file mode 100644 index 000000000..72e12c2f8 --- /dev/null +++ b/components/driver/test/esp32/test_i2s.c @@ -0,0 +1,187 @@ +/** + * I2S test environment UT_T1_I2S: + * connect GPIO18 and GPIO19, GPIO25 and GPIO26, GPIO21 and GPIO22 + */ + +#include +#include +#include "freertos/FreeRTOS.h" +#include "freertos/task.h" +#include "driver/i2s.h" +#include "unity.h" + +#define SAMPLE_RATE (36000) +#define SAMPLE_BITS (16) +#define MASTER_BCK_IO 18 +#define MASTER_WS_IO 25 +#define SLAVE_BCK_IO 19 +#define SLAVE_WS_IO 26 +#define DATA_IN_IO 21 +#define DATA_OUT_IO 22 + + +TEST_CASE("I2S write and read test(master tx and slave rx)", "[i2s][test_env=UT_T1_I2S]") +{ + // master driver installed and send data + i2s_config_t master_i2s_config = { + .mode = I2S_MODE_MASTER | I2S_MODE_TX, + .sample_rate = SAMPLE_RATE, + .bits_per_sample = SAMPLE_BITS, + .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, + .communication_format = I2S_COMM_FORMAT_I2S | I2S_COMM_FORMAT_I2S_MSB, + .dma_buf_count = 6, + .dma_buf_len = 100, + .use_apll = 0, + .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 , + }; + i2s_pin_config_t master_pin_config = { + .bck_io_num = MASTER_BCK_IO, + .ws_io_num = MASTER_WS_IO, + .data_out_num = DATA_OUT_IO, + .data_in_num = -1 + }; + TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL)); + TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config)); + printf("\r\nheap size: %d\n", esp_get_free_heap_size()); + + i2s_config_t slave_i2s_config = { + .mode = I2S_MODE_SLAVE | I2S_MODE_RX, + .sample_rate = SAMPLE_RATE, + .bits_per_sample = SAMPLE_BITS, + .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, + .communication_format = I2S_COMM_FORMAT_I2S | I2S_COMM_FORMAT_I2S_MSB, + .dma_buf_count = 6, + .dma_buf_len = 100, + .use_apll = 0, + .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 , + }; + i2s_pin_config_t slave_pin_config = { + .bck_io_num = SLAVE_BCK_IO, + .ws_io_num = SLAVE_WS_IO, + .data_out_num = -1, + .data_in_num = DATA_IN_IO, + }; + // slave driver installed and receive data + TEST_ESP_OK(i2s_driver_install(I2S_NUM_1, &slave_i2s_config, 0, NULL)); + TEST_ESP_OK(i2s_set_pin(I2S_NUM_1, &slave_pin_config)); + printf("\r\nheap size: %d\n", esp_get_free_heap_size()); + + uint8_t* data_wr = (uint8_t*)malloc(sizeof(uint8_t)*400); + size_t i2s_bytes_write = 0; + size_t bytes_read = 0; + int length = 0; + uint8_t *i2s_read_buff = (uint8_t*)malloc(sizeof(uint8_t)*10000); + + for(int i=0; i<100; i++) { + data_wr[i] = i+1; + } + int flag=0; // break loop flag + int end_position = 0; + // write data to slave + i2s_write(I2S_NUM_0, data_wr, sizeof(uint8_t)*400, &i2s_bytes_write, 1000 / portTICK_PERIOD_MS); + while(!flag){ + i2s_read(I2S_NUM_1, i2s_read_buff + length, sizeof(uint8_t)*500, &bytes_read, 1000/portMAX_DELAY); + if(bytes_read>0) { + printf("read data size: %d\n", bytes_read); + for(int i=length; i 0) { + for(int i=length; i #include #include -#include "esp32/rom/ets_sys.h" #include "freertos/FreeRTOS.h" #include "freertos/task.h" #include "freertos/semphr.h" diff --git a/components/driver/test/test_pcnt.c b/components/driver/test/esp32/test_pcnt.c similarity index 99% rename from components/driver/test/test_pcnt.c rename to components/driver/test/esp32/test_pcnt.c index 90dc2c4ec..826cab0cd 100644 --- a/components/driver/test/test_pcnt.c +++ b/components/driver/test/esp32/test_pcnt.c @@ -22,7 +22,6 @@ #include "esp_log.h" #include "soc/gpio_periph.h" #include "unity.h" -#include "esp32/rom/ets_sys.h" #define PULSE_IO 18 #define PCNT_INPUT_IO 4 diff --git a/components/driver/test/test_pwm.c b/components/driver/test/esp32/test_pwm.c similarity index 99% rename from components/driver/test/test_pwm.c rename to components/driver/test/esp32/test_pwm.c index b787f8e3a..34780da3f 100644 --- a/components/driver/test/test_pwm.c +++ b/components/driver/test/esp32/test_pwm.c @@ -25,7 +25,6 @@ #include "esp_attr.h" #include "esp_log.h" #include "soc/rtc.h" -#include "esp32/rom/ets_sys.h" #define GPIO_PWMA_OUT 4 #define GPIO_PWMB_OUT 13 diff --git a/components/driver/test/include/test/test_common_spi.h b/components/driver/test/include/test/test_common_spi.h index 38fa59237..fea4df7d0 100644 --- a/components/driver/test/include/test/test_common_spi.h +++ b/components/driver/test/include/test/test_common_spi.h @@ -13,9 +13,43 @@ // All the tests using the header should use this definition as much as possible, // so that the working host can be changed easily in the future. +#if CONFIG_IDF_TARGET_ESP32 #define TEST_SPI_HOST HSPI_HOST #define TEST_SLAVE_HOST VSPI_HOST +#define PIN_NUM_MISO HSPI_IOMUX_PIN_NUM_MISO +#define PIN_NUM_MOSI HSPI_IOMUX_PIN_NUM_MOSI +#define PIN_NUM_CLK HSPI_IOMUX_PIN_NUM_CLK +#define PIN_NUM_CS HSPI_IOMUX_PIN_NUM_CS +#define PIN_NUM_WP HSPI_IOMUX_PIN_NUM_WP +#define PIN_NUM_HD HSPI_IOMUX_PIN_NUM_HD + +#define SLAVE_PIN_NUM_MISO VSPI_IOMUX_PIN_NUM_MISO +#define SLAVE_PIN_NUM_MOSI VSPI_IOMUX_PIN_NUM_MOSI +#define SLAVE_PIN_NUM_CLK VSPI_IOMUX_PIN_NUM_CLK +#define SLAVE_PIN_NUM_CS VSPI_IOMUX_PIN_NUM_CS +#define SLAVE_PIN_NUM_WP VSPI_IOMUX_PIN_NUM_WP +#define SLAVE_PIN_NUM_HD VSPI_IOMUX_PIN_NUM_HD +#elif CONFIG_IDF_TARGET_ESP32S2BETA +#define TEST_SPI_HOST FSPI_HOST +#define TEST_SLAVE_HOST HSPI_HOST + +#define PIN_NUM_MISO FSPI_IOMUX_PIN_NUM_MISO +#define PIN_NUM_MOSI FSPI_IOMUX_PIN_NUM_MOSI +#define PIN_NUM_CLK FSPI_IOMUX_PIN_NUM_CLK +#define PIN_NUM_CS FSPI_IOMUX_PIN_NUM_CS +#define PIN_NUM_WP FSPI_IOMUX_PIN_NUM_WP +#define PIN_NUM_HD FSPI_IOMUX_PIN_NUM_HD + +#define SLAVE_PIN_NUM_MISO HSPI_IOMUX_PIN_NUM_MISO +#define SLAVE_PIN_NUM_MOSI HSPI_IOMUX_PIN_NUM_MOSI +#define SLAVE_PIN_NUM_CLK HSPI_IOMUX_PIN_NUM_CLK +#define SLAVE_PIN_NUM_CS HSPI_IOMUX_PIN_NUM_CS +#define SLAVE_PIN_NUM_WP HSPI_IOMUX_PIN_NUM_WP +#define SLAVE_PIN_NUM_HD HSPI_IOMUX_PIN_NUM_HD +#endif + + #define FUNC_SPI 1 #define FUNC_GPIO 2 @@ -52,11 +86,6 @@ 0,\ } -#define PIN_NUM_MISO HSPI_IOMUX_PIN_NUM_MISO -#define PIN_NUM_MOSI HSPI_IOMUX_PIN_NUM_MOSI -#define PIN_NUM_CLK HSPI_IOMUX_PIN_NUM_CLK -#define PIN_NUM_CS HSPI_IOMUX_PIN_NUM_CS - //default bus config for tests #define SPI_BUS_TEST_DEFAULT_CONFIG() {\ .miso_io_num=PIN_NUM_MISO, \ diff --git a/components/driver/test/test_i2s.c b/components/driver/test/test_i2s.c index 813a906cb..451c02cc9 100644 --- a/components/driver/test/test_i2s.c +++ b/components/driver/test/test_i2s.c @@ -69,172 +69,6 @@ TEST_CASE("I2S basic driver install, uninstall, set pin test", "[i2s]") TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0)); } -TEST_CASE("I2S write and read test(master tx and slave rx)", "[i2s][test_env=UT_T1_I2S]") -{ - // master driver installed and send data - i2s_config_t master_i2s_config = { - .mode = I2S_MODE_MASTER | I2S_MODE_TX, - .sample_rate = SAMPLE_RATE, - .bits_per_sample = SAMPLE_BITS, - .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, - .communication_format = I2S_COMM_FORMAT_I2S | I2S_COMM_FORMAT_I2S_MSB, - .dma_buf_count = 6, - .dma_buf_len = 100, - .use_apll = 0, - .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 , - }; - i2s_pin_config_t master_pin_config = { - .bck_io_num = MASTER_BCK_IO, - .ws_io_num = MASTER_WS_IO, - .data_out_num = DATA_OUT_IO, - .data_in_num = -1 - }; - TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL)); - TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config)); - printf("\r\nheap size: %d\n", esp_get_free_heap_size()); - - i2s_config_t slave_i2s_config = { - .mode = I2S_MODE_SLAVE | I2S_MODE_RX, - .sample_rate = SAMPLE_RATE, - .bits_per_sample = SAMPLE_BITS, - .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, - .communication_format = I2S_COMM_FORMAT_I2S | I2S_COMM_FORMAT_I2S_MSB, - .dma_buf_count = 6, - .dma_buf_len = 100, - .use_apll = 0, - .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 , - }; - i2s_pin_config_t slave_pin_config = { - .bck_io_num = SLAVE_BCK_IO, - .ws_io_num = SLAVE_WS_IO, - .data_out_num = -1, - .data_in_num = DATA_IN_IO, - }; - // slave driver installed and receive data - TEST_ESP_OK(i2s_driver_install(I2S_NUM_1, &slave_i2s_config, 0, NULL)); - TEST_ESP_OK(i2s_set_pin(I2S_NUM_1, &slave_pin_config)); - printf("\r\nheap size: %d\n", esp_get_free_heap_size()); - - uint8_t* data_wr = (uint8_t*)malloc(sizeof(uint8_t)*400); - size_t i2s_bytes_write = 0; - size_t bytes_read = 0; - int length = 0; - uint8_t *i2s_read_buff = (uint8_t*)malloc(sizeof(uint8_t)*10000); - - for(int i=0; i<100; i++) { - data_wr[i] = i+1; - } - int flag=0; // break loop flag - int end_position = 0; - // write data to slave - i2s_write(I2S_NUM_0, data_wr, sizeof(uint8_t)*400, &i2s_bytes_write, 1000 / portTICK_PERIOD_MS); - while(!flag){ - i2s_read(I2S_NUM_1, i2s_read_buff + length, sizeof(uint8_t)*500, &bytes_read, 1000/portMAX_DELAY); - if(bytes_read>0) { - printf("read data size: %d\n", bytes_read); - for(int i=length; i 0) { - for(int i=length; i #include #include -#include "esp32/rom/ets_sys.h" #include "freertos/FreeRTOS.h" #include "freertos/task.h" #include "freertos/semphr.h" @@ -54,10 +53,12 @@ static void check_spi_pre_n_for(int clk, int pre, int n) t.tx_buffer=sendbuf; ret=spi_device_transmit(handle, &t); - printf("Checking clk rate %dHz. expect pre %d n %d, got pre %d n %d\n", clk, pre, n, SPI2.clock.clkdiv_pre+1, SPI2.clock.clkcnt_n+1); + spi_dev_t* hw = spi_periph_signal[TEST_SPI_HOST].hw; - TEST_ASSERT(SPI2.clock.clkcnt_n+1==n); - TEST_ASSERT(SPI2.clock.clkdiv_pre+1==pre); + printf("Checking clk rate %dHz. expect pre %d n %d, got pre %d n %d\n", clk, pre, n, hw->clock.clkdiv_pre+1, hw->clock.clkcnt_n+1); + + TEST_ASSERT(hw->clock.clkcnt_n+1==n); + TEST_ASSERT(hw->clock.clkdiv_pre+1==pre); ret=spi_bus_remove_device(handle); TEST_ASSERT(ret==ESP_OK); @@ -330,7 +331,7 @@ TEST_CASE("spi bus setting with different pin configs", "[spi]") ESP_LOGI(TAG, "test 6 iomux output pins..."); flags_expected = SPICOMMON_BUSFLAG_SCLK | SPICOMMON_BUSFLAG_MOSI | SPICOMMON_BUSFLAG_MISO | SPICOMMON_BUSFLAG_IOMUX_PINS | SPICOMMON_BUSFLAG_QUAD; - cfg = (spi_bus_config_t){.mosi_io_num = HSPI_IOMUX_PIN_NUM_MOSI, .miso_io_num = HSPI_IOMUX_PIN_NUM_MISO, .sclk_io_num = HSPI_IOMUX_PIN_NUM_CLK, .quadhd_io_num = HSPI_IOMUX_PIN_NUM_HD, .quadwp_io_num = HSPI_IOMUX_PIN_NUM_WP, + cfg = (spi_bus_config_t){.mosi_io_num = spi_periph_signal[HSPI_HOST].spid_iomux_pin, .miso_io_num = spi_periph_signal[HSPI_HOST].spiq_iomux_pin, .sclk_io_num = spi_periph_signal[HSPI_HOST].spiclk_iomux_pin, .quadhd_io_num = spi_periph_signal[HSPI_HOST].spihd_iomux_pin, .quadwp_io_num = spi_periph_signal[HSPI_HOST].spiwp_iomux_pin, .max_transfer_sz = 8, .flags = flags_expected}; TEST_ESP_OK(spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_MASTER, &flags_o)); TEST_ASSERT_EQUAL_HEX32( flags_expected, flags_o ); @@ -339,7 +340,7 @@ TEST_CASE("spi bus setting with different pin configs", "[spi]") ESP_LOGI(TAG, "test 4 iomux output pins..."); flags_expected = SPICOMMON_BUSFLAG_SCLK | SPICOMMON_BUSFLAG_MOSI | SPICOMMON_BUSFLAG_MISO | SPICOMMON_BUSFLAG_IOMUX_PINS | SPICOMMON_BUSFLAG_DUAL; - cfg = (spi_bus_config_t){.mosi_io_num = HSPI_IOMUX_PIN_NUM_MOSI, .miso_io_num = HSPI_IOMUX_PIN_NUM_MISO, .sclk_io_num = HSPI_IOMUX_PIN_NUM_CLK, .quadhd_io_num = -1, .quadwp_io_num = -1, + cfg = (spi_bus_config_t){.mosi_io_num = spi_periph_signal[HSPI_HOST].spid_iomux_pin, .miso_io_num = spi_periph_signal[HSPI_HOST].spiq_iomux_pin, .sclk_io_num = spi_periph_signal[HSPI_HOST].spiclk_iomux_pin, .quadhd_io_num = -1, .quadwp_io_num = -1, .max_transfer_sz = 8, .flags = flags_expected}; TEST_ESP_OK(spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_MASTER, &flags_o)); TEST_ASSERT_EQUAL_HEX32( flags_expected, flags_o ); @@ -349,7 +350,7 @@ TEST_CASE("spi bus setting with different pin configs", "[spi]") ESP_LOGI(TAG, "test 6 output pins..."); flags_expected = SPICOMMON_BUSFLAG_SCLK | SPICOMMON_BUSFLAG_MOSI | SPICOMMON_BUSFLAG_MISO | SPICOMMON_BUSFLAG_QUAD; //swap MOSI and MISO - cfg = (spi_bus_config_t){.mosi_io_num = HSPI_IOMUX_PIN_NUM_MISO, .miso_io_num = HSPI_IOMUX_PIN_NUM_MOSI, .sclk_io_num = HSPI_IOMUX_PIN_NUM_CLK, .quadhd_io_num = HSPI_IOMUX_PIN_NUM_HD, .quadwp_io_num = HSPI_IOMUX_PIN_NUM_WP, + cfg = (spi_bus_config_t){.mosi_io_num = spi_periph_signal[HSPI_HOST].spiq_iomux_pin, .miso_io_num = spi_periph_signal[HSPI_HOST].spid_iomux_pin, .sclk_io_num = spi_periph_signal[HSPI_HOST].spiclk_iomux_pin, .quadhd_io_num = spi_periph_signal[HSPI_HOST].spihd_iomux_pin, .quadwp_io_num = spi_periph_signal[HSPI_HOST].spiwp_iomux_pin, .max_transfer_sz = 8, .flags = flags_expected}; TEST_ESP_OK(spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_MASTER, &flags_o)); TEST_ASSERT_EQUAL_HEX32( flags_expected, flags_o ); @@ -359,7 +360,7 @@ TEST_CASE("spi bus setting with different pin configs", "[spi]") ESP_LOGI(TAG, "test 4 output pins..."); flags_expected = SPICOMMON_BUSFLAG_SCLK | SPICOMMON_BUSFLAG_MOSI | SPICOMMON_BUSFLAG_MISO | SPICOMMON_BUSFLAG_DUAL; //swap MOSI and MISO - cfg = (spi_bus_config_t){.mosi_io_num = HSPI_IOMUX_PIN_NUM_MISO, .miso_io_num = HSPI_IOMUX_PIN_NUM_MOSI, .sclk_io_num = HSPI_IOMUX_PIN_NUM_CLK, .quadhd_io_num = -1, .quadwp_io_num = -1, + cfg = (spi_bus_config_t){.mosi_io_num = spi_periph_signal[HSPI_HOST].spiq_iomux_pin, .miso_io_num = spi_periph_signal[HSPI_HOST].spid_iomux_pin, .sclk_io_num = spi_periph_signal[HSPI_HOST].spiclk_iomux_pin, .quadhd_io_num = -1, .quadwp_io_num = -1, .max_transfer_sz = 8, .flags = flags_expected}; TEST_ESP_OK(spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_MASTER, &flags_o)); TEST_ASSERT_EQUAL_HEX32( flags_expected, flags_o ); @@ -368,14 +369,14 @@ TEST_CASE("spi bus setting with different pin configs", "[spi]") ESP_LOGI(TAG, "test master 5 output pins and MOSI on input-only pin..."); flags_expected = SPICOMMON_BUSFLAG_SCLK | SPICOMMON_BUSFLAG_MOSI | SPICOMMON_BUSFLAG_MISO | SPICOMMON_BUSFLAG_WPHD; - cfg = (spi_bus_config_t){.mosi_io_num = HSPI_IOMUX_PIN_NUM_MOSI, .miso_io_num = 34, .sclk_io_num = HSPI_IOMUX_PIN_NUM_CLK, .quadhd_io_num = HSPI_IOMUX_PIN_NUM_HD, .quadwp_io_num = HSPI_IOMUX_PIN_NUM_WP, + cfg = (spi_bus_config_t){.mosi_io_num = spi_periph_signal[HSPI_HOST].spid_iomux_pin, .miso_io_num = 34, .sclk_io_num = spi_periph_signal[HSPI_HOST].spiclk_iomux_pin, .quadhd_io_num = spi_periph_signal[HSPI_HOST].spihd_iomux_pin, .quadwp_io_num = spi_periph_signal[HSPI_HOST].spiwp_iomux_pin, .max_transfer_sz = 8, .flags = flags_expected}; TEST_ESP_OK(spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_MASTER, &flags_o)); TEST_ASSERT_EQUAL_HEX32( flags_expected, flags_o ); ESP_LOGI(TAG, "test slave 5 output pins and MISO on input-only pin..."); flags_expected = SPICOMMON_BUSFLAG_SCLK | SPICOMMON_BUSFLAG_MOSI | SPICOMMON_BUSFLAG_MISO | SPICOMMON_BUSFLAG_WPHD; - cfg = (spi_bus_config_t){.mosi_io_num = 34, .miso_io_num = HSPI_IOMUX_PIN_NUM_MISO, .sclk_io_num = HSPI_IOMUX_PIN_NUM_CLK, .quadhd_io_num = HSPI_IOMUX_PIN_NUM_HD, .quadwp_io_num = HSPI_IOMUX_PIN_NUM_WP, + cfg = (spi_bus_config_t){.mosi_io_num = 34, .miso_io_num = spi_periph_signal[HSPI_HOST].spiq_iomux_pin, .sclk_io_num = spi_periph_signal[HSPI_HOST].spiclk_iomux_pin, .quadhd_io_num = spi_periph_signal[HSPI_HOST].spihd_iomux_pin, .quadwp_io_num = spi_periph_signal[HSPI_HOST].spiwp_iomux_pin, .max_transfer_sz = 8, .flags = flags_expected}; TEST_ESP_OK(spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_SLAVE, &flags_o)); TEST_ASSERT_EQUAL_HEX32( flags_expected, flags_o ); @@ -383,14 +384,14 @@ TEST_CASE("spi bus setting with different pin configs", "[spi]") ESP_LOGI(TAG, "test master 3 output pins and MOSI on input-only pin..."); flags_expected = SPICOMMON_BUSFLAG_SCLK | SPICOMMON_BUSFLAG_MOSI | SPICOMMON_BUSFLAG_MISO; - cfg = (spi_bus_config_t){.mosi_io_num = HSPI_IOMUX_PIN_NUM_MOSI, .miso_io_num = 34, .sclk_io_num = HSPI_IOMUX_PIN_NUM_CLK, .quadhd_io_num = -1, .quadwp_io_num = -1, + cfg = (spi_bus_config_t){.mosi_io_num = spi_periph_signal[HSPI_HOST].spid_iomux_pin, .miso_io_num = 34, .sclk_io_num = spi_periph_signal[HSPI_HOST].spiclk_iomux_pin, .quadhd_io_num = -1, .quadwp_io_num = -1, .max_transfer_sz = 8, .flags = flags_expected}; TEST_ESP_OK(spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_MASTER, &flags_o)); TEST_ASSERT_EQUAL_HEX32( flags_expected, flags_o ); ESP_LOGI(TAG, "test slave 3 output pins and MISO on input-only pin..."); flags_expected = SPICOMMON_BUSFLAG_SCLK | SPICOMMON_BUSFLAG_MOSI | SPICOMMON_BUSFLAG_MISO; - cfg = (spi_bus_config_t){.mosi_io_num = 34, .miso_io_num = HSPI_IOMUX_PIN_NUM_MISO, .sclk_io_num = HSPI_IOMUX_PIN_NUM_CLK, .quadhd_io_num = -1, .quadwp_io_num = -1, + cfg = (spi_bus_config_t){.mosi_io_num = 34, .miso_io_num = spi_periph_signal[HSPI_HOST].spiq_iomux_pin, .sclk_io_num = spi_periph_signal[HSPI_HOST].spiclk_iomux_pin, .quadhd_io_num = -1, .quadwp_io_num = -1, .max_transfer_sz = 8, .flags = flags_expected}; TEST_ESP_OK(spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_SLAVE, &flags_o)); TEST_ASSERT_EQUAL_HEX32( flags_expected, flags_o ); @@ -398,7 +399,7 @@ TEST_CASE("spi bus setting with different pin configs", "[spi]") ESP_LOGI(TAG, "check native flag for 6 output pins..."); flags_expected = SPICOMMON_BUSFLAG_IOMUX_PINS; //swap MOSI and MISO - cfg = (spi_bus_config_t){.mosi_io_num = HSPI_IOMUX_PIN_NUM_MISO, .miso_io_num = HSPI_IOMUX_PIN_NUM_MOSI, .sclk_io_num = HSPI_IOMUX_PIN_NUM_CLK, .quadhd_io_num = HSPI_IOMUX_PIN_NUM_HD, .quadwp_io_num = HSPI_IOMUX_PIN_NUM_WP, + cfg = (spi_bus_config_t){.mosi_io_num = spi_periph_signal[HSPI_HOST].spiq_iomux_pin, .miso_io_num = spi_periph_signal[HSPI_HOST].spid_iomux_pin, .sclk_io_num = spi_periph_signal[HSPI_HOST].spiclk_iomux_pin, .quadhd_io_num = spi_periph_signal[HSPI_HOST].spihd_iomux_pin, .quadwp_io_num = spi_periph_signal[HSPI_HOST].spiwp_iomux_pin, .max_transfer_sz = 8, .flags = flags_expected}; TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_MASTER, &flags_o)); TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_SLAVE, &flags_o)); @@ -406,61 +407,61 @@ TEST_CASE("spi bus setting with different pin configs", "[spi]") ESP_LOGI(TAG, "check native flag for 4 output pins..."); flags_expected = SPICOMMON_BUSFLAG_IOMUX_PINS; //swap MOSI and MISO - cfg = (spi_bus_config_t){.mosi_io_num = HSPI_IOMUX_PIN_NUM_MISO, .miso_io_num = HSPI_IOMUX_PIN_NUM_MOSI, .sclk_io_num = HSPI_IOMUX_PIN_NUM_CLK, .quadhd_io_num = -1, .quadwp_io_num = -1, + cfg = (spi_bus_config_t){.mosi_io_num = spi_periph_signal[HSPI_HOST].spiq_iomux_pin, .miso_io_num = spi_periph_signal[HSPI_HOST].spid_iomux_pin, .sclk_io_num = spi_periph_signal[HSPI_HOST].spiclk_iomux_pin, .quadhd_io_num = -1, .quadwp_io_num = -1, .max_transfer_sz = 8, .flags = flags_expected}; TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_MASTER, &flags_o)); TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_SLAVE, &flags_o)); ESP_LOGI(TAG, "check dual flag for master 5 output pins and MISO/MOSI on input-only pin..."); flags_expected = SPICOMMON_BUSFLAG_DUAL; - cfg = (spi_bus_config_t){.mosi_io_num = HSPI_IOMUX_PIN_NUM_MOSI, .miso_io_num = 34, .sclk_io_num = HSPI_IOMUX_PIN_NUM_CLK, .quadhd_io_num = HSPI_IOMUX_PIN_NUM_HD, .quadwp_io_num = HSPI_IOMUX_PIN_NUM_WP, + cfg = (spi_bus_config_t){.mosi_io_num = spi_periph_signal[HSPI_HOST].spid_iomux_pin, .miso_io_num = 34, .sclk_io_num = spi_periph_signal[HSPI_HOST].spiclk_iomux_pin, .quadhd_io_num = spi_periph_signal[HSPI_HOST].spihd_iomux_pin, .quadwp_io_num = spi_periph_signal[HSPI_HOST].spiwp_iomux_pin, .max_transfer_sz = 8, .flags = flags_expected}; TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_MASTER, &flags_o)); TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_SLAVE, &flags_o)); - cfg = (spi_bus_config_t){.mosi_io_num = 34, .miso_io_num = HSPI_IOMUX_PIN_NUM_MISO, .sclk_io_num = HSPI_IOMUX_PIN_NUM_CLK, .quadhd_io_num = HSPI_IOMUX_PIN_NUM_HD, .quadwp_io_num = HSPI_IOMUX_PIN_NUM_WP, + cfg = (spi_bus_config_t){.mosi_io_num = 34, .miso_io_num = spi_periph_signal[HSPI_HOST].spiq_iomux_pin, .sclk_io_num = spi_periph_signal[HSPI_HOST].spiclk_iomux_pin, .quadhd_io_num = spi_periph_signal[HSPI_HOST].spihd_iomux_pin, .quadwp_io_num = spi_periph_signal[HSPI_HOST].spiwp_iomux_pin, .max_transfer_sz = 8, .flags = flags_expected}; TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_MASTER, &flags_o)); TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_SLAVE, &flags_o)); ESP_LOGI(TAG, "check dual flag for master 3 output pins and MISO/MOSI on input-only pin..."); flags_expected = SPICOMMON_BUSFLAG_DUAL; - cfg = (spi_bus_config_t){.mosi_io_num = HSPI_IOMUX_PIN_NUM_MOSI, .miso_io_num = 34, .sclk_io_num = HSPI_IOMUX_PIN_NUM_CLK, .quadhd_io_num = -1, .quadwp_io_num = -1, + cfg = (spi_bus_config_t){.mosi_io_num = spi_periph_signal[HSPI_HOST].spid_iomux_pin, .miso_io_num = 34, .sclk_io_num = spi_periph_signal[HSPI_HOST].spiclk_iomux_pin, .quadhd_io_num = -1, .quadwp_io_num = -1, .max_transfer_sz = 8, .flags = flags_expected}; TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_MASTER, &flags_o)); TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_SLAVE, &flags_o)); - cfg = (spi_bus_config_t){.mosi_io_num = 34, .miso_io_num = HSPI_IOMUX_PIN_NUM_MISO, .sclk_io_num = HSPI_IOMUX_PIN_NUM_CLK, .quadhd_io_num = -1, .quadwp_io_num = -1, + cfg = (spi_bus_config_t){.mosi_io_num = 34, .miso_io_num = spi_periph_signal[HSPI_HOST].spiq_iomux_pin, .sclk_io_num = spi_periph_signal[HSPI_HOST].spiclk_iomux_pin, .quadhd_io_num = -1, .quadwp_io_num = -1, .max_transfer_sz = 8, .flags = flags_expected}; TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_MASTER, &flags_o)); TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_SLAVE, &flags_o)); ESP_LOGI(TAG, "check sclk flag..."); flags_expected = SPICOMMON_BUSFLAG_SCLK; - cfg = (spi_bus_config_t){.mosi_io_num = HSPI_IOMUX_PIN_NUM_MOSI, .miso_io_num = HSPI_IOMUX_PIN_NUM_MISO, .sclk_io_num = -1, .quadhd_io_num = HSPI_IOMUX_PIN_NUM_HD, .quadwp_io_num = HSPI_IOMUX_PIN_NUM_WP, + cfg = (spi_bus_config_t){.mosi_io_num = spi_periph_signal[HSPI_HOST].spid_iomux_pin, .miso_io_num = spi_periph_signal[HSPI_HOST].spiq_iomux_pin, .sclk_io_num = -1, .quadhd_io_num = spi_periph_signal[HSPI_HOST].spihd_iomux_pin, .quadwp_io_num = spi_periph_signal[HSPI_HOST].spiwp_iomux_pin, .max_transfer_sz = 8, .flags = flags_expected}; TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_MASTER, &flags_o)); TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_SLAVE, &flags_o)); ESP_LOGI(TAG, "check mosi flag..."); flags_expected = SPICOMMON_BUSFLAG_MOSI; - cfg = (spi_bus_config_t){.mosi_io_num = -1, .miso_io_num = HSPI_IOMUX_PIN_NUM_MISO, .sclk_io_num = HSPI_IOMUX_PIN_NUM_CLK, .quadhd_io_num = HSPI_IOMUX_PIN_NUM_HD, .quadwp_io_num = HSPI_IOMUX_PIN_NUM_WP, + cfg = (spi_bus_config_t){.mosi_io_num = -1, .miso_io_num = spi_periph_signal[HSPI_HOST].spiq_iomux_pin, .sclk_io_num = spi_periph_signal[HSPI_HOST].spiclk_iomux_pin, .quadhd_io_num = spi_periph_signal[HSPI_HOST].spihd_iomux_pin, .quadwp_io_num = spi_periph_signal[HSPI_HOST].spiwp_iomux_pin, .max_transfer_sz = 8, .flags = flags_expected}; TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_MASTER, &flags_o)); TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_SLAVE, &flags_o)); ESP_LOGI(TAG, "check miso flag..."); flags_expected = SPICOMMON_BUSFLAG_MISO; - cfg = (spi_bus_config_t){.mosi_io_num = HSPI_IOMUX_PIN_NUM_MOSI, .miso_io_num = -1, .sclk_io_num = HSPI_IOMUX_PIN_NUM_CLK, .quadhd_io_num = HSPI_IOMUX_PIN_NUM_HD, .quadwp_io_num = HSPI_IOMUX_PIN_NUM_WP, + cfg = (spi_bus_config_t){.mosi_io_num = spi_periph_signal[HSPI_HOST].spid_iomux_pin, .miso_io_num = -1, .sclk_io_num = spi_periph_signal[HSPI_HOST].spiclk_iomux_pin, .quadhd_io_num = spi_periph_signal[HSPI_HOST].spihd_iomux_pin, .quadwp_io_num = spi_periph_signal[HSPI_HOST].spiwp_iomux_pin, .max_transfer_sz = 8, .flags = flags_expected}; TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_MASTER, &flags_o)); TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_SLAVE, &flags_o)); ESP_LOGI(TAG, "check quad flag..."); flags_expected = SPICOMMON_BUSFLAG_QUAD; - cfg = (spi_bus_config_t){.mosi_io_num = HSPI_IOMUX_PIN_NUM_MOSI, .miso_io_num = HSPI_IOMUX_PIN_NUM_MISO, .sclk_io_num = HSPI_IOMUX_PIN_NUM_CLK, .quadhd_io_num = -1, .quadwp_io_num = HSPI_IOMUX_PIN_NUM_WP, + cfg = (spi_bus_config_t){.mosi_io_num = spi_periph_signal[HSPI_HOST].spid_iomux_pin, .miso_io_num = spi_periph_signal[HSPI_HOST].spiq_iomux_pin, .sclk_io_num = spi_periph_signal[HSPI_HOST].spiclk_iomux_pin, .quadhd_io_num = -1, .quadwp_io_num = spi_periph_signal[HSPI_HOST].spiwp_iomux_pin, .max_transfer_sz = 8, .flags = flags_expected}; TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_MASTER, &flags_o)); TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_SLAVE, &flags_o)); - cfg = (spi_bus_config_t){.mosi_io_num = HSPI_IOMUX_PIN_NUM_MOSI, .miso_io_num = HSPI_IOMUX_PIN_NUM_MISO, .sclk_io_num = HSPI_IOMUX_PIN_NUM_CLK, .quadhd_io_num = HSPI_IOMUX_PIN_NUM_HD, .quadwp_io_num = -1, + cfg = (spi_bus_config_t){.mosi_io_num = spi_periph_signal[HSPI_HOST].spid_iomux_pin, .miso_io_num = spi_periph_signal[HSPI_HOST].spiq_iomux_pin, .sclk_io_num = spi_periph_signal[HSPI_HOST].spiclk_iomux_pin, .quadhd_io_num = spi_periph_signal[HSPI_HOST].spihd_iomux_pin, .quadwp_io_num = -1, .max_transfer_sz = 8, .flags = flags_expected}; TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_MASTER, &flags_o)); TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, spicommon_bus_initialize_io(TEST_SPI_HOST, &cfg, 0, flags_expected|SPICOMMON_BUSFLAG_SLAVE, &flags_o)); diff --git a/components/driver/test/test_spi_param.c b/components/driver/test/test_spi_param.c index b3e46dd2f..d1bfd1209 100644 --- a/components/driver/test/test_spi_param.c +++ b/components/driver/test/test_spi_param.c @@ -55,20 +55,20 @@ static void local_test_start(spi_device_handle_t *spi, int freq, const spitest_p assert(!pset->master_iomux || !pset->slave_iomux); if (pset->slave_iomux) { //only in this case, use VSPI iomux pins - buscfg.miso_io_num = VSPI_IOMUX_PIN_NUM_MISO; - buscfg.mosi_io_num = VSPI_IOMUX_PIN_NUM_MOSI; - buscfg.sclk_io_num = VSPI_IOMUX_PIN_NUM_CLK; - devcfg.spics_io_num = VSPI_IOMUX_PIN_NUM_CS; - slvcfg.spics_io_num = VSPI_IOMUX_PIN_NUM_CS; + buscfg.miso_io_num = spi_periph_signal[VSPI_HOST].spiq_iomux_pin; + buscfg.mosi_io_num = spi_periph_signal[VSPI_HOST].spid_iomux_pin; + buscfg.sclk_io_num = spi_periph_signal[VSPI_HOST].spiclk_iomux_pin; + devcfg.spics_io_num = spi_periph_signal[VSPI_HOST].spics0_iomux_pin; + slvcfg.spics_io_num = spi_periph_signal[VSPI_HOST].spics0_iomux_pin; } else { - buscfg.miso_io_num = HSPI_IOMUX_PIN_NUM_MISO; - buscfg.mosi_io_num = HSPI_IOMUX_PIN_NUM_MOSI; - buscfg.sclk_io_num = HSPI_IOMUX_PIN_NUM_CLK; - devcfg.spics_io_num = HSPI_IOMUX_PIN_NUM_CS; - slvcfg.spics_io_num = HSPI_IOMUX_PIN_NUM_CS; + buscfg.miso_io_num = spi_periph_signal[HSPI_HOST].spiq_iomux_pin; + buscfg.mosi_io_num = spi_periph_signal[HSPI_HOST].spid_iomux_pin; + buscfg.sclk_io_num = spi_periph_signal[HSPI_HOST].spiclk_iomux_pin; + devcfg.spics_io_num = spi_periph_signal[HSPI_HOST].spics0_iomux_pin; + slvcfg.spics_io_num = spi_periph_signal[HSPI_HOST].spics0_iomux_pin; } //this does nothing, but avoid the driver from using iomux pins if required - buscfg.quadhd_io_num = (!pset->master_iomux && !pset->slave_iomux ? VSPI_IOMUX_PIN_NUM_MISO : -1); + buscfg.quadhd_io_num = (!pset->master_iomux && !pset->slave_iomux ? spi_periph_signal[VSPI_HOST].spiq_iomux_pin : -1); devcfg.mode = pset->mode; const int cs_pretrans_max = 15; if (pset->dup == HALF_DUPLEX_MISO) { @@ -100,20 +100,20 @@ static void local_test_start(spi_device_handle_t *spi, int freq, const spitest_p //initialize master and slave on the same pins break some of the output configs, fix them if (pset->master_iomux) { - spitest_gpio_output_sel(buscfg.mosi_io_num, FUNC_SPI, HSPID_OUT_IDX); - spitest_gpio_output_sel(buscfg.miso_io_num, FUNC_GPIO, VSPIQ_OUT_IDX); - spitest_gpio_output_sel(devcfg.spics_io_num, FUNC_SPI, HSPICS0_OUT_IDX); - spitest_gpio_output_sel(buscfg.sclk_io_num, FUNC_SPI, HSPICLK_OUT_IDX); + spitest_gpio_output_sel(buscfg.mosi_io_num, FUNC_SPI, spi_periph_signal[HSPI_HOST].spid_out); + spitest_gpio_output_sel(buscfg.miso_io_num, FUNC_GPIO, spi_periph_signal[VSPI_HOST].spiq_out); + spitest_gpio_output_sel(devcfg.spics_io_num, FUNC_SPI, spi_periph_signal[HSPI_HOST].spics_out[0]); + spitest_gpio_output_sel(buscfg.sclk_io_num, FUNC_SPI, spi_periph_signal[HSPI_HOST].spiclk_out); } else if (pset->slave_iomux) { - spitest_gpio_output_sel(buscfg.mosi_io_num, FUNC_GPIO, HSPID_OUT_IDX); - spitest_gpio_output_sel(buscfg.miso_io_num, FUNC_SPI, VSPIQ_OUT_IDX); - spitest_gpio_output_sel(devcfg.spics_io_num, FUNC_GPIO, HSPICS0_OUT_IDX); - spitest_gpio_output_sel(buscfg.sclk_io_num, FUNC_GPIO, HSPICLK_OUT_IDX); + spitest_gpio_output_sel(buscfg.mosi_io_num, FUNC_GPIO, spi_periph_signal[HSPI_HOST].spid_out); + spitest_gpio_output_sel(buscfg.miso_io_num, FUNC_SPI, spi_periph_signal[VSPI_HOST].spiq_out); + spitest_gpio_output_sel(devcfg.spics_io_num, FUNC_GPIO, spi_periph_signal[HSPI_HOST].spics_out[0]); + spitest_gpio_output_sel(buscfg.sclk_io_num, FUNC_GPIO, spi_periph_signal[HSPI_HOST].spiclk_out); } else { - spitest_gpio_output_sel(buscfg.mosi_io_num, FUNC_GPIO, HSPID_OUT_IDX); - spitest_gpio_output_sel(buscfg.miso_io_num, FUNC_GPIO, VSPIQ_OUT_IDX); - spitest_gpio_output_sel(devcfg.spics_io_num, FUNC_GPIO, HSPICS0_OUT_IDX); - spitest_gpio_output_sel(buscfg.sclk_io_num, FUNC_GPIO, HSPICLK_OUT_IDX); + spitest_gpio_output_sel(buscfg.mosi_io_num, FUNC_GPIO, spi_periph_signal[HSPI_HOST].spid_out); + spitest_gpio_output_sel(buscfg.miso_io_num, FUNC_GPIO, spi_periph_signal[VSPI_HOST].spiq_out); + spitest_gpio_output_sel(devcfg.spics_io_num, FUNC_GPIO, spi_periph_signal[HSPI_HOST].spics_out[0]); + spitest_gpio_output_sel(buscfg.sclk_io_num, FUNC_GPIO, spi_periph_signal[HSPI_HOST].spiclk_out); } //prepare slave tx data @@ -491,13 +491,13 @@ static void test_master_start(spi_device_handle_t *spi, int freq, const spitest_ { //master config spi_bus_config_t buspset=SPI_BUS_TEST_DEFAULT_CONFIG(); - buspset.miso_io_num = HSPI_IOMUX_PIN_NUM_MISO; - buspset.mosi_io_num = HSPI_IOMUX_PIN_NUM_MOSI; - buspset.sclk_io_num = HSPI_IOMUX_PIN_NUM_CLK; + buspset.miso_io_num = spi_periph_signal[HSPI_HOST].spiq_iomux_pin; + buspset.mosi_io_num = spi_periph_signal[HSPI_HOST].spid_iomux_pin; + buspset.sclk_io_num = spi_periph_signal[HSPI_HOST].spiclk_iomux_pin; //this does nothing, but avoid the driver from using native pins - if (!pset->master_iomux) buspset.quadhd_io_num = VSPI_IOMUX_PIN_NUM_MISO; + if (!pset->master_iomux) buspset.quadhd_io_num = spi_periph_signal[VSPI_HOST].spiq_iomux_pin; spi_device_interface_config_t devpset=SPI_DEVICE_TEST_DEFAULT_CONFIG(); - devpset.spics_io_num = HSPI_IOMUX_PIN_NUM_CS; + devpset.spics_io_num = spi_periph_signal[HSPI_HOST].spics0_iomux_pin; devpset.mode = pset->mode; const int cs_pretrans_max = 15; if (pset->dup==HALF_DUPLEX_MISO) { @@ -623,13 +623,13 @@ static void timing_slave_start(int speed, const spitest_param_set_t* pset, spite { //slave config spi_bus_config_t slv_buscfg=SPI_BUS_TEST_DEFAULT_CONFIG(); - slv_buscfg.miso_io_num = VSPI_IOMUX_PIN_NUM_MISO; - slv_buscfg.mosi_io_num = VSPI_IOMUX_PIN_NUM_MOSI; - slv_buscfg.sclk_io_num = VSPI_IOMUX_PIN_NUM_CLK; + slv_buscfg.miso_io_num = spi_periph_signal[VSPI_HOST].spiq_iomux_pin; + slv_buscfg.mosi_io_num = spi_periph_signal[VSPI_HOST].spid_iomux_pin; + slv_buscfg.sclk_io_num = spi_periph_signal[VSPI_HOST].spiclk_iomux_pin; //this does nothing, but avoid the driver from using native pins - if (!pset->slave_iomux) slv_buscfg.quadhd_io_num = HSPI_IOMUX_PIN_NUM_CLK; + if (!pset->slave_iomux) slv_buscfg.quadhd_io_num = spi_periph_signal[HSPI_HOST].spiclk_iomux_pin; spi_slave_interface_config_t slvcfg=SPI_SLAVE_TEST_DEFAULT_CONFIG(); - slvcfg.spics_io_num = VSPI_IOMUX_PIN_NUM_CS; + slvcfg.spics_io_num = spi_periph_signal[VSPI_HOST].spics0_iomux_pin; slvcfg.mode = pset->mode; //Enable pull-ups on SPI lines so we don't detect rogue pulses when no master is connected. slave_pull_up(&slv_buscfg, slvcfg.spics_io_num); diff --git a/components/driver/test/test_spi_sio.c b/components/driver/test/test_spi_sio.c index cb6964f6b..bba47097b 100644 --- a/components/driver/test/test_spi_sio.c +++ b/components/driver/test/test_spi_sio.c @@ -7,7 +7,6 @@ #include #include #include -#include "esp32/rom/ets_sys.h" #include "freertos/FreeRTOS.h" #include "freertos/task.h" #include "freertos/semphr.h" @@ -23,6 +22,7 @@ #include "test/test_common_spi.h" #include "soc/gpio_periph.h" #include "sdkconfig.h" +#include "hal/spi_ll.h" /******************************************************************************** @@ -34,10 +34,12 @@ TEST_CASE("local test sio", "[spi]") WORD_ALIGNED_ATTR uint8_t master_rx_buffer[320]; WORD_ALIGNED_ATTR uint8_t slave_rx_buffer[320]; - for (int i = 0; i < 16; i++) { - SPI1.data_buf[0] = 0xcccccccc; - SPI2.data_buf[0] = 0xcccccccc; - } + uint32_t padding[16]; + for (int i = 0; i < 16; i++) + padding[i] = 0xcccccccc;; + + spi_ll_write_buffer(SPI_LL_GET_HW(TEST_SPI_HOST), (uint8_t*)&padding, 8*64); + spi_ll_write_buffer(SPI_LL_GET_HW(TEST_SLAVE_HOST), (uint8_t*)&padding, 8*64); /* This test use a strange connection to test the SIO mode: * master spid -> slave spid diff --git a/components/driver/test/test_spi_slave.c b/components/driver/test/test_spi_slave.c index 13f2f2c34..ba79393f5 100644 --- a/components/driver/test/test_spi_slave.c +++ b/components/driver/test/test_spi_slave.c @@ -88,10 +88,10 @@ TEST_CASE("test slave send unaligned","[spi]") slave_init(); //do internal connection - int_connect( PIN_NUM_MOSI, HSPID_OUT_IDX, VSPIQ_IN_IDX ); - int_connect( PIN_NUM_MISO, VSPIQ_OUT_IDX, HSPID_IN_IDX ); - int_connect( PIN_NUM_CS, HSPICS0_OUT_IDX, VSPICS0_IN_IDX ); - int_connect( PIN_NUM_CLK, HSPICLK_OUT_IDX, VSPICLK_IN_IDX ); + int_connect( PIN_NUM_MOSI, spi_periph_signal[TEST_SPI_HOST].spid_out, spi_periph_signal[TEST_SLAVE_HOST].spiq_in ); + int_connect( PIN_NUM_MISO, spi_periph_signal[TEST_SLAVE_HOST].spiq_out, spi_periph_signal[TEST_SPI_HOST].spid_in ); + int_connect( PIN_NUM_CS, spi_periph_signal[TEST_SPI_HOST].spics_out[0], spi_periph_signal[TEST_SLAVE_HOST].spics_in ); + int_connect( PIN_NUM_CLK, spi_periph_signal[TEST_SPI_HOST].spiclk_out, spi_periph_signal[TEST_SLAVE_HOST].spiclk_in ); for ( int i = 0; i < 4; i ++ ) { //slave send diff --git a/components/efuse/test/CMakeLists.txt b/components/efuse/test/CMakeLists.txt index e239bfe5c..9524509ea 100644 --- a/components/efuse/test/CMakeLists.txt +++ b/components/efuse/test/CMakeLists.txt @@ -1,3 +1,6 @@ -idf_component_register(SRC_DIRS "." - INCLUDE_DIRS "." "include" - REQUIRES unity test_utils efuse bootloader_support) \ No newline at end of file +if(IDF_TARGET STREQUAL "esp32") + idf_component_register(SRC_DIRS . + INCLUDE_DIRS . include + REQUIRES unity test_utils efuse bootloader_support + ) +endif() diff --git a/components/esp32/test/CMakeLists.txt b/components/esp32/test/CMakeLists.txt index 624f11d59..74ed23aee 100644 --- a/components/esp32/test/CMakeLists.txt +++ b/components/esp32/test/CMakeLists.txt @@ -1,16 +1,19 @@ -idf_component_register(SRC_DIRS "." - INCLUDE_DIRS "." "${CMAKE_CURRENT_BINARY_DIR}" - REQUIRES unity test_utils nvs_flash ulp esp_common) +if(IDF_TARGET STREQUAL "esp32") + idf_component_register(SRC_DIRS . + INCLUDE_DIRS . ${CMAKE_CURRENT_BINARY_DIR} + REQUIRES unity test_utils nvs_flash ulp esp_common + ) -add_custom_command(OUTPUT "${CMAKE_CURRENT_BINARY_DIR}/test_tjpgd_logo.h" - COMMAND xxd -i "logo.jpg" "${CMAKE_CURRENT_BINARY_DIR}/test_tjpgd_logo.h" - WORKING_DIRECTORY ${COMPONENT_DIR} - DEPENDS "${CMAKE_CURRENT_LIST_DIR}/logo.jpg") + add_custom_command(OUTPUT "${CMAKE_CURRENT_BINARY_DIR}/test_tjpgd_logo.h" + COMMAND xxd -i "logo.jpg" "${CMAKE_CURRENT_BINARY_DIR}/test_tjpgd_logo.h" + WORKING_DIRECTORY ${COMPONENT_DIR} + DEPENDS "${CMAKE_CURRENT_LIST_DIR}/logo.jpg") -add_custom_target(esp32_test_logo DEPENDS "${CMAKE_CURRENT_BINARY_DIR}/test_tjpgd_logo.h") + add_custom_target(esp32_test_logo DEPENDS "${CMAKE_CURRENT_BINARY_DIR}/test_tjpgd_logo.h") -add_dependencies(${COMPONENT_LIB} esp32_test_logo) + add_dependencies(${COMPONENT_LIB} esp32_test_logo) -idf_build_set_property(COMPILE_DEFINITIONS "-DESP_TIMER_DYNAMIC_OVERFLOW_VAL" APPEND) + idf_build_set_property(COMPILE_DEFINITIONS "-DESP_TIMER_DYNAMIC_OVERFLOW_VAL" APPEND) + target_link_libraries(${COMPONENT_LIB} INTERFACE "-u ld_include_test_dport_xt_highint5") +endif() -target_link_libraries(${COMPONENT_LIB} INTERFACE "-u ld_include_test_dport_xt_highint5") diff --git a/components/esp32/test/test_aes_sha_rsa.c b/components/esp32/test/test_aes_sha_rsa.c index 8453b68f5..c4aff1d5e 100644 --- a/components/esp32/test/test_aes_sha_rsa.c +++ b/components/esp32/test/test_aes_sha_rsa.c @@ -2,7 +2,6 @@ #include #include #include "esp_types.h" -#include "esp32/clk.h" #include "freertos/FreeRTOS.h" #include "freertos/task.h" diff --git a/components/esp32/test/test_intr_alloc.c b/components/esp32/test/test_intr_alloc.c index b17fb9e83..a372675dd 100644 --- a/components/esp32/test/test_intr_alloc.c +++ b/components/esp32/test/test_intr_alloc.c @@ -4,8 +4,11 @@ #include #include +#if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/ets_sys.h" - +#elif CONFIG_IDF_TARGET_ESP32S2BETA +#include "esp32s2beta/rom/ets_sys.h" +#endif #include "freertos/FreeRTOS.h" #include "freertos/task.h" #include "freertos/semphr.h" diff --git a/components/esp32/test/test_sleep.c b/components/esp32/test/test_sleep.c index 12e268e35..dc40af52c 100644 --- a/components/esp32/test/test_sleep.c +++ b/components/esp32/test/test_sleep.c @@ -18,6 +18,7 @@ #include "test_utils.h" #include "sdkconfig.h" + #define ESP_EXT0_WAKEUP_LEVEL_LOW 0 #define ESP_EXT0_WAKEUP_LEVEL_HIGH 1 @@ -330,7 +331,7 @@ TEST_CASE("wake up using ext1 when RTC_PERIPH is on (13 low)", "[deepsleep][igno static float get_time_ms(void) { gettimeofday(&tv_stop, NULL); - + float dt = (tv_stop.tv_sec - tv_start.tv_sec) * 1e3f + (tv_stop.tv_usec - tv_start.tv_usec) * 1e-3f; return fabs(dt); @@ -343,20 +344,20 @@ static uint32_t get_cause(void) return wakeup_cause; } -// This test case verifies deactivation of trigger for wake up sources +// This test case verifies deactivation of trigger for wake up sources TEST_CASE("disable source trigger behavior", "[deepsleep]") { float dt = 0; printf("Setup timer and ext0 to wake up immediately from GPIO_13 \n"); - + // Setup ext0 configuration to wake up almost immediately // The wakeup time is proportional to input capacitance * pullup resistance ESP_ERROR_CHECK(rtc_gpio_init(GPIO_NUM_13)); ESP_ERROR_CHECK(gpio_pullup_en(GPIO_NUM_13)); ESP_ERROR_CHECK(gpio_pulldown_dis(GPIO_NUM_13)); ESP_ERROR_CHECK(esp_sleep_enable_ext0_wakeup(GPIO_NUM_13, ESP_EXT0_WAKEUP_LEVEL_HIGH)); - + // Setup timer to wakeup with timeout esp_sleep_enable_timer_wakeup(2000000); @@ -367,22 +368,22 @@ TEST_CASE("disable source trigger behavior", "[deepsleep]") dt = get_time_ms(); printf("Ext0 sleep time = %d \n", (int) dt); - // Check wakeup from Ext0 using time measurement because wakeup cause is + // Check wakeup from Ext0 using time measurement because wakeup cause is // not available in light sleep mode TEST_ASSERT_INT32_WITHIN(100, 100, (int) dt); - + TEST_ASSERT((get_cause() & RTC_EXT0_TRIG_EN) != 0); - + // Disable Ext0 source. Timer source should be triggered ESP_ERROR_CHECK(esp_sleep_disable_wakeup_source(ESP_SLEEP_WAKEUP_EXT0)); printf("Disable ext0 trigger and leave timer active.\n"); - + gettimeofday(&tv_start, NULL); esp_light_sleep_start(); dt = get_time_ms(); printf("Timer sleep time = %d \n", (int) dt); - + TEST_ASSERT_INT32_WITHIN(500, 2000, (int) dt); // Additionally check wakeup cause @@ -407,8 +408,8 @@ TEST_CASE("disable source trigger behavior", "[deepsleep]") TEST_ASSERT_INT32_WITHIN(100, 100, (int) dt); TEST_ASSERT((get_cause() & RTC_EXT0_TRIG_EN) != 0); - - // Check error message when source is already disabled + + // Check error message when source is already disabled esp_err_t err_code = esp_sleep_disable_wakeup_source(ESP_SLEEP_WAKEUP_TIMER); TEST_ASSERT(err_code == ESP_ERR_INVALID_STATE); } @@ -429,7 +430,7 @@ static void trigger_deepsleep(void) // Save start time. Deep sleep. gettimeofday(&start, NULL); esp_sleep_enable_timer_wakeup(1000); - // In function esp_deep_sleep_start() uses function esp_sync_counters_rtc_and_frc() + // In function esp_deep_sleep_start() uses function esp_sync_counters_rtc_and_frc() // to prevent a negative time after wake up. esp_deep_sleep_start(); } diff --git a/components/esp_eth/test/CMakeLists.txt b/components/esp_eth/test/CMakeLists.txt index c4041b1fe..789ab04cd 100644 --- a/components/esp_eth/test/CMakeLists.txt +++ b/components/esp_eth/test/CMakeLists.txt @@ -1,3 +1,5 @@ -idf_component_register(SRC_DIRS "." - INCLUDE_DIRS "." - PRIV_REQUIRES "unity" "test_utils" "esp_eth") +if(IDF_TARGET STREQUAL "esp32") + idf_component_register(SRC_DIRS . + INCLUDE_DIRS . + PRIV_REQUIRES unity test_utils esp_eth) +endif() diff --git a/components/esp_event/test/CMakeLists.txt b/components/esp_event/test/CMakeLists.txt index 8264f10dd..79398640b 100644 --- a/components/esp_event/test/CMakeLists.txt +++ b/components/esp_event/test/CMakeLists.txt @@ -1,3 +1,8 @@ -idf_component_register(SRC_DIRS "." - PRIV_INCLUDE_DIRS "../private_include" "." - REQUIRES unity test_utils esp_event driver) +set(srcdirs .) +if(IDF_TARGET STREQUAL "esp32") + list(APPEND srcdirs "esp32") +endif() + +idf_component_register(SRC_DIRS ${srcdirs} + PRIV_INCLUDE_DIRS . ../private_include + PRIV_REQUIRES unity test_utils esp_event driver) diff --git a/components/esp_event/test/component.mk b/components/esp_event/test/component.mk index 22e49eddd..d74f156e8 100644 --- a/components/esp_event/test/component.mk +++ b/components/esp_event/test/component.mk @@ -1,5 +1,7 @@ # #Component Makefile # + +COMPONENT_SRCDIRS += esp32 COMPONENT_PRIV_INCLUDEDIRS := ../private_include . COMPONENT_ADD_LDFLAGS = -Wl,--whole-archive -l$(COMPONENT_NAME) -Wl,--no-whole-archive \ No newline at end of file diff --git a/components/esp_event/test/esp32/test_event.c b/components/esp_event/test/esp32/test_event.c new file mode 100644 index 000000000..e66c86047 --- /dev/null +++ b/components/esp_event/test/esp32/test_event.c @@ -0,0 +1,1220 @@ +#include +#include + +#include "esp_event.h" +#include "sdkconfig.h" + +#include "freertos/FreeRTOS.h" +#include "esp_event_loop.h" +#include "freertos/task.h" +#include "freertos/portmacro.h" +#include "esp_log.h" +#include "driver/periph_ctrl.h" +#include "driver/timer.h" + +#include "esp_event.h" +#include "esp_event_private.h" +#include "esp_event_internal.h" + +#include "esp_heap_caps.h" + +#include "sdkconfig.h" +#include "unity.h" + +#include "test_utils.h" + +static const char* TAG = "test_event"; + +// #define TEST_CONFIG_ITEMS_TO_REGISTER 5 +#define TEST_CONFIG_TASKS_TO_SPAWN 2 + +#define TEST_CONFIG_WAIT_MULTIPLIER 5 + +// The initial logging "initializing test" is to ensure mutex allocation is not counted against memory not being freed +// during teardown. +#define TEST_SETUP() \ + ESP_LOGI(TAG, "initializing test"); \ + size_t free_mem_before = heap_caps_get_free_size(MALLOC_CAP_DEFAULT); \ + test_setup(); \ + s_test_core_id = xPortGetCoreID(); \ + s_test_priority = uxTaskPriorityGet(NULL); + +#define TEST_TEARDOWN() \ + test_teardown(); \ + vTaskDelay(pdMS_TO_TICKS(CONFIG_ESP_INT_WDT_TIMEOUT_MS * TEST_CONFIG_WAIT_MULTIPLIER)); \ + TEST_ASSERT_EQUAL(free_mem_before, heap_caps_get_free_size(MALLOC_CAP_DEFAULT)); + +// typedef struct { +// void* data; +// SemaphoreHandle_t start; +// SemaphoreHandle_t done; +// } task_arg_t; + +// typedef struct { +// esp_event_base_t base; +// int32_t id; +// esp_event_handler_t* handles; +// int32_t num; +// esp_event_loop_handle_t loop; +// bool is_registration; +// } handler_registration_data_t; + +// typedef struct { +// esp_event_base_t base; +// int32_t id; +// esp_event_loop_handle_t loop; +// int32_t num; +// } post_event_data_t; + +// typedef struct { +// int performed; +// int expected; +// SemaphoreHandle_t done; +// } performance_data_t; + +// typedef struct { +// void* data; +// SemaphoreHandle_t mutex; +// } simple_arg_t; + +// typedef struct { +// int *arr; +// int index; +// } ordered_data_t; + +static BaseType_t s_test_core_id; +static UBaseType_t s_test_priority; + +ESP_EVENT_DECLARE_BASE(s_test_base1); +ESP_EVENT_DECLARE_BASE(s_test_base2); + +// ESP_EVENT_DEFINE_BASE(s_test_base1); +// ESP_EVENT_DEFINE_BASE(s_test_base2); + +enum { + TEST_EVENT_BASE1_EV1, + TEST_EVENT_BASE1_EV2, + TEST_EVENT_BASE1_MAX +}; + +// enum { +// TEST_EVENT_BASE2_EV1, +// TEST_EVENT_BASE2_EV2, +// TEST_EVENT_BASE2_MAX +// }; + +// static BaseType_t test_event_get_core() +// { +// static int calls = 0; + +// if (portNUM_PROCESSORS > 1) { +// return (s_test_core_id + calls++) % portNUM_PROCESSORS; +// } else { +// return s_test_core_id; +// } +// } + +// static esp_event_loop_args_t test_event_get_default_loop_args() +// { +// esp_event_loop_args_t loop_config = { +// .queue_size = CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE, +// .task_name = "loop", +// .task_priority = s_test_priority, +// .task_stack_size = 2048, +// .task_core_id = test_event_get_core() +// }; + +// return loop_config; +// } + +// static void test_event_simple_handler(void* event_handler_arg, esp_event_base_t event_base, int32_t event_id, void* event_data) +// { +// if (!event_handler_arg) { +// return; +// } +// simple_arg_t* arg = (simple_arg_t*) event_handler_arg; +// xSemaphoreTake(arg->mutex, portMAX_DELAY); + +// int* count = (int*) arg->data; + +// if (event_data == NULL) { +// (*count)++; +// } else { +// (*count) += *((int*) event_data); +// } + +// xSemaphoreGive(arg->mutex); +// } + +// static void test_event_ordered_dispatch(void* event_handler_arg, esp_event_base_t event_base, int32_t event_id, void* event_data) +// { +// int *arg = (int*) event_handler_arg; +// ordered_data_t *data = *((ordered_data_t**) (event_data)); + +// data->arr[data->index++] = *arg; +// } + +// static void test_event_performance_handler(void* event_handler_arg, esp_event_base_t event_base, int32_t event_id, void* event_data) +// { +// performance_data_t* data = (performance_data_t*) event_handler_arg; + +// data->performed++; + +// if (data->performed >= data->expected) { +// xSemaphoreGive(data->done); +// } +// } + +// static void test_event_post_task(void* args) +// { +// task_arg_t* arg = (task_arg_t*) args; +// post_event_data_t* data = arg->data; + +// xSemaphoreTake(arg->start, portMAX_DELAY); + +// for (int i = 0; i < data->num; i++) { +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(data->loop, data->base, data->id, NULL, 0, portMAX_DELAY)); +// vTaskDelay(1); +// } + +// xSemaphoreGive(arg->done); + +// vTaskDelete(NULL); +// } + +// static void test_event_simple_handler_registration_task(void* args) +// { +// task_arg_t* arg = (task_arg_t*) args; +// handler_registration_data_t* data = (handler_registration_data_t*) arg->data; + +// xSemaphoreTake(arg->start, portMAX_DELAY); + +// for(int i = 0; i < data->num; i++) { +// if (data->is_registration) { +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(data->loop, data->base, data->id, data->handles[i], NULL)); +// } else { +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_unregister_with(data->loop, data->base, data->id, data->handles[i])); +// } +// vTaskDelay(1); +// } + +// xSemaphoreGive(arg->done); + +// vTaskDelete(NULL); +// } + +// static void test_handler_post_w_task(void* event_handler_arg, esp_event_base_t event_base, int32_t event_id, void* event_data) +// { +// simple_arg_t* arg = (simple_arg_t*) event_handler_arg; + +// esp_event_loop_handle_t* loop = (esp_event_loop_handle_t*) event_data; +// int* count = (int*) arg->data; + +// (*count)++; + +// if (*count <= 2) { +// if (event_base == s_test_base1 && event_id == TEST_EVENT_BASE1_EV1) { +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(*loop, s_test_base1, TEST_EVENT_BASE1_EV2, NULL, 0, portMAX_DELAY)); +// } else{ +// xSemaphoreGive((SemaphoreHandle_t) arg->mutex); +// } +// } else { +// // Test that once the queue is full and the handler attempts to post to the same loop, +// // posting does not block indefinitely. +// if (event_base == s_test_base1 && event_id == TEST_EVENT_BASE1_EV1) { +// xSemaphoreTake((SemaphoreHandle_t) arg->mutex, portMAX_DELAY); +// TEST_ASSERT_EQUAL(ESP_ERR_TIMEOUT, esp_event_post_to(*loop, s_test_base1, TEST_EVENT_BASE1_EV2, NULL, 0, portMAX_DELAY)); +// } +// } +// } + +// static void test_handler_post_wo_task(void* event_handler_arg, esp_event_base_t event_base, int32_t event_id, void* event_data) +// { +// simple_arg_t* arg = (simple_arg_t*) event_handler_arg; + +// esp_event_loop_handle_t* loop = (esp_event_loop_handle_t*) event_data; +// int* count = (int*) arg->data; + +// (*count)++; + +// if (*count <= 2) { +// if (event_base == s_test_base1 && event_id == TEST_EVENT_BASE1_EV1) { +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(*loop, s_test_base1, TEST_EVENT_BASE1_EV2, NULL, 0, portMAX_DELAY)); +// } else{ +// xSemaphoreGive((SemaphoreHandle_t) arg->mutex); +// } +// } else { +// // Test that once the queue is full and the handler attempts to post to the same loop, +// // posting does not block indefinitely. +// if (event_base == s_test_base1 && event_id == TEST_EVENT_BASE1_EV1) { +// xSemaphoreTake((SemaphoreHandle_t) arg->mutex, portMAX_DELAY); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(*loop, s_test_base1, TEST_EVENT_BASE1_EV2, NULL, 0, portMAX_DELAY)); +// TEST_ASSERT_EQUAL(ESP_ERR_TIMEOUT, esp_event_post_to(*loop, s_test_base1, TEST_EVENT_BASE1_EV2, NULL, 0, portMAX_DELAY)); +// } +// } +// } + +// static void test_post_from_handler_loop_task(void* args) +// { +// esp_event_loop_handle_t event_loop = (esp_event_loop_handle_t) args; + +// while(1) { +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_run(event_loop, portMAX_DELAY)); +// } +// } + +static void test_setup(void) +{ + TEST_ASSERT_TRUE(TEST_CONFIG_TASKS_TO_SPAWN >= 2); + TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_create_default()); +} + +static void test_teardown(void) +{ + TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_delete_default()); +} + +#define TIMER_DIVIDER 16 // Hardware timer clock divider +#define TIMER_SCALE (TIMER_BASE_CLK / TIMER_DIVIDER) // convert counter value to seconds +#define TIMER_INTERVAL0_SEC (2.0) // sample test interval for the first timer + +#if CONFIG_ESP_EVENT_POST_FROM_ISR +static void test_handler_post_from_isr(void* event_handler_arg, esp_event_base_t event_base, int32_t event_id, void* event_data) +{ + SemaphoreHandle_t *sem = (SemaphoreHandle_t*) event_handler_arg; + // Event data is just the address value (maybe have been truncated due to casting). + int *data = (int*) event_data; + TEST_ASSERT_EQUAL(*data, (int) (*sem)); + xSemaphoreGive(*sem); +} + +void IRAM_ATTR test_event_on_timer_alarm(void* para) +{ + /* Retrieve the interrupt status and the counter value + from the timer that reported the interrupt */ + uint64_t timer_counter_value = + timer_group_get_counter_value_in_isr(TIMER_GROUP_0, TIMER_0); + timer_group_intr_clr_in_isr(TIMER_GROUP_0, TIMER_0); + timer_counter_value += (uint64_t) (TIMER_INTERVAL0_SEC * TIMER_SCALE); + timer_group_set_alarm_value_in_isr(TIMER_GROUP_0, TIMER_0, timer_counter_value); + + int data = (int) para; + // Posting events with data more than 4 bytes should fail. + TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, esp_event_isr_post(s_test_base1, TEST_EVENT_BASE1_EV1, &data, 5, NULL)); + // This should succeedd, as data is int-sized. The handler for the event checks that the passed event data + // is correct. + BaseType_t task_unblocked; + TEST_ASSERT_EQUAL(ESP_OK, esp_event_isr_post(s_test_base1, TEST_EVENT_BASE1_EV1, &data, sizeof(data), &task_unblocked)); + if (task_unblocked == pdTRUE) { + portYIELD_FROM_ISR(); + } +} +#endif //CONFIG_ESP_EVENT_POST_FROM_ISR + +// TEST_CASE("can create and delete event loops", "[event]") +// { +// /* this test aims to verify that: +// * - creating loops with and without a task succeeds +// * - event queue can accomodate the set queue size, and drops the post when exceeded +// * - deleting loops with unconsumed posts and unregistered handlers (when unregistration is enabled) does not leak memory */ + +// TEST_SETUP(); + +// esp_event_loop_handle_t loop1; // with dedicated task +// esp_event_loop_handle_t loop2; // without dedicated task +// esp_event_loop_handle_t loop3; // with leftover post and handlers + +// esp_event_loop_args_t loop_args = test_event_get_default_loop_args(); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_create(&loop_args, &loop1)); + +// loop_args.task_name = NULL; +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_create(&loop_args, &loop2)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_create(&loop_args, &loop3)); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop3, s_test_base1, TEST_EVENT_BASE1_EV1, (void*) 0x00000001, NULL)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop3, s_test_base1, TEST_EVENT_BASE1_EV2, (void*) 0x00000002, NULL)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop3, s_test_base2, TEST_EVENT_BASE1_EV1, (void*) 0x00000003, NULL)); + +// for (int i = 0; i < loop_args.queue_size; i++) { +// int mod = i % 4; + +// switch(mod) { +// case 0: +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop3, s_test_base1, TEST_EVENT_BASE1_EV1, NULL, 0, portMAX_DELAY)); +// break; +// case 1: +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop3, s_test_base2, TEST_EVENT_BASE1_EV1, NULL, 0, portMAX_DELAY)); +// break; +// case 2: +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop3, s_test_base1, TEST_EVENT_BASE1_EV2, NULL, 0, portMAX_DELAY)); +// break; +// case 3: +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop3, s_test_base2, TEST_EVENT_BASE1_EV2, NULL, 0, portMAX_DELAY)); +// break; +// default: +// break; +// } +// } + +// TEST_ASSERT_EQUAL(ESP_ERR_TIMEOUT, esp_event_post_to(loop3, s_test_base1, TEST_EVENT_BASE1_EV1, NULL, 0, pdMS_TO_TICKS(10))); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_delete(loop1)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_delete(loop2)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_delete(loop3)); + +// TEST_TEARDOWN(); +// } + +// TEST_CASE("can register/unregister handlers for all events/all events for a specific base", "[event]") +// { +// /* this test aims to verify that handlers can be registered to be called on all events +// * or for all events with specific bases */ + +// TEST_SETUP(); + +// esp_event_loop_handle_t loop; + +// int count = 0; + +// simple_arg_t arg = { +// .data = &count, +// .mutex = xSemaphoreCreateMutex() +// }; + +// esp_event_loop_args_t loop_args = test_event_get_default_loop_args(); + +// loop_args.task_name = NULL; +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_create(&loop_args, &loop)); + +// /* Register the handler twice to the same base and id but with a different argument (expects to return ESP_OK and log a warning) +// * This aims to verify: 1) Handler's argument to be updated +// * 2) Registration not to leak memory +// */ +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop, ESP_EVENT_ANY_BASE, ESP_EVENT_ANY_ID, test_event_simple_handler, NULL)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop, ESP_EVENT_ANY_BASE, ESP_EVENT_ANY_ID, test_event_simple_handler, &arg)); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop, s_test_base1, ESP_EVENT_ANY_ID, test_event_simple_handler, &arg)); +// TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, esp_event_handler_register_with(loop, ESP_EVENT_ANY_BASE, TEST_EVENT_BASE1_EV1, test_event_simple_handler, &arg)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop, s_test_base1, TEST_EVENT_BASE1_EV1, test_event_simple_handler, &arg)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop, s_test_base1, TEST_EVENT_BASE1_EV2, test_event_simple_handler, &arg)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop, s_test_base2, TEST_EVENT_BASE1_EV1, test_event_simple_handler, &arg)); + +// TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, esp_event_post_to(loop, ESP_EVENT_ANY_BASE, ESP_EVENT_ANY_ID, NULL, 0, portMAX_DELAY)); +// TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, esp_event_post_to(loop, s_test_base1, ESP_EVENT_ANY_ID, NULL, 0, portMAX_DELAY)); +// TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, esp_event_post_to(loop, ESP_EVENT_ANY_BASE, TEST_EVENT_BASE1_EV1, NULL, 0, portMAX_DELAY)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop, s_test_base1, TEST_EVENT_BASE1_EV1, NULL, 0, portMAX_DELAY)); // exec loop, base and id level (+3) +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop, s_test_base1, TEST_EVENT_BASE1_EV2, NULL, 0, portMAX_DELAY)); // exec loop, base and id level (+3) + +// // Post unknown events. Respective loop level and base level handlers should still execute. +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop, s_test_base1, TEST_EVENT_BASE1_MAX, NULL, 0, portMAX_DELAY)); // exec loop and base level (+2) +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop, s_test_base2, TEST_EVENT_BASE2_MAX, NULL, 0, portMAX_DELAY)); // exec loop level (+1) + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_run(loop, pdMS_TO_TICKS(10))); + +// TEST_ASSERT_EQUAL(9, count); // 3 + 3 + 2 + 1 + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_delete(loop)); + +// vSemaphoreDelete(arg.mutex); + +// TEST_TEARDOWN(); +// } + +// TEST_CASE("can unregister handler", "[event]") +// { +// /* this test aims to verify that unregistered handlers no longer execute when events are raised */ + +// TEST_SETUP(); + +// esp_event_loop_handle_t loop; +// esp_event_loop_args_t loop_args = test_event_get_default_loop_args(); + +// loop_args.task_name = NULL; +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_create(&loop_args, &loop)); + +// int count = 0; + +// simple_arg_t arg = { +// .data = &count, +// .mutex = xSemaphoreCreateMutex() +// }; + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop, s_test_base1, TEST_EVENT_BASE1_EV1, test_event_simple_handler, &arg)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop, s_test_base2, TEST_EVENT_BASE1_EV1, test_event_simple_handler, &arg)); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop, s_test_base1, TEST_EVENT_BASE1_EV1, NULL, 0, portMAX_DELAY)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop, s_test_base2, TEST_EVENT_BASE1_EV1, NULL, 0, portMAX_DELAY)); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_run(loop, pdMS_TO_TICKS(10))); + +// TEST_ASSERT_EQUAL(2, count); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_unregister_with(loop, s_test_base1, TEST_EVENT_BASE1_EV1, test_event_simple_handler)); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop, s_test_base1, TEST_EVENT_BASE1_EV1, NULL, 0, portMAX_DELAY)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop, s_test_base2, TEST_EVENT_BASE1_EV1, NULL, 0, portMAX_DELAY)); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_run(loop, pdMS_TO_TICKS(10))); + +// TEST_ASSERT_EQUAL(3, count); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_delete(loop)); + +// vSemaphoreDelete(arg.mutex); + +// TEST_TEARDOWN(); +// } + +// TEST_CASE("can exit running loop at approximately the set amount of time", "[event]") +// { +// /* this test aims to verify that running loop does not block indefinitely in cases where +// * events are posted frequently */ + +// TEST_SETUP(); + +// esp_event_loop_handle_t loop; +// esp_event_loop_args_t loop_args = test_event_get_default_loop_args(); + +// loop_args.task_name = NULL; +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_create(&loop_args, &loop)); + +// performance_data_t handler_data = { +// .performed = 0, +// .expected = INT32_MAX, +// .done = xSemaphoreCreateBinary() +// }; + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop, s_test_base1, TEST_EVENT_BASE1_EV1, test_event_performance_handler, &handler_data)); + +// post_event_data_t post_event_data = { +// .base = s_test_base1, +// .id = TEST_EVENT_BASE1_EV1, +// .loop = loop, +// .num = INT32_MAX +// }; + +// task_arg_t post_event_arg = { +// .data = &post_event_data, +// .done = xSemaphoreCreateBinary(), +// .start = xSemaphoreCreateBinary() +// }; + +// TaskHandle_t post_task; + +// xTaskCreatePinnedToCore(test_event_post_task, "post", 2048, &post_event_arg, s_test_priority, &post_task, test_event_get_core()); + +// int runtime_ms = 10; +// int runtime_us = runtime_ms * 1000; + +// int64_t start, diff; +// start = esp_timer_get_time(); + +// xSemaphoreGive(post_event_arg.start); + +// // Run the loop for the runtime_ms set amount of time, regardless of whether events +// // are still being posted to the loop. +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_run(loop, pdMS_TO_TICKS(runtime_ms))); + +// diff = (esp_timer_get_time() - start); + +// // Threshold is 25 percent. +// TEST_ASSERT(diff < runtime_us * 1.25f); + +// // Verify that the post task still continues +// TEST_ASSERT_NOT_EQUAL(pdTRUE, xSemaphoreTake(post_event_arg.done, pdMS_TO_TICKS(10))); + +// vSemaphoreDelete(post_event_arg.done); +// vSemaphoreDelete(post_event_arg.start); +// vSemaphoreDelete(handler_data.done); +// vTaskDelete(post_task); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_delete(loop)); + +// TEST_TEARDOWN(); +// } + +// TEST_CASE("can register/unregister handlers simultaneously", "[event]") +// { +// /* this test aims to verify that the event handlers list remains consistent despite +// * simultaneous access by differenct tasks */ + +// TEST_SETUP(); + +// const char* base = "base"; +// int32_t id = 0; + +// esp_event_loop_handle_t loop; +// esp_event_loop_args_t loop_args = test_event_get_default_loop_args(); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_create(&loop_args, &loop)); + +// ESP_LOGI(TAG, "registering handlers"); + +// handler_registration_data_t* registration_data = calloc(TEST_CONFIG_TASKS_TO_SPAWN, sizeof(*registration_data)); +// task_arg_t* registration_arg = calloc(TEST_CONFIG_TASKS_TO_SPAWN, sizeof(*registration_arg)); + +// for (int i = 0; i < TEST_CONFIG_TASKS_TO_SPAWN; i++) { +// registration_data[i].base = base; +// registration_data[i].id = id; +// registration_data[i].loop = loop; +// registration_data[i].handles = calloc(TEST_CONFIG_ITEMS_TO_REGISTER, sizeof(esp_event_handler_t)); +// registration_data[i].num = TEST_CONFIG_ITEMS_TO_REGISTER; +// registration_data[i].is_registration = true; + +// for (int j = 0; j < TEST_CONFIG_ITEMS_TO_REGISTER; j++) { +// registration_data[i].handles[j] = (void*) (i * TEST_CONFIG_ITEMS_TO_REGISTER) + (j + TEST_CONFIG_ITEMS_TO_REGISTER); +// } + +// registration_arg[i].start = xSemaphoreCreateBinary(); +// registration_arg[i].done = xSemaphoreCreateBinary(); +// registration_arg[i].data = ®istration_data[i]; + +// xTaskCreatePinnedToCore(test_event_simple_handler_registration_task, "register", 2048, ®istration_arg[i], s_test_priority, NULL, test_event_get_core()); +// } + +// // Give the semaphores to the spawned registration task +// for (int i = 0; i < TEST_CONFIG_TASKS_TO_SPAWN; i++) { +// xSemaphoreGive(registration_arg[i].start); +// } + +// // Take the same semaphores in order to proceed +// for (int i = 0; i < TEST_CONFIG_TASKS_TO_SPAWN; i++) { +// xSemaphoreTake(registration_arg[i].done, portMAX_DELAY); +// } + +// ESP_LOGI(TAG, "checking consistency of handlers list"); + +// // Check consistency of events list +// for (int i = 0; i < TEST_CONFIG_TASKS_TO_SPAWN; i++) { +// for (int j = 0; j < TEST_CONFIG_ITEMS_TO_REGISTER; j++) { +// TEST_ASSERT_TRUE(esp_event_is_handler_registered(loop, base, id, registration_data[i].handles[j])); +// } +// } + +// ESP_LOGI(TAG, "unregistering handlers"); + +// /* Test if tasks can unregister simultaneously */ + +// // Unregister registered events +// handler_registration_data_t* unregistration_data = calloc(TEST_CONFIG_TASKS_TO_SPAWN, sizeof(*unregistration_data)); +// task_arg_t* unregistration_arg = calloc(TEST_CONFIG_TASKS_TO_SPAWN, sizeof(*unregistration_arg)); + +// for (int i = 0; i < TEST_CONFIG_TASKS_TO_SPAWN; i++) { +// unregistration_data[i].base = base; +// unregistration_data[i].id = id; +// unregistration_data[i].loop = loop; +// unregistration_data[i].handles = calloc(TEST_CONFIG_ITEMS_TO_REGISTER, sizeof(esp_event_handler_t)); +// unregistration_data[i].num = TEST_CONFIG_ITEMS_TO_REGISTER; +// unregistration_data[i].is_registration = false; + +// memcpy(unregistration_data[i].handles, registration_data[i].handles, TEST_CONFIG_ITEMS_TO_REGISTER * sizeof(esp_event_handler_t)); + +// unregistration_arg[i].data = &unregistration_data[i]; +// unregistration_arg[i].start = xSemaphoreCreateBinary(); +// unregistration_arg[i].done = xSemaphoreCreateBinary(); + +// xTaskCreatePinnedToCore(test_event_simple_handler_registration_task, "unregister", 2048, &unregistration_arg[i], s_test_priority, NULL, test_event_get_core()); +// } + +// // Give the semaphores to the spawned unregistration task +// for (int i = 0; i < TEST_CONFIG_TASKS_TO_SPAWN; i++) { +// xSemaphoreGive(unregistration_arg[i].start); +// } + +// // Take the same semaphores in order to proceed +// for (int i = 0; i < TEST_CONFIG_TASKS_TO_SPAWN; i++) { +// xSemaphoreTake(unregistration_arg[i].done, portMAX_DELAY); +// } + +// ESP_LOGI(TAG, "checking consistency of handlers list"); + +// // Check consistency of events list +// for (int i = 0; i < TEST_CONFIG_TASKS_TO_SPAWN; i++) { +// for (int j = 0; j < TEST_CONFIG_ITEMS_TO_REGISTER; j++) { +// TEST_ASSERT_FALSE(esp_event_is_handler_registered(loop, base, id, registration_data[i].handles[j])); +// } +// } + +// // Do cleanup +// for (int i = 0; i < TEST_CONFIG_TASKS_TO_SPAWN; i++) { +// free(registration_data[i].handles); +// vSemaphoreDelete(registration_arg[i].start); +// vSemaphoreDelete(registration_arg[i].done); + +// free(unregistration_data[i].handles); +// vSemaphoreDelete(unregistration_arg[i].start); +// vSemaphoreDelete(unregistration_arg[i].done); +// } + +// free(registration_data); +// free(unregistration_data); +// free(registration_arg); +// free(unregistration_arg); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_delete(loop)); + +// TEST_TEARDOWN(); +// } + +// TEST_CASE("can post and run events", "[event]") +// { +// /* this test aims to verify that: +// * - multiple tasks can post to the queue simultaneously +// * - handlers recieve the appropriate handler arg and associated event data */ + +// TEST_SETUP(); + +// esp_event_loop_handle_t loop; + +// esp_event_loop_args_t loop_args = test_event_get_default_loop_args(); + +// loop_args.task_name = NULL; +// loop_args.queue_size = TEST_CONFIG_TASKS_TO_SPAWN * TEST_CONFIG_ITEMS_TO_REGISTER; +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_create(&loop_args, &loop)); + +// int count = 0; + +// simple_arg_t arg = { +// .data = &count, +// .mutex = xSemaphoreCreateMutex() +// }; + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop, s_test_base1, TEST_EVENT_BASE1_EV1, test_event_simple_handler, &arg)); + +// post_event_data_t* post_event_data = calloc(TEST_CONFIG_TASKS_TO_SPAWN, sizeof(*post_event_data)); +// task_arg_t* post_event_arg = calloc(TEST_CONFIG_TASKS_TO_SPAWN, sizeof(*post_event_arg)); + +// for (int i = 0; i < TEST_CONFIG_TASKS_TO_SPAWN; i++) +// { +// post_event_data[i].base = s_test_base1; +// post_event_data[i].id = TEST_EVENT_BASE1_EV1; +// post_event_data[i].loop = loop; +// post_event_data[i].num = TEST_CONFIG_ITEMS_TO_REGISTER; + +// post_event_arg[i].data = &post_event_data[i]; +// post_event_arg[i].start = xSemaphoreCreateBinary(); +// post_event_arg[i].done = xSemaphoreCreateBinary(); + +// xTaskCreatePinnedToCore(test_event_post_task, "post", 2048, &post_event_arg[i], s_test_priority, NULL, test_event_get_core()); +// } + +// for (int i = 0; i < TEST_CONFIG_TASKS_TO_SPAWN; i++) { +// xSemaphoreGive(post_event_arg[i].start); +// } + +// // Execute some events as they are posted +// for (int i = 0; i < (TEST_CONFIG_TASKS_TO_SPAWN * TEST_CONFIG_ITEMS_TO_REGISTER) / 2; i++) { +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_run(loop, pdMS_TO_TICKS(10))); +// } + +// for (int i = 0; i < TEST_CONFIG_TASKS_TO_SPAWN; i++) { +// xSemaphoreTake(post_event_arg[i].done, portMAX_DELAY); +// } + +// // Execute the rest +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_run(loop, pdMS_TO_TICKS(10))); + +// TEST_ASSERT_EQUAL(TEST_CONFIG_TASKS_TO_SPAWN * TEST_CONFIG_ITEMS_TO_REGISTER, count); + +// // Cleanup +// for (int i = 0; i < TEST_CONFIG_TASKS_TO_SPAWN; i++) { +// vSemaphoreDelete(post_event_arg[i].start); +// vSemaphoreDelete(post_event_arg[i].done); +// } + +// free(post_event_data); +// free(post_event_arg); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_delete(loop)); + +// vSemaphoreDelete(arg.mutex); + +// TEST_TEARDOWN(); +// } + +// static void loop_run_task(void* args) +// { +// esp_event_loop_handle_t event_loop = (esp_event_loop_handle_t) args; + +// while(1) { +// esp_event_loop_run(event_loop, portMAX_DELAY); +// } +// } + +// static void performance_test(bool dedicated_task) +// { +// // rand() seems to do a one-time allocation. Call it here so that the memory it allocates +// // is not counted as a leak. +// unsigned int _rand __attribute__((unused)) = rand(); + +// TEST_SETUP(); + +// const char test_base[] = "qwertyuiopasdfghjklzxvbnmmnbvcxzqwertyuiopasdfghjklzxvbnmmnbvcxz"; + +// #define TEST_CONFIG_BASES (sizeof(test_base) - 1) +// #define TEST_CONFIG_IDS (TEST_CONFIG_BASES / 2) + +// // Create loop +// esp_event_loop_args_t loop_args = test_event_get_default_loop_args(); +// esp_event_loop_handle_t loop; + +// if (!dedicated_task) { +// loop_args.task_name = NULL; +// } + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_create(&loop_args, &loop)); + +// performance_data_t data; + +// // Register the handlers +// for (int base = 0; base < TEST_CONFIG_BASES; base++) { +// for (int id = 0; id < TEST_CONFIG_IDS; id++) { +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop, test_base + base, id, test_event_performance_handler, &data)); +// } +// } + +// TaskHandle_t mtask = NULL; + +// if (!dedicated_task) { +// xTaskCreate(loop_run_task, "loop_run", loop_args.task_stack_size, (void*) loop, loop_args.task_priority, &mtask); +// } + +// // Perform performance test +// float running_sum = 0; +// float running_count = 0; + +// for (int bases = 1; bases <= TEST_CONFIG_BASES; bases *= 2) { +// for (int ids = 1; ids <= TEST_CONFIG_IDS; ids *= 2) { + +// data.performed = 0; +// data.expected = bases * ids; +// data.done = xSemaphoreCreateBinary(); + +// // Generate randomized list of posts +// int post_bases[TEST_CONFIG_BASES]; +// int post_ids[TEST_CONFIG_IDS]; + +// for (int i = 0; i < bases; i++) { +// post_bases[i] = i; +// } + +// for (int i = 0; i < ids; i++) { +// post_ids[i] = i; +// } + +// for (int i = 0; i < bases; i++) { +// int rand_a = rand() % bases; +// int rand_b = rand() % bases; + +// int temp = post_bases[rand_a]; +// post_bases[rand_a]= post_bases[rand_b]; +// post_bases[rand_b] = temp; +// } + +// for (int i = 0; i < ids; i++) { +// int rand_a = rand() % ids; +// int rand_b = rand() % ids; + +// int temp = post_ids[rand_a]; +// post_ids[rand_a]= post_ids[rand_b]; +// post_ids[rand_b] = temp; +// } + +// // Post the events +// int64_t start = esp_timer_get_time(); +// for (int base = 0; base < bases; base++) { +// for (int id = 0; id < ids; id++) { +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop, test_base + post_bases[base], post_ids[id], NULL, 0, portMAX_DELAY)); +// } +// } + +// xSemaphoreTake(data.done, portMAX_DELAY); +// int64_t elapsed = esp_timer_get_time() - start; + +// // Record data +// TEST_ASSERT_EQUAL(data.expected, data.performed); + +// running_count++; +// running_sum += data.performed / (elapsed / (1000000.0)); + +// vSemaphoreDelete(data.done); +// } +// } + +// int average = (int) (running_sum / (running_count)); + +// if (!dedicated_task) { +// ((esp_event_loop_instance_t*) loop)->task = mtask; +// } + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_delete(loop)); + +// TEST_TEARDOWN(); + +// #ifdef CONFIG_ESP_EVENT_LOOP_PROFILING +// ESP_LOGI(TAG, "events dispatched/second with profiling enabled: %d", average); +// // Enabling profiling will slow down event dispatch, so the set threshold +// // is not valid when it is enabled. +// #else +// #ifndef CONFIG_SPIRAM +// TEST_PERFORMANCE_GREATER_THAN(EVENT_DISPATCH, "%d", average); +// #else +// TEST_PERFORMANCE_GREATER_THAN(EVENT_DISPATCH_PSRAM, "%d", average); +// #endif // CONFIG_SPIRAM +// #endif // CONFIG_ESP_EVENT_LOOP_PROFILING +// } + +// TEST_CASE("performance test - dedicated task", "[event]") +// { +// performance_test(true); +// } + +// TEST_CASE("performance test - no dedicated task", "[event]") +// { +// performance_test(false); +// } + +// TEST_CASE("can post to loop from handler - dedicated task", "[event]") +// { +// TEST_SETUP(); + +// esp_event_loop_handle_t loop_w_task; + +// esp_event_loop_args_t loop_args = test_event_get_default_loop_args(); + +// int count; + +// simple_arg_t arg = { +// .data = &count, +// .mutex = xSemaphoreCreateBinary() +// }; + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_create(&loop_args, &loop_w_task)); + +// count = 0; + +// // Test that a handler can post to a different loop while there is still slots on the queue +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop_w_task, s_test_base1, TEST_EVENT_BASE1_EV1, test_handler_post_w_task, &arg)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop_w_task, s_test_base1, TEST_EVENT_BASE1_EV2, test_handler_post_w_task, &arg)); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop_w_task, s_test_base1, TEST_EVENT_BASE1_EV1, &loop_w_task, sizeof(&loop_w_task), portMAX_DELAY)); + +// xSemaphoreTake(arg.mutex, portMAX_DELAY); + +// TEST_ASSERT_EQUAL(2, count); + +// // Test that other tasks can still post while there is still slots in the queue, while handler is executing +// count = 100; + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop_w_task, s_test_base1, TEST_EVENT_BASE1_EV1, &loop_w_task, sizeof(&loop_w_task), portMAX_DELAY)); + +// for (int i = 0; i < loop_args.queue_size; i++) { +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop_w_task, s_test_base1, TEST_EVENT_BASE1_EV2, NULL, 0, portMAX_DELAY)); +// } + +// TEST_ASSERT_EQUAL(ESP_ERR_TIMEOUT, esp_event_post_to(loop_w_task, s_test_base1, TEST_EVENT_BASE1_EV2, NULL, 0, +// pdMS_TO_TICKS(CONFIG_ESP_INT_WDT_TIMEOUT_MS * TEST_CONFIG_WAIT_MULTIPLIER))); + +// xSemaphoreGive(arg.mutex); + +// vTaskDelay(pdMS_TO_TICKS(CONFIG_ESP_INT_WDT_TIMEOUT_MS * TEST_CONFIG_WAIT_MULTIPLIER)); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_delete(loop_w_task)); + +// vSemaphoreDelete(arg.mutex); + +// TEST_TEARDOWN(); +// } + +// TEST_CASE("can post to loop from handler - no dedicated task", "[event]") +// { +// TEST_SETUP(); + +// esp_event_loop_handle_t loop_wo_task; + +// esp_event_loop_args_t loop_args = test_event_get_default_loop_args(); + +// int count; + +// simple_arg_t arg = { +// .data = &count, +// .mutex = xSemaphoreCreateBinary() +// }; + +// count = 0; + +// loop_args.queue_size = 1; +// loop_args.task_name = NULL; +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_create(&loop_args, &loop_wo_task)); + +// TaskHandle_t mtask; + +// xTaskCreate(test_post_from_handler_loop_task, "task", 2584, (void*) loop_wo_task, s_test_priority, &mtask); + +// // Test that a handler can post to a different loop while there is still slots on the queue +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop_wo_task, s_test_base1, TEST_EVENT_BASE1_EV1, test_handler_post_wo_task, &arg)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop_wo_task, s_test_base1, TEST_EVENT_BASE1_EV2, test_handler_post_wo_task, &arg)); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop_wo_task, s_test_base1, TEST_EVENT_BASE1_EV1, &loop_wo_task, sizeof(&loop_wo_task), portMAX_DELAY)); + +// xSemaphoreTake(arg.mutex, portMAX_DELAY); + +// TEST_ASSERT_EQUAL(2, count); + +// count = 100; + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop_wo_task, s_test_base1, TEST_EVENT_BASE1_EV1, &loop_wo_task, sizeof(&loop_wo_task), portMAX_DELAY)); + +// vTaskDelay(pdMS_TO_TICKS(CONFIG_ESP_INT_WDT_TIMEOUT_MS * TEST_CONFIG_WAIT_MULTIPLIER)); + +// // For loop without tasks, posting is more restrictive. Posting should wait until execution of handler finishes +// TEST_ASSERT_EQUAL(ESP_ERR_TIMEOUT, esp_event_post_to(loop_wo_task, s_test_base1, TEST_EVENT_BASE1_EV2, NULL, 0, +// pdMS_TO_TICKS(CONFIG_ESP_INT_WDT_TIMEOUT_MS * TEST_CONFIG_WAIT_MULTIPLIER))); + +// xSemaphoreGive(arg.mutex); + +// vTaskDelay(pdMS_TO_TICKS(CONFIG_ESP_INT_WDT_TIMEOUT_MS * TEST_CONFIG_WAIT_MULTIPLIER)); + +// vTaskDelete(mtask); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_delete(loop_wo_task)); + +// vSemaphoreDelete(arg.mutex); + +// TEST_TEARDOWN(); +// } + +// static void test_event_simple_handler_template(void* handler_arg, esp_event_base_t base, int32_t id, void* event_arg) +// { +// int* count = (int*) handler_arg; +// (*count)++; +// } + +// static void test_event_simple_handler_1(void* handler_arg, esp_event_base_t base, int32_t id, void* event_arg) +// { +// test_event_simple_handler_template(handler_arg, base, id, event_arg); +// } + +// static void test_event_simple_handler_3(void* handler_arg, esp_event_base_t base, int32_t id, void* event_arg) +// { +// test_event_simple_handler_template(handler_arg, base, id, event_arg); +// } + +// static void test_event_simple_handler_2(void* handler_arg, esp_event_base_t base, int32_t id, void* event_arg) +// { +// test_event_simple_handler_template(handler_arg, base, id, event_arg); +// } + +// static void test_registration_from_handler_hdlr(void* handler_arg, esp_event_base_t base, int32_t id, void* event_arg) +// { +// esp_event_loop_handle_t* loop = (esp_event_loop_handle_t*) event_arg; +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(*loop, s_test_base1, TEST_EVENT_BASE1_EV2, test_event_simple_handler_1, handler_arg)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(*loop, s_test_base1, TEST_EVENT_BASE1_EV2, test_event_simple_handler_2, handler_arg)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(*loop, s_test_base1, TEST_EVENT_BASE1_EV2, test_event_simple_handler_3, handler_arg)); +// } + +// static void test_unregistration_from_handler_hdlr(void* handler_arg, esp_event_base_t base, int32_t id, void* event_arg) +// { +// esp_event_loop_handle_t* loop = (esp_event_loop_handle_t*) event_arg; +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_unregister_with(*loop, s_test_base1, TEST_EVENT_BASE1_EV2, test_event_simple_handler_1)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_unregister_with(*loop, s_test_base1, TEST_EVENT_BASE1_EV2, test_event_simple_handler_2)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_unregister_with(*loop, s_test_base1, TEST_EVENT_BASE1_EV2, test_event_simple_handler_3)); +// } + +// TEST_CASE("can register from handler", "[event]") +// { +// TEST_SETUP(); + +// esp_event_loop_handle_t loop; + +// esp_event_loop_args_t loop_args = test_event_get_default_loop_args(); + +// loop_args.task_name = NULL; +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_create(&loop_args, &loop)); + +// int count = 0; + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop, s_test_base1, TEST_EVENT_BASE1_EV1, test_registration_from_handler_hdlr, &count)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop, s_test_base2, TEST_EVENT_BASE2_EV1, test_unregistration_from_handler_hdlr, &count)); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop, s_test_base1, TEST_EVENT_BASE1_EV1, &loop, sizeof(&loop), portMAX_DELAY)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_run(loop, pdMS_TO_TICKS(10))); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop, s_test_base1, TEST_EVENT_BASE1_EV2, NULL, 0, portMAX_DELAY)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_run(loop, pdMS_TO_TICKS(10))); + +// TEST_ASSERT_EQUAL(3, count); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop, s_test_base2, TEST_EVENT_BASE2_EV1, &loop, sizeof(&loop), portMAX_DELAY)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_run(loop, pdMS_TO_TICKS(10))); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop, s_test_base1, TEST_EVENT_BASE1_EV2, NULL, 0, portMAX_DELAY)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_run(loop, pdMS_TO_TICKS(10))); + +// TEST_ASSERT_EQUAL(3, count); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_delete(loop)); + +// TEST_TEARDOWN(); +// } + +// static void test_create_loop_handler(void* handler_args, esp_event_base_t base, int32_t id, void* event_data) +// { +// esp_event_loop_args_t loop_args = test_event_get_default_loop_args(); + +// if (id == TEST_EVENT_BASE1_EV1) { +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_create(&loop_args, (esp_event_loop_handle_t*) handler_args)); +// } else { +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_delete(*((esp_event_loop_handle_t*) handler_args))); +// } +// } + +// TEST_CASE("can create and delete loop from handler", "[event]") +// { +// TEST_SETUP(); + +// esp_event_loop_handle_t loop; +// esp_event_loop_handle_t test_loop; + +// esp_event_loop_args_t loop_args = test_event_get_default_loop_args(); + +// loop_args.task_name = NULL; +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_create(&loop_args, &loop)); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop, s_test_base1, TEST_EVENT_BASE1_EV1, test_create_loop_handler, &test_loop)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop, s_test_base1, TEST_EVENT_BASE1_EV2, test_create_loop_handler, &test_loop)); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop, s_test_base1, TEST_EVENT_BASE1_EV1, NULL, 0, portMAX_DELAY)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_run(loop, pdMS_TO_TICKS(10))); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop, s_test_base1, TEST_EVENT_BASE1_EV2, NULL, 0, portMAX_DELAY)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_run(loop, pdMS_TO_TICKS(10))); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_delete(loop)); + +// TEST_TEARDOWN(); +// } + +// TEST_CASE("events are dispatched in the order they are registered", "[event]") +// { +// TEST_SETUP(); + +// esp_event_loop_handle_t loop; +// esp_event_loop_args_t loop_args = test_event_get_default_loop_args(); + +// loop_args.task_name = NULL; +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_create(&loop_args, &loop)); + +// int id_arr[7]; + +// for (int i = 0; i < 7; i++) { +// id_arr[i] = i; +// } + +// int data_arr[12] = {0}; + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop, s_test_base2, TEST_EVENT_BASE2_EV1, test_event_ordered_dispatch, id_arr + 0)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop, ESP_EVENT_ANY_BASE, ESP_EVENT_ANY_ID, test_event_ordered_dispatch, id_arr + 1)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop, s_test_base1, ESP_EVENT_ANY_ID, test_event_ordered_dispatch, id_arr + 2)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop, s_test_base2, TEST_EVENT_BASE2_EV2, test_event_ordered_dispatch, id_arr + 3)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop, s_test_base1, TEST_EVENT_BASE1_EV1, test_event_ordered_dispatch, id_arr + 4)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop, s_test_base2, ESP_EVENT_ANY_ID, test_event_ordered_dispatch, id_arr + 5)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register_with(loop, s_test_base1, TEST_EVENT_BASE1_EV2, test_event_ordered_dispatch, id_arr + 6)); + +// esp_event_dump(stdout); + +// ordered_data_t data = { +// .arr = data_arr, +// .index = 0 +// }; + +// ordered_data_t* dptr = &data; + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop, s_test_base2, TEST_EVENT_BASE1_EV2, &dptr, sizeof(dptr), portMAX_DELAY)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop, s_test_base1, TEST_EVENT_BASE1_EV1, &dptr, sizeof(dptr), portMAX_DELAY)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop, s_test_base1, TEST_EVENT_BASE1_EV2, &dptr, sizeof(dptr), portMAX_DELAY)); +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop, s_test_base2, TEST_EVENT_BASE1_EV1, &dptr, sizeof(dptr), portMAX_DELAY)); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_run(loop, pdMS_TO_TICKS(10))); + +// // Expected data executing the posts above +// int ref_arr[12] = {1, 3, 5, 1, 2, 4, 1, 2, 6, 0, 1, 5}; + +// for (int i = 0; i < 12; i++) { +// TEST_ASSERT_EQUAL(ref_arr[i], data_arr[i]); +// } + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_delete(loop)); + +// TEST_TEARDOWN(); +// } + +#if CONFIG_ESP_EVENT_POST_FROM_ISR +// TEST_CASE("can properly prepare event data posted to loop", "[event]") +// { +// TEST_SETUP(); + +// esp_event_loop_handle_t loop; +// esp_event_loop_args_t loop_args = test_event_get_default_loop_args(); + +// loop_args.task_name = NULL; +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_create(&loop_args, &loop)); + +// esp_event_post_instance_t post; +// esp_event_loop_instance_t* loop_def = (esp_event_loop_instance_t*) loop; + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_post_to(loop, s_test_base1, TEST_EVENT_BASE1_EV1, NULL, 0, portMAX_DELAY)); +// TEST_ASSERT_EQUAL(pdTRUE, xQueueReceive(loop_def->queue, &post, portMAX_DELAY)); +// TEST_ASSERT_EQUAL(false, post.data_set); +// TEST_ASSERT_EQUAL(false, post.data_allocated); +// TEST_ASSERT_EQUAL(NULL, post.data.ptr); + +// int sample = 0; +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_isr_post_to(loop, s_test_base1, TEST_EVENT_BASE1_EV1, &sample, sizeof(sample), NULL)); +// TEST_ASSERT_EQUAL(pdTRUE, xQueueReceive(loop_def->queue, &post, portMAX_DELAY)); +// TEST_ASSERT_EQUAL(true, post.data_set); +// TEST_ASSERT_EQUAL(false, post.data_allocated); +// TEST_ASSERT_EQUAL(false, post.data.val); + +// TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_delete(loop)); + +// TEST_TEARDOWN(); +// } + +TEST_CASE("can post events from interrupt handler", "[event]") +{ + SemaphoreHandle_t sem = xSemaphoreCreateBinary(); + + /* Select and initialize basic parameters of the timer */ + timer_config_t config; + config.divider = TIMER_DIVIDER; + config.counter_dir = TIMER_COUNT_UP; + config.counter_en = TIMER_PAUSE; + config.alarm_en = TIMER_ALARM_EN; + config.intr_type = TIMER_INTR_LEVEL; + config.auto_reload = false; + timer_init(TIMER_GROUP_0, TIMER_0, &config); + + /* Timer's counter will initially start from value below. + Also, if auto_reload is set, this value will be automatically reload on alarm */ + timer_set_counter_value(TIMER_GROUP_0, TIMER_0, 0x00000000ULL); + + /* Configure the alarm value and the interrupt on alarm. */ + timer_set_alarm_value(TIMER_GROUP_0, TIMER_0, TIMER_INTERVAL0_SEC * TIMER_SCALE); + timer_enable_intr(TIMER_GROUP_0, TIMER_0); + timer_isr_register(TIMER_GROUP_0, TIMER_0, test_event_on_timer_alarm, + (void *) sem, ESP_INTR_FLAG_IRAM, NULL); + + timer_start(TIMER_GROUP_0, TIMER_0); + + TEST_SETUP(); + + TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register(s_test_base1, TEST_EVENT_BASE1_EV1, + test_handler_post_from_isr, &sem)); + + xSemaphoreTake(sem, portMAX_DELAY); + + TEST_TEARDOWN(); +} +#endif // CONFIG_ESP_EVENT_POST_FROM_ISR diff --git a/components/esp_event/test/test_event.c b/components/esp_event/test/test_event.c index d598acfbd..a6c1e2e10 100644 --- a/components/esp_event/test/test_event.c +++ b/components/esp_event/test/test_event.c @@ -278,44 +278,6 @@ static void test_teardown(void) #define TIMER_SCALE (TIMER_BASE_CLK / TIMER_DIVIDER) // convert counter value to seconds #define TIMER_INTERVAL0_SEC (2.0) // sample test interval for the first timer -#if CONFIG_ESP_EVENT_POST_FROM_ISR -static void test_handler_post_from_isr(void* event_handler_arg, esp_event_base_t event_base, int32_t event_id, void* event_data) -{ - SemaphoreHandle_t *sem = (SemaphoreHandle_t*) event_handler_arg; - // Event data is just the address value (maybe have been truncated due to casting). - int *data = (int*) event_data; - TEST_ASSERT_EQUAL(*data, (int) (*sem)); - xSemaphoreGive(*sem); -} -#endif - -#if CONFIG_IDF_TARGET_ESP32S2BETA -#warning "test_event_on_timer_alarm not ported to esp32s2beta" -#else -#if CONFIG_ESP_EVENT_POST_FROM_ISR -void IRAM_ATTR test_event_on_timer_alarm(void* para) -{ - /* Retrieve the interrupt status and the counter value - from the timer that reported the interrupt */ - uint64_t timer_counter_value = - timer_group_get_counter_value_in_isr(TIMER_GROUP_0, TIMER_0); - timer_group_intr_clr_in_isr(TIMER_GROUP_0, TIMER_0); - timer_counter_value += (uint64_t) (TIMER_INTERVAL0_SEC * TIMER_SCALE); - timer_group_set_alarm_value_in_isr(TIMER_GROUP_0, TIMER_0, timer_counter_value); - - int data = (int) para; - // Posting events with data more than 4 bytes should fail. - TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, esp_event_isr_post(s_test_base1, TEST_EVENT_BASE1_EV1, &data, 5, NULL)); - // This should succeedd, as data is int-sized. The handler for the event checks that the passed event data - // is correct. - BaseType_t task_unblocked; - TEST_ASSERT_EQUAL(ESP_OK, esp_event_isr_post(s_test_base1, TEST_EVENT_BASE1_EV1, &data, sizeof(data), &task_unblocked)); - if (task_unblocked == pdTRUE) { - portYIELD_FROM_ISR(); - } -} -#endif //CONFIG_ESP_EVENT_POST_FROM_ISR -#endif //CONFIG_IDF_TARGET_ESP32S2BETA TEST_CASE("can create and delete event loops", "[event]") { @@ -1188,45 +1150,6 @@ TEST_CASE("can properly prepare event data posted to loop", "[event]") TEST_TEARDOWN(); } -#if CONFIG_IDF_TARGET_ESP32S2BETA -#warning "can post events from interrupt handler not ported to esp32s2beta" -#else -TEST_CASE("can post events from interrupt handler", "[event]") -{ - SemaphoreHandle_t sem = xSemaphoreCreateBinary(); - - /* Select and initialize basic parameters of the timer */ - timer_config_t config; - config.divider = TIMER_DIVIDER; - config.counter_dir = TIMER_COUNT_UP; - config.counter_en = TIMER_PAUSE; - config.alarm_en = TIMER_ALARM_EN; - config.intr_type = TIMER_INTR_LEVEL; - config.auto_reload = false; - timer_init(TIMER_GROUP_0, TIMER_0, &config); - - /* Timer's counter will initially start from value below. - Also, if auto_reload is set, this value will be automatically reload on alarm */ - timer_set_counter_value(TIMER_GROUP_0, TIMER_0, 0x00000000ULL); - - /* Configure the alarm value and the interrupt on alarm. */ - timer_set_alarm_value(TIMER_GROUP_0, TIMER_0, TIMER_INTERVAL0_SEC * TIMER_SCALE); - timer_enable_intr(TIMER_GROUP_0, TIMER_0); - timer_isr_register(TIMER_GROUP_0, TIMER_0, test_event_on_timer_alarm, - (void *) sem, ESP_INTR_FLAG_IRAM, NULL); - - timer_start(TIMER_GROUP_0, TIMER_0); - - TEST_SETUP(); - - TEST_ASSERT_EQUAL(ESP_OK, esp_event_handler_register(s_test_base1, TEST_EVENT_BASE1_EV1, - test_handler_post_from_isr, &sem)); - - xSemaphoreTake(sem, portMAX_DELAY); - - TEST_TEARDOWN(); -} -#endif // CONFIG_IDF_TARGET_ESP32S2BETA #endif // CONFIG_ESP_EVENT_POST_FROM_ISR #ifdef CONFIG_ESP_EVENT_LOOP_PROFILING diff --git a/components/esp_wifi/test/CMakeLists.txt b/components/esp_wifi/test/CMakeLists.txt index e7cf4b12c..049a1ec68 100644 --- a/components/esp_wifi/test/CMakeLists.txt +++ b/components/esp_wifi/test/CMakeLists.txt @@ -1,6 +1,12 @@ -idf_component_register(SRC_DIRS "." - INCLUDE_DIRS "." "${CMAKE_CURRENT_BINARY_DIR}" - REQUIRES unity test_utils nvs_flash ulp esp_common) +set(srcdirs ".") +if(IDF_TARGET STREQUAL "esp32") + list(APPEND srcdirs "esp32") +endif() + +idf_component_register(SRC_DIRS ${srcdirs} + INCLUDE_DIRS . ${CMAKE_CURRENT_BINARY_DIR} + REQUIRES unity test_utils nvs_flash ulp esp_common + ) idf_component_get_property(esp_wifi_dir esp_wifi COMPONENT_DIR) diff --git a/components/esp_wifi/test/component.mk b/components/esp_wifi/test/component.mk index 7dbb988dd..3c4a6bb67 100644 --- a/components/esp_wifi/test/component.mk +++ b/components/esp_wifi/test/component.mk @@ -5,6 +5,7 @@ COMPONENT_ADD_LDFLAGS = -Wl,--whole-archive -l$(COMPONENT_NAME) -Wl,--no-whole-archive COMPONENT_SRCDIRS := . +COMPONENT_SRCDIRS += esp32 # Calculate MD5 value of header file esp_wifi_os_adapter.h WIFI_OS_ADAPTER_MD5_VAL=\"$(shell md5sum $(IDF_PATH)/components/esp_wifi/include/esp_private/wifi_os_adapter.h | cut -c 1-7)\" diff --git a/components/esp_wifi/test/test_phy_rtc.c b/components/esp_wifi/test/esp32/test_phy_rtc.c similarity index 94% rename from components/esp_wifi/test/test_phy_rtc.c rename to components/esp_wifi/test/esp32/test_phy_rtc.c index 133a62c35..9bbe9544a 100644 --- a/components/esp_wifi/test/test_phy_rtc.c +++ b/components/esp_wifi/test/esp32/test_phy_rtc.c @@ -11,18 +11,23 @@ #include #include #include +#include "soc/soc_caps.h" //Function just extern, need not test +#ifdef SOC_BT_SUPPORTED extern void bt_bb_init_cmplx(void); +#endif extern void IRAM_ATTR spi_flash_disable_interrupts_caches_and_other_cpu(void); extern void IRAM_ATTR spi_flash_enable_interrupts_caches_and_other_cpu(void); //Functions in librtc.a called by WIFI or Blutooth directly in ISR +#ifdef SOC_BT_SUPPORTED extern void bt_bb_init_cmplx_reg(void); +extern void bt_track_pll_cap(void); +#endif extern void force_wifi_mode(int); extern void unforce_wifi_mode(void); -extern void bt_track_pll_cap(void); static const char* TAG = "test_phy_rtc"; @@ -39,7 +44,9 @@ static void test_phy_rtc_init(void) } TEST_ESP_OK(ret); +#ifdef SOC_BT_SUPPORTED esp_phy_load_cal_and_init(PHY_BT_MODULE); +#endif esp_phy_load_cal_and_init(PHY_WIFI_MODULE); //must run here, not blocking in above code @@ -51,11 +58,6 @@ static IRAM_ATTR void test_phy_rtc_cache_task(void *arg) { test_phy_rtc_init(); - ESP_LOGI(TAG, "Test bt_bb_init_cmplx_reg()..."); - spi_flash_disable_interrupts_caches_and_other_cpu(); - bt_bb_init_cmplx_reg(); - spi_flash_enable_interrupts_caches_and_other_cpu(); - for (int i = 0; i < 2; i++) { ESP_LOGI(TAG, "Test force_wifi_mode(%d)...", i); spi_flash_disable_interrupts_caches_and_other_cpu(); @@ -68,10 +70,17 @@ static IRAM_ATTR void test_phy_rtc_cache_task(void *arg) spi_flash_enable_interrupts_caches_and_other_cpu(); } +#ifdef SOC_BT_SUPPORTED + ESP_LOGI(TAG, "Test bt_bb_init_cmplx_reg()..."); + spi_flash_disable_interrupts_caches_and_other_cpu(); + bt_bb_init_cmplx_reg(); + spi_flash_enable_interrupts_caches_and_other_cpu(); + ESP_LOGI(TAG, "Test bt_track_pll_cap()..."); spi_flash_disable_interrupts_caches_and_other_cpu(); bt_track_pll_cap(); spi_flash_enable_interrupts_caches_and_other_cpu(); +#endif TEST_ASSERT( xSemaphoreGive(semphr_done) ); diff --git a/components/fatfs/test/CMakeLists.txt b/components/fatfs/test/CMakeLists.txt index 2796e95eb..c3596a0f4 100644 --- a/components/fatfs/test/CMakeLists.txt +++ b/components/fatfs/test/CMakeLists.txt @@ -1,4 +1,10 @@ -idf_component_register(SRC_DIRS "." - INCLUDE_DIRS "." - REQUIRES unity test_utils vfs fatfs - EMBED_TXTFILES fatfs.img) \ No newline at end of file +set(srcdirs ".") +if(IDF_TARGET STREQUAL "esp32") + list(APPEND srcdirs "esp32") +endif() + +idf_component_register(SRC_DIRS ${src_dirs} + INCLUDE_DIRS . + REQUIRES unity test_utils vfs fatfs + EMBED_TXTFILES fatfs.img + ) \ No newline at end of file diff --git a/components/fatfs/test/component.mk b/components/fatfs/test/component.mk index c7e058220..4278d928c 100644 --- a/components/fatfs/test/component.mk +++ b/components/fatfs/test/component.mk @@ -1,2 +1,3 @@ COMPONENT_ADD_LDFLAGS = -Wl,--whole-archive -l$(COMPONENT_NAME) -Wl,--no-whole-archive COMPONENT_EMBED_TXTFILES := fatfs.img +COMPONENT_SRCDIRS += esp32 diff --git a/components/fatfs/test/test_fatfs_sdmmc.c b/components/fatfs/test/esp32/test_fatfs_sdmmc.c similarity index 99% rename from components/fatfs/test/test_fatfs_sdmmc.c rename to components/fatfs/test/esp32/test_fatfs_sdmmc.c index 50e1eb5a0..d1d5e369f 100644 --- a/components/fatfs/test/test_fatfs_sdmmc.c +++ b/components/fatfs/test/esp32/test_fatfs_sdmmc.c @@ -29,7 +29,7 @@ #include "driver/sdmmc_defs.h" #include "sdmmc_cmd.h" #include "ff.h" -#include "test_fatfs_common.h" +#include "../test_fatfs_common.h" static void test_setup(void) diff --git a/components/freertos/test/CMakeLists.txt b/components/freertos/test/CMakeLists.txt index b531a1450..8f40b2df0 100644 --- a/components/freertos/test/CMakeLists.txt +++ b/components/freertos/test/CMakeLists.txt @@ -1,3 +1,11 @@ -idf_component_register(SRC_DIRS "." - INCLUDE_DIRS "." - REQUIRES unity test_utils) \ No newline at end of file +set(srcdirs .) + +if(IDF_TARGET STREQUAL "esp32") + list(APPEND srcdirs esp32) +endif() + + +idf_component_register(SRC_DIRS ${src_dirs} + INCLUDE_DIRS . + REQUIRES unity test_utils + ) \ No newline at end of file diff --git a/components/freertos/test/component.mk b/components/freertos/test/component.mk index 5dd172bdb..b2b7d9048 100644 --- a/components/freertos/test/component.mk +++ b/components/freertos/test/component.mk @@ -2,4 +2,5 @@ #Component Makefile # +COMPONENT_SRCDIRS += esp32 COMPONENT_ADD_LDFLAGS = -Wl,--whole-archive -l$(COMPONENT_NAME) -Wl,--no-whole-archive diff --git a/components/freertos/test/test_freertos_task_delay_until.c b/components/freertos/test/esp32/test_freertos_task_delay_until.c similarity index 95% rename from components/freertos/test/test_freertos_task_delay_until.c rename to components/freertos/test/esp32/test_freertos_task_delay_until.c index c725bf22c..b4cc7d5d6 100644 --- a/components/freertos/test/test_freertos_task_delay_until.c +++ b/components/freertos/test/esp32/test_freertos_task_delay_until.c @@ -27,10 +27,6 @@ static SemaphoreHandle_t task_delete_semphr; -#if CONFIG_IDF_TARGET_ESP32S2BETA -#warning "Test not ported to esp32s2beta" -#else - static void delaying_task(void* arg) { uint64_t ref_prev, ref_current; @@ -76,5 +72,3 @@ TEST_CASE("Test vTaskDelayUntil", "[freertos]") vSemaphoreDelete(task_delete_semphr); ref_clock_deinit(); } - -#endif // CONFIG_IDF_TARGET_ESP32S2BETA diff --git a/components/heap/test/test_malloc.c b/components/heap/test/test_malloc.c index 42f73cfe7..cfc634bad 100644 --- a/components/heap/test/test_malloc.c +++ b/components/heap/test/test_malloc.c @@ -4,7 +4,6 @@ #include #include -#include "esp32/rom/ets_sys.h" #include "freertos/FreeRTOS.h" #include "freertos/task.h" diff --git a/components/newlib/test/test_time.c b/components/newlib/test/test_time.c index 92f1bf899..03e990ea8 100644 --- a/components/newlib/test/test_time.c +++ b/components/newlib/test/test_time.c @@ -9,7 +9,6 @@ #include "freertos/semphr.h" #include "sdkconfig.h" #include "soc/rtc.h" -#include "esp32/clk.h" #include "esp_system.h" #include "test_utils.h" diff --git a/components/sdmmc/test/CMakeLists.txt b/components/sdmmc/test/CMakeLists.txt index c7c2d52a9..43d6f24a5 100644 --- a/components/sdmmc/test/CMakeLists.txt +++ b/components/sdmmc/test/CMakeLists.txt @@ -1,3 +1,5 @@ -idf_component_register(SRC_DIRS "." - INCLUDE_DIRS "." - REQUIRES unity sdmmc) \ No newline at end of file +if(IDF_TARGET STREQUAL "esp32") + idf_component_register(SRC_DIRS "." + INCLUDE_DIRS "." + REQUIRES unity sdmmc) +endif() \ No newline at end of file diff --git a/components/sdmmc/test/test_sdio.c b/components/sdmmc/test/test_sdio.c index 0e5be1d6f..3622932dc 100644 --- a/components/sdmmc/test/test_sdio.c +++ b/components/sdmmc/test/test_sdio.c @@ -40,7 +40,6 @@ /* TODO: add SDIO slave header files, remove these definitions */ -#define DR_REG_SLC_BASE 0x3ff58000 #define DR_REG_SLC_MASK 0xfffffc00 #define SLCCONF1 (DR_REG_SLC_BASE + 0x60) @@ -52,7 +51,6 @@ #define SLC_SLC0_TXLINK_RESTART (BIT(30)) #define SLC_SLC0_TXLINK_START (BIT(29)) -#define DR_REG_SLCHOST_BASE 0x3ff55000 #define DR_REG_SLCHOST_MASK 0xfffffc00 #define SLCHOST_STATE_W0 (DR_REG_SLCHOST_BASE + 0x64) #define SLCHOST_CONF_W0 (DR_REG_SLCHOST_BASE + 0x6C) diff --git a/components/spi_flash/test/CMakeLists.txt b/components/spi_flash/test/CMakeLists.txt index ae23154f2..a9c011d31 100644 --- a/components/spi_flash/test/CMakeLists.txt +++ b/components/spi_flash/test/CMakeLists.txt @@ -1,3 +1,7 @@ -idf_component_register(SRC_DIRS "." +set(src_dirs ".") +if(IDF_TARGET STREQUAL "esp32") + list(APPEND src_dirs "esp32") +endif() +idf_component_register(SRC_DIRS ${src_dirs} INCLUDE_DIRS "." REQUIRES unity test_utils spi_flash bootloader_support app_update) \ No newline at end of file diff --git a/components/spi_flash/test/component.mk b/components/spi_flash/test/component.mk index 5dd172bdb..b2b7d9048 100644 --- a/components/spi_flash/test/component.mk +++ b/components/spi_flash/test/component.mk @@ -2,4 +2,5 @@ #Component Makefile # +COMPONENT_SRCDIRS += esp32 COMPONENT_ADD_LDFLAGS = -Wl,--whole-archive -l$(COMPONENT_NAME) -Wl,--no-whole-archive diff --git a/components/spi_flash/test/test_esp_flash.c b/components/spi_flash/test/esp32/test_esp_flash.c similarity index 100% rename from components/spi_flash/test/test_esp_flash.c rename to components/spi_flash/test/esp32/test_esp_flash.c diff --git a/components/ulp/test/CMakeLists.txt b/components/ulp/test/CMakeLists.txt index 27311f953..bbcb38f15 100644 --- a/components/ulp/test/CMakeLists.txt +++ b/components/ulp/test/CMakeLists.txt @@ -1,8 +1,10 @@ -idf_component_register(SRC_DIRS "." - INCLUDE_DIRS "." - REQUIRES unity ulp soc esp_common) +if(IDF_TARGET STREQUAL "esp32") + idf_component_register(SRC_DIRS esp32 + INCLUDE_DIRS . + REQUIRES unity ulp soc esp_common) -set(ulp_app_name ulp_test_app) -set(ulp_s_sources "ulp/test_jumps.S") -set(ulp_exp_dep_srcs "test_ulp_as.c") -ulp_embed_binary(${ulp_app_name} ${ulp_s_sources} ${ulp_exp_dep_srcs}) + set(ulp_app_name ulp_test_app) + set(ulp_s_sources "ulp/test_jumps_esp32.S") + set(ulp_exp_dep_srcs "esp32/test_ulp_as.c") + ulp_embed_binary(${ulp_app_name} ${ulp_s_sources} ${ulp_exp_dep_srcs}) +endif() diff --git a/components/ulp/test/component.mk b/components/ulp/test/component.mk index 84d7727d7..7cd2406de 100644 --- a/components/ulp/test/component.mk +++ b/components/ulp/test/component.mk @@ -1,11 +1,13 @@ ULP_APP_NAME = ulp_test_app +COMPONENT_SRCDIRS += esp32 + ULP_S_SOURCES = $(addprefix $(COMPONENT_PATH)/ulp/, \ - test_jumps.S \ + test_jumps_esp32.S \ ) -ULP_EXP_DEP_OBJECTS := test_ulp_as.o - +ULP_EXP_DEP_OBJECTS := esp32/test_ulp_as.o + include $(IDF_PATH)/components/ulp/component_ulp_common.mk COMPONENT_ADD_LDFLAGS += -Wl,--whole-archive -l$(COMPONENT_NAME) -Wl,--no-whole-archive diff --git a/components/ulp/test/test_ulp.c b/components/ulp/test/esp32/test_ulp.c similarity index 100% rename from components/ulp/test/test_ulp.c rename to components/ulp/test/esp32/test_ulp.c diff --git a/components/ulp/test/test_ulp_as.c b/components/ulp/test/esp32/test_ulp_as.c similarity index 100% rename from components/ulp/test/test_ulp_as.c rename to components/ulp/test/esp32/test_ulp_as.c diff --git a/components/ulp/test/ulp/test_jumps.S b/components/ulp/test/ulp/test_jumps_esp32.S similarity index 100% rename from components/ulp/test/ulp/test_jumps.S rename to components/ulp/test/ulp/test_jumps_esp32.S diff --git a/components/vfs/test/CMakeLists.txt b/components/vfs/test/CMakeLists.txt index f0a24edd9..2e15ead8d 100644 --- a/components/vfs/test/CMakeLists.txt +++ b/components/vfs/test/CMakeLists.txt @@ -1,4 +1,10 @@ -idf_component_register(SRC_DIRS "." - INCLUDE_DIRS "." - REQUIRES unity test_utils vfs fatfs spiffs - LDFRAGMENTS linker.lf) \ No newline at end of file +set(srcdirs ".") +if(IDF_TARGET STREQUAL "esp32") + list(APPEND srcdirs "esp32") +endif() + +idf_component_register(SRC_DIRS ${srcdirs} + INCLUDE_DIRS . + REQUIRES unity test_utils vfs fatfs spiffs + LDFRAGMENTS linker.lf + ) diff --git a/components/vfs/test/component.mk b/components/vfs/test/component.mk index 5650ced1e..5ad4f756e 100644 --- a/components/vfs/test/component.mk +++ b/components/vfs/test/component.mk @@ -1,3 +1,4 @@ COMPONENT_ADD_LDFLAGS = -Wl,--whole-archive -l$(COMPONENT_NAME) -Wl,--no-whole-archive +COMPONENT_SRCDIRS += esp32 COMPONENT_ADD_LDFRAGMENTS += linker.lf diff --git a/components/vfs/test/test_vfs_uart.c b/components/vfs/test/esp32/test_vfs_uart.c similarity index 100% rename from components/vfs/test/test_vfs_uart.c rename to components/vfs/test/esp32/test_vfs_uart.c diff --git a/components/wear_levelling/test/CMakeLists.txt b/components/wear_levelling/test/CMakeLists.txt index a81bf5a8e..684960dac 100644 --- a/components/wear_levelling/test/CMakeLists.txt +++ b/components/wear_levelling/test/CMakeLists.txt @@ -1,4 +1,11 @@ -idf_component_register(SRC_DIRS "." - INCLUDE_DIRS "." - REQUIRES unity test_utils wear_levelling - EMBED_FILES test_partition_v1.bin) \ No newline at end of file +set(srcdirs .) +if(IDF_TARGET STREQUAL "esp32") + list(APPEND srcdirs esp32) +endif() + + +idf_component_register(SRC_DIRS ${srcdirs} + INCLUDE_DIRS . + REQUIRES unity test_utils wear_levelling + EMBED_FILES test_partition_v1.bin + ) diff --git a/components/wear_levelling/test/component.mk b/components/wear_levelling/test/component.mk index 47bab9648..002a9f6b7 100644 --- a/components/wear_levelling/test/component.mk +++ b/components/wear_levelling/test/component.mk @@ -1,2 +1,3 @@ COMPONENT_ADD_LDFLAGS = -Wl,--whole-archive -l$(COMPONENT_NAME) -Wl,--no-whole-archive COMPONENT_EMBED_FILES := test_partition_v1.bin +COMPONENT_SRCDIRS += esp32 diff --git a/components/wear_levelling/test/esp32/test_wl.c b/components/wear_levelling/test/esp32/test_wl.c new file mode 100644 index 000000000..4ea0b3f2b --- /dev/null +++ b/components/wear_levelling/test/esp32/test_wl.c @@ -0,0 +1,88 @@ +#include +#include "unity.h" +#include "wear_levelling.h" +#include "test_utils.h" +#include "freertos/FreeRTOS.h" +#include "freertos/portable.h" +#include "freertos/task.h" +#include "freertos/semphr.h" +#include "soc/cpu.h" + +#include "esp32/clk.h" + + +#define TEST_SECTORS_COUNT 8 + +static void check_mem_data(wl_handle_t handle, uint32_t init_val, uint32_t* buff) +{ + size_t sector_size = wl_sector_size(handle); + + for (int m=0 ; m < TEST_SECTORS_COUNT ; m++) { + TEST_ESP_OK(wl_read(handle, sector_size * m, buff, sector_size)); + for (int i=0 ; i< sector_size/sizeof(uint32_t) ; i++) { + uint32_t compare_val = init_val + i + m*sector_size; + TEST_ASSERT_EQUAL( buff[i], compare_val); + } + } +} + + +// We write complete memory with defined data +// And then write one sector many times. +// A data in other secors should be the same. +// We do this also with unmount +TEST_CASE("multiple write is correct", "[wear_levelling]") +{ + const esp_partition_t *partition = get_test_data_partition(); + esp_partition_t fake_partition; + memcpy(&fake_partition, partition, sizeof(fake_partition)); + + fake_partition.size = SPI_FLASH_SEC_SIZE*(4 + TEST_SECTORS_COUNT); + + wl_handle_t handle; + TEST_ESP_OK(wl_mount(&fake_partition, &handle)); + + size_t sector_size = wl_sector_size(handle); + // Erase 8 sectors + TEST_ESP_OK(wl_erase_range(handle, 0, sector_size * TEST_SECTORS_COUNT)); + // Write data to all sectors + printf("Check 1 sector_size=0x%08x\n", sector_size); + // Set initial random value + uint32_t init_val = rand(); + + uint32_t* buff = (uint32_t*)malloc(sector_size); + for (int m=0 ; m < TEST_SECTORS_COUNT ; m++) { + for (int i=0 ; i< sector_size/sizeof(uint32_t) ; i++) { + buff[i] = init_val + i + m*sector_size; + } + TEST_ESP_OK(wl_erase_range(handle, sector_size*m, sector_size)); + TEST_ESP_OK(wl_write(handle, sector_size*m, buff, sector_size)); + } + + check_mem_data(handle, init_val, buff); + + uint32_t start; + RSR(CCOUNT, start); + + + for (int m=0 ; m< 100000 ; m++) { + uint32_t sector = m % TEST_SECTORS_COUNT; + for (int i=0 ; i< sector_size/sizeof(uint32_t) ; i++) { + buff[i] = init_val + i + sector*sector_size; + } + TEST_ESP_OK(wl_erase_range(handle, sector_size*sector, sector_size)); + TEST_ESP_OK(wl_write(handle, sector_size*sector, buff, sector_size)); + check_mem_data(handle, init_val, buff); + + uint32_t end; + RSR(CCOUNT, end); + uint32_t ms = (end - start) / (esp_clk_cpu_freq() / 1000); + printf("loop %4i pass, time= %ims\n", m, ms); + if (ms > 10000) { + break; + } + } + + free(buff); + wl_unmount(handle); +} \ No newline at end of file diff --git a/components/wear_levelling/test/test_wl.c b/components/wear_levelling/test/test_wl.c index 09ef23bfe..c0abe88ac 100644 --- a/components/wear_levelling/test/test_wl.c +++ b/components/wear_levelling/test/test_wl.c @@ -6,7 +6,6 @@ #include "freertos/portable.h" #include "freertos/task.h" #include "freertos/semphr.h" -#include "esp32/clk.h" #include "soc/cpu.h" TEST_CASE("wl_unmount doesn't leak memory", "[wear_levelling]") @@ -23,7 +22,7 @@ TEST_CASE("wl_unmount doesn't leak memory", "[wear_levelling]") // Original code: //TEST_ASSERT_EQUAL_HEX32(size_before, size_after); // Workaround for problem with heap size calculation: - ptrdiff_t stack_diff = size_before - size_after; + ptrdiff_t stack_diff = size_before - size_after; stack_diff = abs(stack_diff); if (stack_diff > 8) TEST_ASSERT_EQUAL(0, stack_diff); } @@ -49,7 +48,7 @@ TEST_CASE("wl_mount check partition parameters", "[wear_levelling][ignore]") // Original code: //TEST_ASSERT_EQUAL_HEX32(size_before, size_after); // Workaround for problem with heap size calculation: - ptrdiff_t stack_diff = size_before - size_after; + ptrdiff_t stack_diff = size_before - size_after; stack_diff = abs(stack_diff); if (stack_diff > 8) TEST_ASSERT_EQUAL(0, stack_diff); } @@ -65,7 +64,7 @@ TEST_CASE("wl_mount check partition parameters", "[wear_levelling][ignore]") // Original code: //TEST_ASSERT_EQUAL_HEX32(size_before, size_after); // Workaround for problem with heap size calculation: - ptrdiff_t stack_diff = size_before - size_after; + ptrdiff_t stack_diff = size_before - size_after; stack_diff = abs(stack_diff); if (stack_diff > 8) TEST_ASSERT_EQUAL(0, stack_diff); } @@ -177,81 +176,6 @@ TEST_CASE("multiple tasks can access wl handle simultaneously", "[wear_levelling wl_unmount(handle); } -#define TEST_SECTORS_COUNT 8 - -static void check_mem_data(wl_handle_t handle, uint32_t init_val, uint32_t* buff) -{ - size_t sector_size = wl_sector_size(handle); - - for (int m=0 ; m < TEST_SECTORS_COUNT ; m++) { - TEST_ESP_OK(wl_read(handle, sector_size * m, buff, sector_size)); - for (int i=0 ; i< sector_size/sizeof(uint32_t) ; i++) { - uint32_t compare_val = init_val + i + m*sector_size; - TEST_ASSERT_EQUAL( buff[i], compare_val); - } - } -} - - -// We write complete memory with defined data -// And then write one sector many times. -// A data in other secors should be the same. -// We do this also with unmount -TEST_CASE("multiple write is correct", "[wear_levelling]") -{ - const esp_partition_t *partition = get_test_data_partition(); - esp_partition_t fake_partition; - memcpy(&fake_partition, partition, sizeof(fake_partition)); - - fake_partition.size = SPI_FLASH_SEC_SIZE*(4 + TEST_SECTORS_COUNT); - - wl_handle_t handle; - TEST_ESP_OK(wl_mount(&fake_partition, &handle)); - - size_t sector_size = wl_sector_size(handle); - // Erase 8 sectors - TEST_ESP_OK(wl_erase_range(handle, 0, sector_size * TEST_SECTORS_COUNT)); - // Write data to all sectors - printf("Check 1 sector_size=0x%08x\n", sector_size); - // Set initial random value - uint32_t init_val = rand(); - - uint32_t* buff = (uint32_t*)malloc(sector_size); - for (int m=0 ; m < TEST_SECTORS_COUNT ; m++) { - for (int i=0 ; i< sector_size/sizeof(uint32_t) ; i++) { - buff[i] = init_val + i + m*sector_size; - } - TEST_ESP_OK(wl_erase_range(handle, sector_size*m, sector_size)); - TEST_ESP_OK(wl_write(handle, sector_size*m, buff, sector_size)); - } - - check_mem_data(handle, init_val, buff); - - uint32_t start; - RSR(CCOUNT, start); - - - for (int m=0 ; m< 100000 ; m++) { - uint32_t sector = m % TEST_SECTORS_COUNT; - for (int i=0 ; i< sector_size/sizeof(uint32_t) ; i++) { - buff[i] = init_val + i + sector*sector_size; - } - TEST_ESP_OK(wl_erase_range(handle, sector_size*sector, sector_size)); - TEST_ESP_OK(wl_write(handle, sector_size*sector, buff, sector_size)); - check_mem_data(handle, init_val, buff); - - uint32_t end; - RSR(CCOUNT, end); - uint32_t ms = (end - start) / (esp_clk_cpu_freq() / 1000); - printf("loop %4i pass, time= %ims\n", m, ms); - if (ms > 10000) { - break; - } - } - - free(buff); - wl_unmount(handle); -} extern const uint8_t test_partition_v1_bin_start[] asm("_binary_test_partition_v1_bin_start"); extern const uint8_t test_partition_v1_bin_end[] asm("_binary_test_partition_v1_bin_end"); @@ -259,7 +183,7 @@ extern const uint8_t test_partition_v1_bin_end[] asm("_binary_test_partition_v #define COMPARE_START_CONST 0x12340000 // We write to partition prepared image with V1 -// Then we convert image to new version and verifying the data +// Then we convert image to new version and verifying the data TEST_CASE("Version update test", "[wear_levelling]") { @@ -269,7 +193,7 @@ TEST_CASE("Version update test", "[wear_levelling]") if (partition->encrypted) { - printf("Update from V1 to V2 will not work.\n"); + printf("Update from V1 to V2 will not work.\n"); return; } fake_partition.size = (size_t)(test_partition_v1_bin_end - test_partition_v1_bin_start); diff --git a/examples/peripherals/spi_master/main/CMakeLists.txt b/examples/peripherals/spi_master/main/CMakeLists.txt index 36f8332d0..d0f93ab57 100644 --- a/examples/peripherals/spi_master/main/CMakeLists.txt +++ b/examples/peripherals/spi_master/main/CMakeLists.txt @@ -3,7 +3,7 @@ set(srcs "pretty_effect.c" ) # Only ESP32 has enough memory to do jpeg decoding -if (CONFIG_IDF_TARGET_ESP32) +if(IDF_TARGET STREQUAL "esp32") list(APPEND srcs "decode_image.c") endif()