diff --git a/components/esp32/include/soc/dport_reg.h b/components/esp32/include/soc/dport_reg.h
index ef231e316..131d0d8ab 100644
--- a/components/esp32/include/soc/dport_reg.h
+++ b/components/esp32/include/soc/dport_reg.h
@@ -1038,8 +1038,8 @@
 #define DPORT_CORE_RST_EN_REG          (DR_REG_DPORT_BASE + 0x0D0)
 /* DPORT_CORE_RST : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
 /*description: */
-#define DPROT_RW_BTLP_RST (BIT(10))
-#define DPROT_RW_BTMAC_RST (BIT(9))
+#define DPORT_RW_BTLP_RST (BIT(10))
+#define DPORT_RW_BTMAC_RST (BIT(9))
 #define DPORT_MACPWR_RST (BIT(8))
 #define DPORT_EMAC_RST (BIT(7))
 #define DPORT_SDIO_HOST_RST (BIT(6))
diff --git a/components/esp32/system_api.c b/components/esp32/system_api.c
index d984af78a..60e3d8598 100644
--- a/components/esp32/system_api.c
+++ b/components/esp32/system_api.c
@@ -132,7 +132,7 @@ void IRAM_ATTR esp_restart_noos()
          DPORT_BB_RST | DPORT_FE_RST | DPORT_MAC_RST |
          DPORT_BT_RST | DPORT_BTMAC_RST | DPORT_SDIO_RST |
          DPORT_SDIO_HOST_RST | DPORT_EMAC_RST | DPORT_MACPWR_RST | 
-         DPROT_RW_BTMAC_RST | DPROT_RW_BTLP_RST);
+         DPORT_RW_BTMAC_RST | DPORT_RW_BTLP_RST);
     REG_WRITE(DPORT_CORE_RST_EN_REG, 0);
 
     // Reset timer/spi/uart