Merge branch 'gdb/bt_on_invalid_pc' into 'master'

gdb: Modify PC in case of invalid PC

See merge request espressif/esp-idf!8391
This commit is contained in:
Ivan Grokhotkov 2020-05-19 16:44:07 +08:00
commit 948580d1a2
6 changed files with 31 additions and 6 deletions

View file

@ -142,6 +142,7 @@ SECTIONS
. = 0x3C0;
KEEP(*(.DoubleExceptionVector.text));
. = 0x400;
_invalid_pc_placeholder = ABSOLUTE(.);
*(.*Vector.literal)
*(.UserEnter.literal);

View file

@ -142,6 +142,7 @@ SECTIONS
. = 0x3C0;
KEEP(*(.DoubleExceptionVector.text));
. = 0x400;
_invalid_pc_placeholder = ABSOLUTE(.);
*(.*Vector.literal)
*(.UserEnter.literal);

View file

@ -24,6 +24,8 @@
#warning "gdbstub_xtensa: revisit the implementation for Call0 ABI"
#endif
extern int _invalid_pc_placeholder;
static void init_regfile(esp_gdbstub_gdb_regfile_t *dst)
{
memset(dst, 0, sizeof(*dst));
@ -32,7 +34,7 @@ static void init_regfile(esp_gdbstub_gdb_regfile_t *dst)
static void update_regfile_common(esp_gdbstub_gdb_regfile_t *dst)
{
if (dst->a[0] & 0x8000000U) {
dst->a[0] = (dst->a[0] & 0x3fffffffU) | 0x40000000U;
dst->a[0] = (uint32_t)cpu_ll_pc_to_ptr(dst->a[0]);
}
if (!esp_stack_ptr_is_sane(dst->a[1])) {
dst->a[1] = 0xDEADBEEF;
@ -47,7 +49,15 @@ void esp_gdbstub_frame_to_regfile(const esp_gdbstub_frame_t *frame, esp_gdbstub_
{
init_regfile(dst);
const uint32_t *a_regs = (const uint32_t *) &frame->a0;
dst->pc = (frame->pc & 0x3fffffffU) | 0x40000000U;
if (!(esp_ptr_executable(cpu_ll_pc_to_ptr(frame->pc)) && (frame->pc & 0xC0000000U))) {
/* Xtensa ABI sets the 2 MSBs of the PC according to the windowed call size
* Incase the PC is invalid, GDB will fail to translate addresses to function names
* Hence replacing the PC to a placeholder address in case of invalid PC
*/
dst->pc = (uint32_t)&_invalid_pc_placeholder;
} else {
dst->pc = (uint32_t)cpu_ll_pc_to_ptr(frame->pc);
}
for (int i = 0; i < 16; i++) {
dst->a[i] = a_regs[i];
@ -73,7 +83,11 @@ static void solicited_frame_to_regfile(const XtSolFrame *frame, esp_gdbstub_gdb_
{
init_regfile(dst);
const uint32_t *a_regs = (const uint32_t *) &frame->a0;
dst->pc = (frame->pc & 0x3fffffffU) | 0x40000000U;
if (!(esp_ptr_executable(cpu_ll_pc_to_ptr(frame->pc)) && (frame->pc & 0xC0000000U))) {
dst->pc = (uint32_t)&_invalid_pc_placeholder;
} else {
dst->pc = (uint32_t)cpu_ll_pc_to_ptr(frame->pc);
}
/* only 4 registers saved in the solicited frame */
for (int i = 0; i < 4; i++) {

View file

@ -51,7 +51,9 @@
#include "panic_internal.h"
extern void esp_panic_handler(panic_info_t *);
extern int _invalid_pc_placeholder;
extern void esp_panic_handler(panic_info_t*);
static wdt_hal_context_t wdt0_context = {.inst = WDT_MWDT0, .mwdt_dev = &TIMERG0};
@ -512,6 +514,13 @@ static void panic_handler(XtExcFrame *frame, bool pseudo_excause)
#endif
if (esp_cpu_in_ocd_debug_mode()) {
if (!(esp_ptr_executable(cpu_ll_pc_to_ptr(frame->pc)) && (frame->pc & 0xC0000000U))) {
/* Xtensa ABI sets the 2 MSBs of the PC according to the windowed call size
* Incase the PC is invalid, GDB will fail to translate addresses to function names
* Hence replacing the PC to a placeholder address in case of invalid PC
*/
frame->pc = (uint32_t)&_invalid_pc_placeholder;
}
if (frame->exccause == PANIC_RSN_INTWDT_CPU0 ||
frame->exccause == PANIC_RSN_INTWDT_CPU1) {
wdt_hal_write_protect_disable(&wdt0_context);

View file

@ -103,7 +103,7 @@ static inline uint32_t cpu_ll_ptr_to_pc(const void* addr)
static inline void* cpu_ll_pc_to_ptr(uint32_t pc)
{
return (void*) ((pc & 0x3fffffff) | 0x40000000);
return (void*) ((pc & 0x3fffffffU) | 0x40000000U);
}
static inline void cpu_ll_set_watchpoint(int id,

View file

@ -97,7 +97,7 @@ static inline uint32_t cpu_ll_ptr_to_pc(const void* addr)
static inline void* cpu_ll_pc_to_ptr(uint32_t pc)
{
return (void*) ((pc & 0x3fffffff) | 0x40000000);
return (void*) ((pc & 0x3fffffffU) | 0x40000000U);
}
static inline void cpu_ll_set_watchpoint(int id,