Merge branch 'bugfix/fix_random_failure_with_ota_updates_v3.1' into 'release/v3.1'
app_update: fix intermittent failure with firmware updates (backport v3.1) See merge request idf/esp-idf!3419
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commit
93f04b87b2
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@ -292,7 +292,7 @@ static esp_err_t esp_rewrite_ota_data(esp_partition_subtype_t subtype)
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uint16_t ota_app_count = 0;
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uint32_t i = 0;
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uint32_t seq;
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static spi_flash_mmap_memory_t ota_data_map;
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spi_flash_mmap_handle_t ota_data_map;
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const void *result = NULL;
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find_partition = esp_partition_find_first(ESP_PARTITION_TYPE_DATA, ESP_PARTITION_SUBTYPE_DATA_OTA, NULL);
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@ -438,7 +438,7 @@ const esp_partition_t *esp_ota_get_boot_partition(void)
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{
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esp_err_t ret;
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const esp_partition_t *find_partition = NULL;
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static spi_flash_mmap_memory_t ota_data_map;
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spi_flash_mmap_handle_t ota_data_map;
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const void *result = NULL;
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uint16_t ota_app_count = 0;
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find_partition = esp_partition_find_first(ESP_PARTITION_TYPE_DATA, ESP_PARTITION_SUBTYPE_DATA_OTA, NULL);
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@ -494,9 +494,18 @@ const esp_partition_t *esp_ota_get_boot_partition(void)
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const esp_partition_t* esp_ota_get_running_partition(void)
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{
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static const esp_partition_t *curr_partition = NULL;
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/*
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* Currently running partition is unlikely to change across reset cycle,
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* so it can be cached here, and avoid lookup on every flash write operation.
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*/
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if (curr_partition != NULL) {
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return curr_partition;
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}
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/* Find the flash address of this exact function. By definition that is part
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of the currently running firmware. Then find the enclosing partition. */
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size_t phys_offs = spi_flash_cache2phys(esp_ota_get_running_partition);
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assert (phys_offs != SPI_FLASH_CACHE2PHYS_FAIL); /* indicates cache2phys lookup is buggy */
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@ -510,6 +519,7 @@ const esp_partition_t* esp_ota_get_running_partition(void)
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const esp_partition_t *p = esp_partition_get(it);
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if (p->address <= phys_offs && p->address + p->size > phys_offs) {
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esp_partition_iterator_release(it);
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curr_partition = p;
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return p;
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}
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it = esp_partition_next(it);
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@ -55,4 +55,7 @@
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// after restart or during a deep sleep / wake cycle.
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#define RTC_NOINIT_ATTR __attribute__((section(".rtc_noinit")))
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// Forces to not inline function
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#define NOINLINE_ATTR __attribute__((noinline))
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#endif /* __ESP_ATTR_H__ */
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@ -286,23 +286,41 @@ void IRAM_ATTR spi_flash_munmap(spi_flash_mmap_handle_t handle)
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free(it);
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}
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static void IRAM_ATTR NOINLINE_ATTR spi_flash_protected_mmap_init()
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{
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spi_flash_disable_interrupts_caches_and_other_cpu();
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spi_flash_mmap_init();
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spi_flash_enable_interrupts_caches_and_other_cpu();
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}
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static uint32_t IRAM_ATTR NOINLINE_ATTR spi_flash_protected_read_mmu_entry(int index)
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{
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uint32_t value;
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spi_flash_disable_interrupts_caches_and_other_cpu();
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value = DPORT_REG_READ((uint32_t)&DPORT_PRO_FLASH_MMU_TABLE[index]);
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spi_flash_enable_interrupts_caches_and_other_cpu();
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return value;
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}
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void spi_flash_mmap_dump()
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{
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spi_flash_mmap_init();
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spi_flash_protected_mmap_init();
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mmap_entry_t* it;
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for (it = LIST_FIRST(&s_mmap_entries_head); it != NULL; it = LIST_NEXT(it, entries)) {
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printf("handle=%d page=%d count=%d\n", it->handle, it->page, it->count);
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}
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for (int i = 0; i < REGIONS_COUNT * PAGES_PER_REGION; ++i) {
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if (s_mmap_page_refcnt[i] != 0) {
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printf("page %d: refcnt=%d paddr=%d\n",
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i, (int) s_mmap_page_refcnt[i], DPORT_REG_READ((uint32_t)&DPORT_PRO_FLASH_MMU_TABLE[i]));
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uint32_t paddr = spi_flash_protected_read_mmu_entry(i);
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printf("page %d: refcnt=%d paddr=%d\n", i, (int) s_mmap_page_refcnt[i], paddr);
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}
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}
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}
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uint32_t spi_flash_mmap_get_free_pages(spi_flash_mmap_memory_t memory)
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uint32_t IRAM_ATTR spi_flash_mmap_get_free_pages(spi_flash_mmap_memory_t memory)
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{
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spi_flash_disable_interrupts_caches_and_other_cpu();
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spi_flash_mmap_init();
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int count = 0;
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int region_begin; // first page to check
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@ -315,7 +333,8 @@ uint32_t spi_flash_mmap_get_free_pages(spi_flash_mmap_memory_t memory)
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count++;
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}
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}
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DPORT_INTERRUPT_RESTORE();
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DPORT_INTERRUPT_RESTORE();
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spi_flash_enable_interrupts_caches_and_other_cpu();
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return count;
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}
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@ -384,7 +403,6 @@ static inline IRAM_ATTR bool update_written_pages(size_t start_addr, size_t leng
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return false;
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}
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uint32_t spi_flash_cache2phys(const void *cached)
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{
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intptr_t c = (intptr_t)cached;
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@ -405,7 +423,7 @@ uint32_t spi_flash_cache2phys(const void *cached)
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/* cached address was not in IROM or DROM */
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return SPI_FLASH_CACHE2PHYS_FAIL;
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}
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uint32_t phys_page = DPORT_REG_READ((uint32_t)&DPORT_PRO_FLASH_MMU_TABLE[cache_page]);
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uint32_t phys_page = spi_flash_protected_read_mmu_entry(cache_page);
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if (phys_page == INVALID_ENTRY_VAL) {
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/* page is not mapped */
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return SPI_FLASH_CACHE2PHYS_FAIL;
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@ -414,8 +432,7 @@ uint32_t spi_flash_cache2phys(const void *cached)
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return phys_offs | (c & (SPI_FLASH_MMU_PAGE_SIZE-1));
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}
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const void *spi_flash_phys2cache(uint32_t phys_offs, spi_flash_mmap_memory_t memory)
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const void *IRAM_ATTR spi_flash_phys2cache(uint32_t phys_offs, spi_flash_mmap_memory_t memory)
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{
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uint32_t phys_page = phys_offs / SPI_FLASH_MMU_PAGE_SIZE;
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int start, end, page_delta;
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@ -432,15 +449,18 @@ const void *spi_flash_phys2cache(uint32_t phys_offs, spi_flash_mmap_memory_t mem
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base = VADDR1_START_ADDR;
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page_delta = 64;
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}
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spi_flash_disable_interrupts_caches_and_other_cpu();
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DPORT_INTERRUPT_DISABLE();
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for (int i = start; i < end; i++) {
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if (DPORT_SEQUENCE_REG_READ((uint32_t)&DPORT_PRO_FLASH_MMU_TABLE[i]) == phys_page) {
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i -= page_delta;
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intptr_t cache_page = base + (SPI_FLASH_MMU_PAGE_SIZE * i);
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DPORT_INTERRUPT_RESTORE();
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spi_flash_enable_interrupts_caches_and_other_cpu();
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return (const void *) (cache_page | (phys_offs & (SPI_FLASH_MMU_PAGE_SIZE-1)));
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}
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}
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DPORT_INTERRUPT_RESTORE();
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spi_flash_enable_interrupts_caches_and_other_cpu();
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return NULL;
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}
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@ -244,15 +244,13 @@ void spi_flash_mmap_dump();
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/**
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* @brief get free pages number which can be mmap
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*
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* This function will return free page number of the mmu table which can mmap,
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* when you want to call spi_flash_mmap to mmap an ranger of flash data to Dcache or Icache
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* memmory region, maybe the size of MMU table will exceed,so if you are not sure the
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* size need mmap is ok, can call the interface and watch how many MMU table page can be
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* mmaped.
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* This function will return number of free pages available in mmu table. This could be useful
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* before calling actual spi_flash_mmap (maps flash range to DCache or ICache memory) to check
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* if there is sufficient space available for mapping.
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*
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* @param memory memmory type of MMU table free page
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* @param memory memory type of MMU table free page
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*
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* @return number of free pages which can be mmaped
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* @return number of free pages which can be mmaped
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*/
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uint32_t spi_flash_mmap_get_free_pages(spi_flash_mmap_memory_t memory);
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