Crash_Override/OVMS3-idf
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driver: fix gpio pin_bit_mask truncation in sdspi_host and others

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Closes https://github.com/espressif/esp-idf/issues/4348
This commit is contained in:
Ivan Grokhotkov 2019-11-18 13:42:22 +01:00
parent 50073a7e61
commit 8ffb38265c
5 changed files with 13 additions and 13 deletions
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2
components/driver/sdmmc_host.c
View file

@ -343,7 +343,7 @@ esp_err_t sdmmc_host_init_slot(int slot, const sdmmc_slot_config_t* slot_config)
// Force D3 high to make slave enter SD mode. // Force D3 high to make slave enter SD mode.
// Connect to peripheral after width configuration. // Connect to peripheral after width configuration.
gpio_config_t gpio_conf = { gpio_config_t gpio_conf = {
.pin_bit_mask = BIT(pslot->d3_gpio), .pin_bit_mask = BIT64(pslot->d3_gpio),
.mode = GPIO_MODE_OUTPUT , .mode = GPIO_MODE_OUTPUT ,
.pull_up_en = 0, .pull_up_en = 0,
.pull_down_en = 0, .pull_down_en = 0,

8
components/driver/sdspi_host.c
View file

@ -315,7 +315,7 @@ esp_err_t sdspi_host_init_slot(int slot, const sdspi_slot_config_t* slot_config)
gpio_config_t io_conf = { gpio_config_t io_conf = {
.intr_type = GPIO_PIN_INTR_DISABLE, .intr_type = GPIO_PIN_INTR_DISABLE,
.mode = GPIO_MODE_OUTPUT, .mode = GPIO_MODE_OUTPUT,
.pin_bit_mask = 1LL << slot_config->gpio_cs, .pin_bit_mask = 1ULL << slot_config->gpio_cs,
}; };
ret = gpio_config(&io_conf); ret = gpio_config(&io_conf);
@ -333,14 +333,14 @@ esp_err_t sdspi_host_init_slot(int slot, const sdspi_slot_config_t* slot_config)
.pull_up_en = true .pull_up_en = true
}; };
if (slot_config->gpio_cd != SDSPI_SLOT_NO_CD) { if (slot_config->gpio_cd != SDSPI_SLOT_NO_CD) {
io_conf.pin_bit_mask |= (1 << slot_config->gpio_cd); io_conf.pin_bit_mask |= (1ULL << slot_config->gpio_cd);
s_slots[slot].gpio_cd = slot_config->gpio_cd; s_slots[slot].gpio_cd = slot_config->gpio_cd;
} else { } else {
s_slots[slot].gpio_cd = GPIO_UNUSED; s_slots[slot].gpio_cd = GPIO_UNUSED;
} }
if (slot_config->gpio_wp != SDSPI_SLOT_NO_WP) { if (slot_config->gpio_wp != SDSPI_SLOT_NO_WP) {
io_conf.pin_bit_mask |= (1 << slot_config->gpio_wp); io_conf.pin_bit_mask |= (1ULL << slot_config->gpio_wp);
s_slots[slot].gpio_wp = slot_config->gpio_wp; s_slots[slot].gpio_wp = slot_config->gpio_wp;
} else { } else {
s_slots[slot].gpio_wp = GPIO_UNUSED; s_slots[slot].gpio_wp = GPIO_UNUSED;
@ -360,7 +360,7 @@ esp_err_t sdspi_host_init_slot(int slot, const sdspi_slot_config_t* slot_config)
.intr_type = GPIO_INTR_LOW_LEVEL, .intr_type = GPIO_INTR_LOW_LEVEL,
.mode = GPIO_MODE_INPUT, .mode = GPIO_MODE_INPUT,
.pull_up_en = true, .pull_up_en = true,
.pin_bit_mask = (1 << slot_config->gpio_int), .pin_bit_mask = (1ULL << slot_config->gpio_int),
}; };
ret = gpio_config(&io_conf); ret = gpio_config(&io_conf);
if (ret != ESP_OK) { if (ret != ESP_OK) {

10
components/driver/test/test_pwm.c
View file

@ -271,7 +271,7 @@ static void cycle_fault_test(mcpwm_unit_t unit, mcpwm_io_signals_t mcpwm_a, mcpw
gpio_config_t gp; gpio_config_t gp;
gp.intr_type = GPIO_INTR_DISABLE; gp.intr_type = GPIO_INTR_DISABLE;
gp.mode = GPIO_MODE_OUTPUT; gp.mode = GPIO_MODE_OUTPUT;
gp.pin_bit_mask = (1 << FAULT_SIG_NUM); gp.pin_bit_mask = (1ULL << FAULT_SIG_NUM);
gpio_config(&gp); // gpio configure should be more previous than mcpwm configuration gpio_config(&gp); // gpio configure should be more previous than mcpwm configuration
gpio_set_level(FAULT_SIG_NUM, !input_sig); gpio_set_level(FAULT_SIG_NUM, !input_sig);
@ -300,7 +300,7 @@ static void oneshot_fault_test(mcpwm_unit_t unit, mcpwm_io_signals_t mcpwm_a, mc
gpio_config_t gp; gpio_config_t gp;
gp.intr_type = GPIO_INTR_DISABLE; gp.intr_type = GPIO_INTR_DISABLE;
gp.mode = GPIO_MODE_OUTPUT; gp.mode = GPIO_MODE_OUTPUT;
gp.pin_bit_mask = (1 << FAULT_SIG_NUM); gp.pin_bit_mask = (1ULL << FAULT_SIG_NUM);
gpio_config(&gp); // gpio configure should be more previous than mcpwm configuration gpio_config(&gp); // gpio configure should be more previous than mcpwm configuration
gpio_set_level(FAULT_SIG_NUM, !input_sig); gpio_set_level(FAULT_SIG_NUM, !input_sig);
@ -328,7 +328,7 @@ static void sync_test(mcpwm_unit_t unit, mcpwm_io_signals_t mcpwm_a, mcpwm_io_si
gpio_config_t gp; gpio_config_t gp;
gp.intr_type = GPIO_INTR_DISABLE; gp.intr_type = GPIO_INTR_DISABLE;
gp.mode = GPIO_MODE_OUTPUT; gp.mode = GPIO_MODE_OUTPUT;
gp.pin_bit_mask = (1 << SYN_SIG_NUM); gp.pin_bit_mask = (1ULL << SYN_SIG_NUM);
gpio_config(&gp); gpio_config(&gp);
gpio_set_level(SYN_SIG_NUM, 0); gpio_set_level(SYN_SIG_NUM, 0);
@ -426,10 +426,10 @@ static void gpio_test_signal(void *arg)
{ {
printf("intializing test signal...\n"); printf("intializing test signal...\n");
gpio_config_t gp; gpio_config_t gp = {};
gp.intr_type = GPIO_INTR_DISABLE; gp.intr_type = GPIO_INTR_DISABLE;
gp.mode = GPIO_MODE_OUTPUT; gp.mode = GPIO_MODE_OUTPUT;
gp.pin_bit_mask = 1<<CAP_SIG_NUM; gp.pin_bit_mask = 1ULL << CAP_SIG_NUM;
gpio_config(&gp); gpio_config(&gp);
for (int i=0; i<1000; i++) { for (int i=0; i<1000; i++) {
//here the period of test signal is 20ms //here the period of test signal is 20ms

2
components/sdmmc/test/test_sdio.c
View file

@ -131,7 +131,7 @@ static void reset_slave()
const int pin_en = 18; const int pin_en = 18;
const int pin_io0 = 19; const int pin_io0 = 19;
gpio_config_t gpio_cfg = { gpio_config_t gpio_cfg = {
.pin_bit_mask = BIT(pin_en) | BIT(pin_io0), .pin_bit_mask = BIT64(pin_en) | BIT64(pin_io0),
.mode = GPIO_MODE_OUTPUT_OD, .mode = GPIO_MODE_OUTPUT_OD,
}; };
TEST_ESP_OK(gpio_config(&gpio_cfg)); TEST_ESP_OK(gpio_config(&gpio_cfg));

4
examples/peripherals/sdio/host/main/app_main.c
View file

@ -126,7 +126,7 @@ esp_err_t slave_reset(esp_slave_context_t *context)
static void gpio_d2_set_high() static void gpio_d2_set_high()
{ {
gpio_config_t d2_config = { gpio_config_t d2_config = {
.pin_bit_mask = BIT(SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D2), .pin_bit_mask = BIT64(SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D2),
.mode = GPIO_MODE_OUTPUT, .mode = GPIO_MODE_OUTPUT,
.pull_up_en = true, .pull_up_en = true,
}; };
@ -267,7 +267,7 @@ void slave_power_on()
level_active = 1; level_active = 1;
#endif #endif
gpio_config_t cfg = { gpio_config_t cfg = {
.pin_bit_mask = BIT(GPIO_B1) | BIT(GPIO_B2) | BIT(GPIO_B3), .pin_bit_mask = BIT64(GPIO_B1) | BIT64(GPIO_B2) | BIT64(GPIO_B3),
.mode = GPIO_MODE_DEF_OUTPUT, .mode = GPIO_MODE_DEF_OUTPUT,
.pull_up_en = false, .pull_up_en = false,
.pull_down_en = false, .pull_down_en = false,