efuse: set timing configuration before writing
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1 changed files with 20 additions and 0 deletions
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@ -15,6 +15,7 @@
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#include "esp_efuse_utility.h"
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#include "esp_efuse_utility.h"
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#include "soc/efuse_periph.h"
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#include "soc/efuse_periph.h"
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#include "esp32/clk.h"
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#include "esp_log.h"
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#include "esp_log.h"
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#include "assert.h"
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#include "assert.h"
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#include "sdkconfig.h"
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#include "sdkconfig.h"
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@ -209,6 +210,25 @@ void esp_efuse_utility_burn_efuses(void)
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}
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}
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}
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}
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#else
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#else
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// Update Efuse timing configuration
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uint32_t apb_freq_mhz = esp_clk_apb_freq() / 1000000;
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uint32_t clk_sel0, clk_sel1, dac_clk_div;
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if (apb_freq_mhz <= 26) {
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clk_sel0 = 250;
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clk_sel1 = 255;
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dac_clk_div = 52;
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} else if (apb_freq_mhz <= 40) {
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clk_sel0 = 160;
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clk_sel1 = 255;
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dac_clk_div = 80;
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} else {
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clk_sel0 = 80;
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clk_sel1 = 128;
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dac_clk_div = 100;
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}
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REG_SET_FIELD(EFUSE_DAC_CONF_REG, EFUSE_DAC_CLK_DIV, dac_clk_div);
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REG_SET_FIELD(EFUSE_CLK_REG, EFUSE_CLK_SEL0, clk_sel0);
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REG_SET_FIELD(EFUSE_CLK_REG, EFUSE_CLK_SEL1, clk_sel1);
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// Permanently update values written to the efuse write registers
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// Permanently update values written to the efuse write registers
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REG_WRITE(EFUSE_CONF_REG, EFUSE_CONF_WRITE);
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REG_WRITE(EFUSE_CONF_REG, EFUSE_CONF_WRITE);
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REG_WRITE(EFUSE_CMD_REG, EFUSE_CMD_PGM);
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REG_WRITE(EFUSE_CMD_REG, EFUSE_CMD_PGM);
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