Merge branch 'bugfix/dualcore_startup' into 'master'
Fix dualcore startup This MR includes: - a workaround for a hardware bug with cache initialization - fix of `#if CONFIG_WIFI_ENABLED` block in cpu_start.c for the case when WiFi is disabled. - removal of miscellaneous delays in cpu_start.c See merge request !22
This commit is contained in:
Ivan Grokhotkov
commit
842bc53549
2 changed files with 39 additions and 52 deletions
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@ -99,13 +99,18 @@ void IRAM_ATTR call_start_cpu0()
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Cache_Flush(0);
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Cache_Flush(1);
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mmu_init(0);
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REG_SET_BIT(APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MMU_IA_CLR);
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mmu_init(1);
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REG_CLR_BIT(APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MMU_IA_CLR);
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/* (above steps probably unnecessary for most serial bootloader
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usage, all that's absolutely needed is that we unmask DROM0
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cache on the following two lines - normal ROM boot exits with
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DROM0 cache unmasked, but serial bootloader exits with it
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masked. However can't hurt to be thorough and reset
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everything.)
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The lines which manipulate DPORT_APP_CACHE_MMU_IA_CLR bit are
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necessary to work around a hardware bug.
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*/
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REG_CLR_BIT(PRO_CACHE_CTRL1_REG, DPORT_PRO_CACHE_MASK_DROM0);
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REG_CLR_BIT(APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MASK_DROM0);
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@ -64,6 +64,8 @@ void uartAttach();
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void ets_set_appcpu_boot_addr(uint32_t ent);
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int ets_getAppEntry();
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static bool app_cpu_started = false;
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void IRAM_ATTR call_user_start_cpu0() {
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//Kill wdt
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REG_CLR_BIT(0x3ff4808c, BIT(10)); //RTCCNTL+8C RTC_WDTCONFIG0 RTC_
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@ -114,53 +116,34 @@ void IRAM_ATTR call_user_start_cpu0() {
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heap_alloc_caps_init();
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ets_printf("Pro cpu up.\n");
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#ifndef CONFIG_FREERTOS_UNICORE
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ets_printf("Running app cpu, entry point is %p\n", call_user_start_cpu1);
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ets_delay_us(60000);
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ets_printf("Starting app cpu, entry point is %p\n", call_user_start_cpu1);
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SET_PERI_REG_MASK(APPCPU_CTRL_REG_B, DPORT_APPCPU_CLKGATE_EN);
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CLEAR_PERI_REG_MASK(APPCPU_CTRL_REG_C, DPORT_APPCPU_RUNSTALL);
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SET_PERI_REG_MASK(APPCPU_CTRL_REG_A, DPORT_APPCPU_RESETTING);
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CLEAR_PERI_REG_MASK(APPCPU_CTRL_REG_A, DPORT_APPCPU_RESETTING);
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for (int i=0; i<20; i++) ets_delay_us(40000);
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ets_set_appcpu_boot_addr((uint32_t)call_user_start_cpu1);
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ets_delay_us(10000);
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// while (ets_getAppEntry()==(int)call_user_start_cpu1) ;
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//Because of Reasons (tm), the pro cpu cannot use the SPI flash while the app cpu is booting.
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// while(((READ_PERI_REG(RTC_STORE7))&BIT(31)) == 0) ; // check APP boot complete flag
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ets_delay_us(50000);
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ets_delay_us(50000);
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ets_printf("\n\nBack to pro cpu.\n");
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while (!app_cpu_started) {
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ets_delay_us(100);
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}
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#else
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CLEAR_PERI_REG_MASK(APPCPU_CTRL_REG_B, DPORT_APPCPU_CLKGATE_EN);
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#endif
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ets_printf("Pro cpu start user code\n");
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user_start_cpu0();
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}
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extern int xPortGetCoreID();
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extern int _init_start;
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/*
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We arrive here because the pro CPU pulled us from reset. IRAM is in place, cache is still disabled, we can execute C code.
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*/
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void IRAM_ATTR call_user_start_cpu1() {
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//We need to do this ASAP because otherwise the structure to catch the SYSCALL instruction, which
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//we abuse to do ROM calls, won't work.
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asm volatile (\
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"wsr %0, vecbase\n" \
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::"r"(&_init_start));
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//Enable SPI flash
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// PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA3_U, FUNC_SD_DATA3_SPIWP); // swap PIN SDDATA3 from uart1 to spi, because cache need spi
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ets_printf("App cpu up\n");
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//Make page 0 access raise an exception
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//Also some other unused pages so we can catch weirdness
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//ToDo: this but nicer.
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@ -192,16 +175,15 @@ void IRAM_ATTR call_user_start_cpu1() {
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"isync\n" \
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:::"a4","a5");
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ets_printf("App cpu up.\n");
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app_cpu_started = 1;
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user_start_cpu1();
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}
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extern volatile int port_xSchedulerRunning;
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extern int xPortStartScheduler();
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void user_start_cpu1(void) {
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ets_printf("App cpu is running!\n");
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//Wait for the freertos initialization is finished on CPU0
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while (port_xSchedulerRunning == 0) ;
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ets_printf("Core0 started initializing FreeRTOS. Jumping to scheduler.\n");
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@ -221,11 +203,12 @@ static void do_global_ctors(void) {
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void user_start_cpu0(void) {
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esp_err_t ret;
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ets_setup_syscalls();
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do_global_ctors();
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// TODO: consider ethernet interface
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#if CONFIG_WIFI_ENABLED
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#if 1 //workaround
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for (uint8_t i = 5; i < 8; i++) {
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ets_printf("erase sector %d\n", i);
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@ -233,8 +216,8 @@ void user_start_cpu0(void) {
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}
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#endif
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ets_printf("nvs_flash_init\n");
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ret = nvs_flash_init(5, 3);
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if (ESP_OK != ret) {
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esp_err_t ret = nvs_flash_init(5, 3);
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if (ret != ESP_OK) {
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ets_printf("nvs_flash_init fail, ret=%d\n", ret);
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}
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@ -242,9 +225,8 @@ void user_start_cpu0(void) {
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esp_event_init(NULL);
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// TODO: consider ethernet interface
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#if CONFIG_WIFI_ENABLED
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tcpip_adapter_init();
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#endif
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#if CONFIG_WIFI_ENABLED && CONFIG_WIFI_AUTO_STARTUP
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