From 78161a1fe3d660abb87b851fef1a630ae3b5255e Mon Sep 17 00:00:00 2001 From: Jeroen Domburg Date: Mon, 12 Dec 2016 20:05:58 +0800 Subject: [PATCH] Replace non-multicore-aware rom funcs with multicore-aware funcs, ESP_LOG->ESP_EARLY_LOG fix, reserve ints used in wireless libs. Fixes WiFi crashing --- components/esp32/cpu_start.c | 5 ++++- components/esp32/intr_alloc.c | 17 ++++++++++++++--- components/esp32/ld/esp32.rom.ld | 21 ++++++++++++++------- components/esp32/lib | 2 +- components/freertos/xtensa_intr_asm.S | 4 ++++ 5 files changed, 37 insertions(+), 12 deletions(-) diff --git a/components/esp32/cpu_start.c b/components/esp32/cpu_start.c index d6088b040..c7667fec6 100644 --- a/components/esp32/cpu_start.c +++ b/components/esp32/cpu_start.c @@ -228,8 +228,11 @@ void start_cpu1_default(void) while (port_xSchedulerRunning[0] == 0) { ; } + //Take care putting stuff here: if asked, FreeRTOS will happily tell you the scheduler + //has started, but it isn't active *on this CPU* yet. esp_crosscore_int_init(); - ESP_LOGI(TAG, "Starting scheduler on APP CPU."); + + ESP_EARLY_LOGI(TAG, "Starting scheduler on APP CPU."); xPortStartScheduler(); } #endif //!CONFIG_FREERTOS_UNICORE diff --git a/components/esp32/intr_alloc.c b/components/esp32/intr_alloc.c index 77572b1a5..3ffffeacd 100644 --- a/components/esp32/intr_alloc.c +++ b/components/esp32/intr_alloc.c @@ -106,8 +106,8 @@ const static int_desc_t int_desc[32]={ { 1, INTTP_NA, {INT6RES, INT6RES } }, //6 { 1, INTTP_NA, {INTDESC_SPECIAL,INTDESC_SPECIAL}}, //7 { 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_RESVD } }, //8 - { 1, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_NORMAL} }, //9 - { 1, INTTP_EDGE , {INTDESC_RESVD, INTDESC_NORMAL} }, //10 + { 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_RESVD } }, //9 //FRC1 + { 1, INTTP_EDGE , {INTDESC_RESVD, INTDESC_RESVD } }, //10 //FRC2 { 3, INTTP_NA, {INTDESC_SPECIAL,INTDESC_SPECIAL}}, //11 { 1, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_NORMAL} }, //12 { 1, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_NORMAL} }, //13 @@ -721,7 +721,18 @@ void esp_intr_noniram_enable() ::"r"(intmask):"a3"); } - +//These functions are provided in ROM, but the ROM-based functions use non-multicore-capable +//virtualized interrupt levels. Thus, we disable them in the ld file and provide working +//equivalents here. + + +void ets_isr_unmask(unsigned int mask) { + xt_ints_on(mask); +} + +void ets_isr_mask(unsigned int mask) { + xt_ints_off(mask); +} diff --git a/components/esp32/ld/esp32.rom.ld b/components/esp32/ld/esp32.rom.ld index b557271fa..6241ff840 100644 --- a/components/esp32/ld/esp32.rom.ld +++ b/components/esp32/ld/esp32.rom.ld @@ -169,12 +169,6 @@ PROVIDE ( ets_get_xtal_scale = 0x4000856c ); PROVIDE ( ets_install_putc1 = 0x40007d18 ); PROVIDE ( ets_install_putc2 = 0x40007d38 ); PROVIDE ( ets_install_uart_printf = 0x40007d28 ); -PROVIDE ( ets_intr_count = 0x3ffe03fc ); -PROVIDE ( ets_intr_lock = 0x400067b0 ); -PROVIDE ( ets_intr_unlock = 0x400067c4 ); -PROVIDE ( ets_isr_attach = 0x400067ec ); -PROVIDE ( ets_isr_mask = 0x400067fc ); -PROVIDE ( ets_isr_unmask = 0x40006808 ); PROVIDE ( ets_post = 0x4000673c ); PROVIDE ( ets_printf = 0x40007d54 ); PROVIDE ( ets_readySet_ = 0x3ffe01f0 ); @@ -1730,6 +1724,13 @@ PROVIDE ( Xthal_intlevel = 0x3ff9c2b4 ); PROVIDE ( xthal_memcpy = 0x4000c0bc ); PROVIDE ( xthal_set_ccompare = 0x4000c058 ); PROVIDE ( xthal_set_intclear = 0x4000c1ec ); +PROVIDE ( _xtos_set_intlevel = 0x4000bfdc ); +/* +These functions are xtos-related (or call xtos-related functions) and do not play well +with multicore FreeRTOS. Where needed, we provide alternatives that are multicore +compatible. +*/ +/* PROVIDE ( _xtos_alloca_handler = 0x40000010 ); PROVIDE ( _xtos_cause3_handler = 0x40000dd8 ); PROVIDE ( _xtos_c_handler_table = 0x3ffe0548 ); @@ -1748,13 +1749,19 @@ PROVIDE ( _xtos_return_from_exc = 0x4000c034 ); PROVIDE ( _xtos_set_exception_handler = 0x4000074c ); PROVIDE ( _xtos_set_interrupt_handler = 0x4000bf78 ); PROVIDE ( _xtos_set_interrupt_handler_arg = 0x4000bf34 ); -PROVIDE ( _xtos_set_intlevel = 0x4000bfdc ); PROVIDE ( _xtos_set_min_intlevel = 0x4000bff8 ); PROVIDE ( _xtos_set_vpri = 0x40000934 ); PROVIDE ( _xtos_syscall_handler = 0x40000790 ); PROVIDE ( _xtos_unhandled_exception = 0x4000c024 ); PROVIDE ( _xtos_unhandled_interrupt = 0x4000c01c ); PROVIDE ( _xtos_vpri_enabled = 0x3ffe0654 ); +PROVIDE ( ets_intr_count = 0x3ffe03fc ); +PROVIDE ( ets_intr_lock = 0x400067b0 ); +PROVIDE ( ets_intr_unlock = 0x400067c4 ); +PROVIDE ( ets_isr_attach = 0x400067ec ); +PROVIDE ( ets_isr_mask = 0x400067fc ); +PROVIDE ( ets_isr_unmask = 0x40006808 ); +*/ /* Following are static data, but can be used, not generated by script <<<<< btdm data */ PROVIDE ( ld_acl_env = 0x3ffb8258 ); PROVIDE ( ld_active_ch_map = 0x3ffb8334 ); diff --git a/components/esp32/lib b/components/esp32/lib index 3a412c08a..5902a2229 160000 --- a/components/esp32/lib +++ b/components/esp32/lib @@ -1 +1 @@ -Subproject commit 3a412c08af1ace47a58d1f8722a8fed5b8d3b944 +Subproject commit 5902a2229e5371aeea45c09e63ea5e233b58750f diff --git a/components/freertos/xtensa_intr_asm.S b/components/freertos/xtensa_intr_asm.S index 330b68f59..f2d236108 100644 --- a/components/freertos/xtensa_intr_asm.S +++ b/components/freertos/xtensa_intr_asm.S @@ -158,8 +158,10 @@ xt_ints_on: #else movi a3, 0 xsr a3, INTENABLE /* Disables all interrupts */ + rsync or a2, a3, a2 /* set bits in mask */ wsr a2, INTENABLE /* Re-enable ints */ + rsync mov a2, a3 /* return prev mask */ #endif #else @@ -206,9 +208,11 @@ xt_ints_off: #else movi a4, 0 xsr a4, INTENABLE /* Disables all interrupts */ + rsync or a3, a4, a2 /* set bits in mask */ xor a3, a3, a2 /* invert bits in mask set in mask, essentially clearing them */ wsr a3, INTENABLE /* Re-enable ints */ + rsync mov a2, a4 /* return prev mask */ #endif #else