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ci: disable unavailable tests for esp32s2beta

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This commit is contained in:
Michael (XIAO Xufeng) 2019-08-27 17:36:53 +08:00 committed by Angus Gratton
parent e44df658d5
commit 76a3a5fb48
30 changed files with 707 additions and 748 deletions
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8
components/app_update/test/CMakeLists.txt
View file

@ -1,3 +1,5 @@
idf_component_register(SRC_DIRS "."
INCLUDE_DIRS "."
REQUIRES unity test_utils app_update bootloader_support nvs_flash)
if(IDF_TARGET STREQUAL "esp32")
idf_component_register(SRC_DIRS "."
INCLUDE_DIRS "."
REQUIRES unity test_utils app_update bootloader_support nvs_flash)
endif()

2
components/app_update/test/test_ota_ops.c
View file

@ -58,7 +58,7 @@ TEST_CASE("esp_ota_get_next_update_partition logic", "[ota]")
TEST_ASSERT_NOT_NULL(ota_1);
TEST_ASSERT_NULL(ota_2); /* this partition shouldn't exist in test partition table */
TEST_ASSERT_EQUAL_PTR(factory, running); /* this may not be true if/when we get OTA tests that do OTA updates */
TEST_ASSERT_EQUAL_PTR(factory, running); /* this may not be true if/when we get OTA tests that do OTA updates */
/* (The test steps verify subtypes before verifying pointer equality, because the failure messages are more readable
this way.)

2
components/bootloader_support/test/test_verify_image.c
View file

@ -33,7 +33,7 @@ TEST_CASE("Verify bootloader image in flash", "[bootloader_support]")
TEST_ASSERT_EQUAL(data.image_len, bootloader_length);
}
TEST_CASE("Verify unit test app image", "[bootloader_support]")
TEST_CASE_ESP32("Verify unit test app image", "[bootloader_support]")
{
esp_image_metadata_t data = { 0 };
const esp_partition_t *running = esp_ota_get_running_partition();

4
components/cxx/test/test_cxx.cpp
View file

@ -276,14 +276,14 @@ TEST_CASE("c++ exceptions emergency pool", "[cxx] [ignore]")
#else // !CONFIG_COMPILER_CXX_EXCEPTIONS
TEST_CASE("std::out_of_range exception when -fno-exceptions", "[cxx][reset=abort,SW_CPU_RESET]")
TEST_CASE_ESP32("std::out_of_range exception when -fno-exceptions", "[cxx][reset=abort,SW_CPU_RESET]")
{
std::vector<int> v(10);
v.at(20) = 42;
TEST_FAIL_MESSAGE("Unreachable because we are aborted on the line above");
}
TEST_CASE("std::bad_alloc exception when -fno-exceptions", "[cxx][reset=abort,SW_CPU_RESET]")
TEST_CASE_ESP32("std::bad_alloc exception when -fno-exceptions", "[cxx][reset=abort,SW_CPU_RESET]")
{
std::string s = std::string(2000000000, 'a');
(void)s;

0
components/driver/test/test_adc2.c → components/driver/test/esp32/test_adc2.c
View file

135
components/driver/test/esp32/test_i2s.c
View file

@ -9,6 +9,7 @@
#include "freertos/task.h"
#include "driver/i2s.h"
#include "unity.h"
#include "math.h"
#define SAMPLE_RATE (36000)
#define SAMPLE_BITS (16)
@ -18,7 +19,55 @@
#define SLAVE_WS_IO 26
#define DATA_IN_IO 21
#define DATA_OUT_IO 22
#define PERCENT_DIFF 0.0001
/**
* i2s initialize test
* 1. i2s_driver_install
* 2. i2s_set_pin
*/
TEST_CASE("I2S basic driver install, uninstall, set pin test", "[i2s]")
{
// dac, adc i2s
i2s_config_t i2s_config = {
.mode = I2S_MODE_MASTER | I2S_MODE_TX,
.sample_rate = SAMPLE_RATE,
.bits_per_sample = SAMPLE_BITS,
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
.communication_format = I2S_COMM_FORMAT_I2S | I2S_COMM_FORMAT_I2S_MSB,
.dma_buf_count = 6,
.dma_buf_len = 60,
.use_apll = 0,
.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
};
//install and start i2s driver
TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
//for internal DAC, this will enable both of the internal channels
TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, NULL));
//stop & destroy i2s driver
TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
// normal i2s
i2s_pin_config_t pin_config = {
.bck_io_num = MASTER_BCK_IO,
.ws_io_num = MASTER_WS_IO,
.data_out_num = DATA_OUT_IO,
.data_in_num = -1
};
TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &pin_config));
TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
//error param test
TEST_ASSERT(i2s_driver_install(I2S_NUM_MAX, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG);
TEST_ASSERT(i2s_driver_install(I2S_NUM_0, NULL, 0, NULL) == ESP_ERR_INVALID_ARG);
i2s_config.dma_buf_count = 1;
TEST_ASSERT(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG);
i2s_config.dma_buf_count = 129;
TEST_ASSERT(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG);
TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
}
TEST_CASE("I2S write and read test(master tx and slave rx)", "[i2s][test_env=UT_T1_I2S]")
{
@ -185,3 +234,89 @@ TEST_CASE("I2S write and read test(master rx and slave tx)", "[i2s][test_env=UT_
i2s_driver_uninstall(I2S_NUM_0);
i2s_driver_uninstall(I2S_NUM_1);
}
TEST_CASE("I2S memory leaking test", "[i2s]")
{
i2s_config_t master_i2s_config = {
.mode = I2S_MODE_MASTER | I2S_MODE_RX,
.sample_rate = SAMPLE_RATE,
.bits_per_sample = SAMPLE_BITS,
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
.communication_format = I2S_COMM_FORMAT_I2S | I2S_COMM_FORMAT_I2S_MSB,
.dma_buf_count = 6,
.dma_buf_len = 100,
.use_apll = 0,
.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
};
i2s_pin_config_t master_pin_config = {
.bck_io_num = MASTER_BCK_IO,
.ws_io_num = MASTER_WS_IO,
.data_out_num = -1,
.data_in_num = DATA_IN_IO
};
TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
i2s_driver_uninstall(I2S_NUM_0);
int initial_size = esp_get_free_heap_size();
for(int i=0; i<100; i++) {
TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
i2s_driver_uninstall(I2S_NUM_0);
TEST_ASSERT(initial_size == esp_get_free_heap_size());
}
vTaskDelay(100 / portTICK_PERIOD_MS);
TEST_ASSERT(initial_size == esp_get_free_heap_size());
}
/*
* The I2S APLL clock variation test used to test the difference between the different sample rates, different bits per sample
* and the APLL clock generate for it. The TEST_CASE passes PERCENT_DIFF variation from the provided sample rate in APLL generated clock
* The percentage difference calculated as (mod((obtained clock rate - desired clock rate)/(desired clock rate))) * 100.
*/
TEST_CASE("I2S APLL clock variation test", "[i2s]")
{
i2s_pin_config_t pin_config = {
.bck_io_num = MASTER_BCK_IO,
.ws_io_num = MASTER_WS_IO,
.data_out_num = DATA_OUT_IO,
.data_in_num = -1
};
i2s_config_t i2s_config = {
.mode = I2S_MODE_MASTER | I2S_MODE_TX,
.sample_rate = SAMPLE_RATE,
.bits_per_sample = SAMPLE_BITS,
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
.communication_format = I2S_COMM_FORMAT_I2S,
.dma_buf_count = 6,
.dma_buf_len = 60,
.use_apll = true,
.intr_alloc_flags = 0,
};
TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &pin_config));
TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
int initial_size = esp_get_free_heap_size();
uint32_t sample_rate_arr[8] = { 10675, 11025, 16000, 22050, 32000, 44100, 48000, 96000 };
int bits_per_sample_arr[3] = { 16, 24, 32 };
for (int i = 0; i < (sizeof(sample_rate_arr)/sizeof(sample_rate_arr[0])); i++) {
for (int j = 0; j < (sizeof(bits_per_sample_arr)/sizeof(bits_per_sample_arr[0])); j++) {
i2s_config.sample_rate = sample_rate_arr[i];
i2s_config.bits_per_sample = bits_per_sample_arr[j];
TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &pin_config));
TEST_ASSERT((fabs((i2s_get_clk(I2S_NUM_0) - sample_rate_arr[i]))/(sample_rate_arr[i]))*100 < PERCENT_DIFF);
TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
TEST_ASSERT(initial_size == esp_get_free_heap_size());
}
}
vTaskDelay(100 / portTICK_PERIOD_MS);
TEST_ASSERT(initial_size == esp_get_free_heap_size());
}

0
components/driver/test/test_spi_master.c → components/driver/test/esp32/test_spi_master.c
View file

446
components/driver/test/esp32/test_spi_param.c
View file

@ -5,6 +5,430 @@
#include "soc/spi_periph.h"
#include "test/test_common_spi.h"
/********************************************************************************
* Test By Internal Connections
********************************************************************************/
static void local_test_init(void** context);
static void local_test_deinit(void* context);
static void local_test_loop(const void *test_param, void* context);
static const ptest_func_t local_test_func = {
.pre_test = local_test_init,
.post_test = local_test_deinit,
.loop = local_test_loop,
.def_param = spitest_def_param,
};
#define TEST_SPI_LOCAL(name, param_set) \
PARAM_GROUP_DECLARE(name, param_set) \
TEST_LOCAL(name, param_set, "[spi][timeout=120]", &local_test_func)
static void local_test_init(void** arg)
{
TEST_ASSERT(*arg==NULL);
*arg = malloc(sizeof(spitest_context_t));
spitest_context_t* context = (spitest_context_t*)*arg;
TEST_ASSERT(context!=NULL);
context->slave_context = (spi_slave_task_context_t){};
esp_err_t err = init_slave_context( &context->slave_context);
TEST_ASSERT(err == ESP_OK);
xTaskCreate(spitest_slave_task, "spi_slave", 4096, &context->slave_context, 0, &context->handle_slave);
}
static void local_test_deinit(void* arg)
{
spitest_context_t* context = arg;
vTaskDelete(context->handle_slave);
context->handle_slave = 0;
deinit_slave_context(&context->slave_context);
}
static void local_test_start(spi_device_handle_t *spi, int freq, const spitest_param_set_t* pset, spitest_context_t* context)
{
//master config
spi_bus_config_t buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
spi_device_interface_config_t devcfg = SPI_DEVICE_TEST_DEFAULT_CONFIG();
spi_slave_interface_config_t slvcfg = SPI_SLAVE_TEST_DEFAULT_CONFIG();
//pin config & initialize
//we can't have two sets of iomux pins on the same pins
assert(!pset->master_iomux || !pset->slave_iomux);
if (pset->slave_iomux) {
//only in this case, use VSPI iomux pins
buscfg.miso_io_num = VSPI_IOMUX_PIN_NUM_MISO;
buscfg.mosi_io_num = VSPI_IOMUX_PIN_NUM_MOSI;
buscfg.sclk_io_num = VSPI_IOMUX_PIN_NUM_CLK;
devcfg.spics_io_num = VSPI_IOMUX_PIN_NUM_CS;
slvcfg.spics_io_num = VSPI_IOMUX_PIN_NUM_CS;
} else {
buscfg.miso_io_num = HSPI_IOMUX_PIN_NUM_MISO;
buscfg.mosi_io_num = HSPI_IOMUX_PIN_NUM_MOSI;
buscfg.sclk_io_num = HSPI_IOMUX_PIN_NUM_CLK;
devcfg.spics_io_num = HSPI_IOMUX_PIN_NUM_CS;
slvcfg.spics_io_num = HSPI_IOMUX_PIN_NUM_CS;
}
//this does nothing, but avoid the driver from using iomux pins if required
buscfg.quadhd_io_num = (!pset->master_iomux && !pset->slave_iomux ? VSPI_IOMUX_PIN_NUM_MISO : -1);
devcfg.mode = pset->mode;
const int cs_pretrans_max = 15;
if (pset->dup == HALF_DUPLEX_MISO) {
devcfg.cs_ena_pretrans = cs_pretrans_max;
devcfg.flags |= SPI_DEVICE_HALFDUPLEX;
} else if (pset->dup == HALF_DUPLEX_MOSI) {
devcfg.cs_ena_pretrans = cs_pretrans_max;
devcfg.flags |= SPI_DEVICE_NO_DUMMY;
} else {
devcfg.cs_ena_pretrans = cs_pretrans_max;
}
const int cs_posttrans_max = 15;
devcfg.cs_ena_posttrans = cs_posttrans_max;
devcfg.input_delay_ns = pset->slave_tv_ns;
devcfg.clock_speed_hz = freq;
if (pset->master_limit != 0 && freq > pset->master_limit) devcfg.flags |= SPI_DEVICE_NO_DUMMY;
//slave config
slvcfg.mode = pset->mode;
slave_pull_up(&buscfg, slvcfg.spics_io_num);
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, pset->master_dma_chan));
TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devcfg, spi));
//slave automatically use iomux pins if pins are on VSPI_* pins
buscfg.quadhd_io_num = -1;
TEST_ESP_OK(spi_slave_initialize(TEST_SLAVE_HOST, &buscfg, &slvcfg, pset->slave_dma_chan));
//initialize master and slave on the same pins break some of the output configs, fix them
if (pset->master_iomux) {
spitest_gpio_output_sel(buscfg.mosi_io_num, FUNC_SPI, HSPID_OUT_IDX);
spitest_gpio_output_sel(buscfg.miso_io_num, FUNC_GPIO, VSPIQ_OUT_IDX);
spitest_gpio_output_sel(devcfg.spics_io_num, FUNC_SPI, HSPICS0_OUT_IDX);
spitest_gpio_output_sel(buscfg.sclk_io_num, FUNC_SPI, HSPICLK_OUT_IDX);
} else if (pset->slave_iomux) {
spitest_gpio_output_sel(buscfg.mosi_io_num, FUNC_GPIO, HSPID_OUT_IDX);
spitest_gpio_output_sel(buscfg.miso_io_num, FUNC_SPI, VSPIQ_OUT_IDX);
spitest_gpio_output_sel(devcfg.spics_io_num, FUNC_GPIO, HSPICS0_OUT_IDX);
spitest_gpio_output_sel(buscfg.sclk_io_num, FUNC_GPIO, HSPICLK_OUT_IDX);
} else {
spitest_gpio_output_sel(buscfg.mosi_io_num, FUNC_GPIO, HSPID_OUT_IDX);
spitest_gpio_output_sel(buscfg.miso_io_num, FUNC_GPIO, VSPIQ_OUT_IDX);
spitest_gpio_output_sel(devcfg.spics_io_num, FUNC_GPIO, HSPICS0_OUT_IDX);
spitest_gpio_output_sel(buscfg.sclk_io_num, FUNC_GPIO, HSPICLK_OUT_IDX);
}
//prepare slave tx data
for (int k = 0; k < pset->test_size; k++)
xQueueSend(context->slave_context.data_to_send, &context->slave_trans[k], portMAX_DELAY);
//clear master receive buffer
memset(context->master_rxbuf, 0x66, sizeof(context->master_rxbuf));
}
static void local_test_loop(const void* arg1, void* arg2)
{
const spitest_param_set_t *pset = arg1;
spitest_context_t *context = arg2;
spi_device_handle_t spi;
spitest_init_transactions(pset, context);
const int *timing_speed_array = pset->freq_list;
ESP_LOGI(MASTER_TAG, "****************** %s ***************", pset->pset_name);
for (int i = 0; ; i++) {
const int freq = timing_speed_array[i];
if (freq==0) break;
if (pset->freq_limit && freq > pset->freq_limit) break;
ESP_LOGI(MASTER_TAG, "======> %dk", freq / 1000);
local_test_start(&spi, freq, pset, context);
for (int k = 0; k < pset->test_size; k++) {
//wait for both master and slave end
ESP_LOGI(MASTER_TAG, "=> test%d", k);
//send master tx data
vTaskDelay(9);
spi_transaction_t *t = &context->master_trans[k];
TEST_ESP_OK(spi_device_transmit(spi, t));
int len = get_trans_len(pset->dup, t);
spitest_master_print_data(t, len);
size_t rcv_len;
slave_rxdata_t *rcv_data = xRingbufferReceive(context->slave_context.data_received, &rcv_len, portMAX_DELAY);
spitest_slave_print_data(rcv_data, true);
//check result
bool check_master_data = (pset->dup!=HALF_DUPLEX_MOSI &&
(pset->master_limit==0 || freq <= pset->master_limit));
bool check_slave_data = (pset->dup!=HALF_DUPLEX_MISO);
const bool check_len = true;
if (!check_master_data) ESP_LOGI(MASTER_TAG, "skip master data check");
if (!check_slave_data) ESP_LOGI(SLAVE_TAG, "skip slave data check");
TEST_ESP_OK(spitest_check_data(len, t, rcv_data, check_master_data, check_len, check_slave_data));
//clean
vRingbufferReturnItem(context->slave_context.data_received, rcv_data);
}
master_free_device_bus(spi);
TEST_ASSERT(spi_slave_free(TEST_SLAVE_HOST) == ESP_OK);
}
}
/************ Timing Test ***********************************************/
static spitest_param_set_t timing_pgroup[] = {
{ .pset_name = "FULL_DUP, MASTER IOMUX",
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
.master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX,
.master_iomux = true,
.slave_iomux = false,
.slave_tv_ns = TV_INT_CONNECT_GPIO,
},
{ .pset_name = "FULL_DUP, SLAVE IOMUX",
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
.master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
},
{ .pset_name = "FULL_DUP, BOTH GPIO",
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
.master_limit = SPI_MASTER_FREQ_10M,
.dup = FULL_DUPLEX,
.master_iomux = false,
.slave_iomux = false,
.slave_tv_ns = TV_INT_CONNECT_GPIO,
},
{ .pset_name = "MISO_DUP, MASTER IOMUX",
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
.master_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
.dup = HALF_DUPLEX_MISO,
.master_iomux = true,
.slave_iomux = false,
.slave_tv_ns = TV_INT_CONNECT_GPIO+12.5,
//for freq lower than 20M, the delay is 60(62.5)ns, however, the delay becomes 75ns over 26M
},
{ .pset_name = "MISO_DUP, SLAVE IOMUX",
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
//.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
.dup = HALF_DUPLEX_MISO,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT+12.5,
//for freq lower than 20M, the delay is 60(62.5)ns, however, the delay becomes 75ns over 26M
},
{ .pset_name = "MISO_DUP, BOTH GPIO",
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
//.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
.dup = HALF_DUPLEX_MISO,
.master_iomux = false,
.slave_iomux = false,
.slave_tv_ns = TV_INT_CONNECT_GPIO+12.5,
//for freq lower than 20M, the delay is 60(62.5)ns, however, the delay becomes 75ns over 26M
},
{ .pset_name = "MOSI_DUP, MASTER IOMUX",
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
//.freq_limit = ESP_SPI_SLAVE_MAX_READ_FREQ, //ESP_SPI_SLAVE_MAX_FREQ_SYNC,
.dup = HALF_DUPLEX_MOSI,
.master_iomux = true,
.slave_iomux = false,
.slave_tv_ns = TV_INT_CONNECT_GPIO,
},
{ .pset_name = "MOSI_DUP, SLAVE IOMUX",
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
//.freq_limit = ESP_SPI_SLAVE_MAX_READ_FREQ, //ESP_SPI_SLAVE_MAX_FREQ_SYNC,
.dup = HALF_DUPLEX_MOSI,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
},
{ .pset_name = "MOSI_DUP, BOTH GPIO",
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
//.freq_limit = ESP_SPI_SLAVE_MAX_READ_FREQ, //ESP_SPI_SLAVE_MAX_FREQ_SYNC,
.dup = HALF_DUPLEX_MOSI,
.master_iomux = false,
.slave_iomux = false,
.slave_tv_ns = TV_INT_CONNECT_GPIO,
},
};
TEST_SPI_LOCAL(TIMING, timing_pgroup)
/************ Mode Test ***********************************************/
#define FREQ_LIMIT_MODE SPI_MASTER_FREQ_16M
static int test_freq_mode_local[]={
1*1000*1000,
SPI_MASTER_FREQ_9M, //maximum freq MISO stable before next latch edge
SPI_MASTER_FREQ_13M,
SPI_MASTER_FREQ_16M,
SPI_MASTER_FREQ_20M,
SPI_MASTER_FREQ_26M,
SPI_MASTER_FREQ_40M,
0,
};
static spitest_param_set_t mode_pgroup[] = {
{ .pset_name = "Mode 0",
.freq_list = test_freq_mode_local,
.master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX,
.mode = 0,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
},
{ .pset_name = "Mode 1",
.freq_list = test_freq_mode_local,
.freq_limit = SPI_MASTER_FREQ_26M,
.master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX,
.mode = 1,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
},
{ .pset_name = "Mode 2",
.freq_list = test_freq_mode_local,
.master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX,
.mode = 2,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
},
{ .pset_name = "Mode 3",
.freq_list = test_freq_mode_local,
.freq_limit = SPI_MASTER_FREQ_26M,
.master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX,
.mode = 3,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
},
{ .pset_name = "Mode 0, DMA",
.freq_list = test_freq_mode_local,
.master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX,
.mode = 0,
.slave_dma_chan = 2,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT, //at 16M, the MISO delay (-0.5T+(3+2)apb) equals to non-DMA mode delay (3apb).
.length_aligned = true,
},
{ .pset_name = "Mode 1, DMA",
.freq_list = test_freq_mode_local,
.freq_limit = SPI_MASTER_FREQ_26M,
.master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX,
.mode = 1,
.slave_dma_chan = 2,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
.length_aligned = true,
},
{ .pset_name = "Mode 2, DMA",
.freq_list = test_freq_mode_local,
.master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX,
.mode = 2,
.slave_dma_chan = 2,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT, //at 16M, the MISO delay (-0.5T+(3+2)apb) equals to non-DMA mode delay (3apb).
.length_aligned = true,
},
{ .pset_name = "Mode 3, DMA",
.freq_list = test_freq_mode_local,
.freq_limit = SPI_MASTER_FREQ_26M,
.master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX,
.mode = 3,
.slave_dma_chan = 2,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
.length_aligned = true,
},
// MISO ////////////////////////////////////
{ .pset_name = "MISO, Mode 0",
.freq_list = test_freq_mode_local,
.dup = HALF_DUPLEX_MISO,
.mode = 0,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
},
{ .pset_name = "MISO, Mode 1",
.freq_list = test_freq_mode_local,
.dup = HALF_DUPLEX_MISO,
.mode = 1,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
},
{ .pset_name = "MISO, Mode 2",
.freq_list = test_freq_mode_local,
.dup = HALF_DUPLEX_MISO,
.mode = 2,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
},
{ .pset_name = "MISO, Mode 3",
.freq_list = test_freq_mode_local,
.dup = HALF_DUPLEX_MISO,
.mode = 3,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
},
{ .pset_name = "MISO, Mode 0, DMA",
.freq_list = test_freq_mode_local,
.dup = HALF_DUPLEX_MISO,
.mode = 0,
.slave_dma_chan = 2,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT+12.5, //at 16M, the MISO delay (-0.5T+(3+2)apb) equals to non-DMA mode delay (3apb).
.length_aligned = true,
},
{ .pset_name = "MISO, Mode 1, DMA",
.freq_list = test_freq_mode_local,
.dup = HALF_DUPLEX_MISO,
.mode = 1,
.slave_dma_chan = 2,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
.length_aligned = true,
},
{ .pset_name = "MISO, Mode 2, DMA",
.freq_list = test_freq_mode_local,
.dup = HALF_DUPLEX_MISO,
.mode = 2,
.slave_dma_chan = 2,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT+12.5, //at 16M, the MISO delay (-0.5T+(3+2)apb) equals to non-DMA mode delay (3apb).
.length_aligned = true,
},
{ .pset_name = "MISO, Mode 3, DMA",
.freq_list = test_freq_mode_local,
.dup = HALF_DUPLEX_MISO,
.mode = 3,
.slave_dma_chan = 2,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
.length_aligned = true,
},
};
TEST_SPI_LOCAL(MODE, mode_pgroup)
/********************************************************************************
* Test By Master & Slave (2 boards)
@ -67,13 +491,13 @@ static void test_master_start(spi_device_handle_t *spi, int freq, const spitest_
{
//master config
spi_bus_config_t buspset=SPI_BUS_TEST_DEFAULT_CONFIG();
buspset.miso_io_num = spi_periph_signal[HSPI_HOST].spiq_iomux_pin;
buspset.mosi_io_num = spi_periph_signal[HSPI_HOST].spid_iomux_pin;
buspset.sclk_io_num = spi_periph_signal[HSPI_HOST].spiclk_iomux_pin;
buspset.miso_io_num = HSPI_IOMUX_PIN_NUM_MISO;
buspset.mosi_io_num = HSPI_IOMUX_PIN_NUM_MOSI;
buspset.sclk_io_num = HSPI_IOMUX_PIN_NUM_CLK;
//this does nothing, but avoid the driver from using native pins
if (!pset->master_iomux) buspset.quadhd_io_num = spi_periph_signal[VSPI_HOST].spiq_iomux_pin;
if (!pset->master_iomux) buspset.quadhd_io_num = VSPI_IOMUX_PIN_NUM_MISO;
spi_device_interface_config_t devpset=SPI_DEVICE_TEST_DEFAULT_CONFIG();
devpset.spics_io_num = spi_periph_signal[HSPI_HOST].spics0_iomux_pin;
devpset.spics_io_num = HSPI_IOMUX_PIN_NUM_CS;
devpset.mode = pset->mode;
const int cs_pretrans_max = 15;
if (pset->dup==HALF_DUPLEX_MISO) {
@ -199,13 +623,13 @@ static void timing_slave_start(int speed, const spitest_param_set_t* pset, spite
{
//slave config
spi_bus_config_t slv_buscfg=SPI_BUS_TEST_DEFAULT_CONFIG();
slv_buscfg.miso_io_num = spi_periph_signal[VSPI_HOST].spiq_iomux_pin;
slv_buscfg.mosi_io_num = spi_periph_signal[VSPI_HOST].spid_iomux_pin;
slv_buscfg.sclk_io_num = spi_periph_signal[VSPI_HOST].spiclk_iomux_pin;
slv_buscfg.miso_io_num = VSPI_IOMUX_PIN_NUM_MISO;
slv_buscfg.mosi_io_num = VSPI_IOMUX_PIN_NUM_MOSI;
slv_buscfg.sclk_io_num = VSPI_IOMUX_PIN_NUM_CLK;
//this does nothing, but avoid the driver from using native pins
if (!pset->slave_iomux) slv_buscfg.quadhd_io_num = spi_periph_signal[HSPI_HOST].spiclk_iomux_pin;
if (!pset->slave_iomux) slv_buscfg.quadhd_io_num = HSPI_IOMUX_PIN_NUM_CLK;
spi_slave_interface_config_t slvcfg=SPI_SLAVE_TEST_DEFAULT_CONFIG();
slvcfg.spics_io_num = spi_periph_signal[VSPI_HOST].spics0_iomux_pin;
slvcfg.spics_io_num = VSPI_IOMUX_PIN_NUM_CS;
slvcfg.mode = pset->mode;
//Enable pull-ups on SPI lines so we don't detect rogue pulses when no master is connected.
slave_pull_up(&slv_buscfg, slvcfg.spics_io_num);
@ -552,4 +976,4 @@ spitest_param_set_t mode_conf[] = {
.slave_dma_chan = 1,
},
};
TEST_SPI_MASTER_SLAVE(MODE, mode_conf, "[ignore]")
TEST_SPI_MASTER_SLAVE(MODE, mode_conf, "[ignore]")

89
components/driver/test/esp32/test_spi_sio.c
View file

@ -7,6 +7,7 @@
#include <stdlib.h>
#include <malloc.h>
#include <string.h>
#include "esp32/rom/ets_sys.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/semphr.h"
@ -22,14 +23,90 @@
#include "test/test_common_spi.h"
#include "soc/gpio_periph.h"
#include "sdkconfig.h"
#include "hal/spi_ll.h"
/********************************************************************************
* Test SIO
********************************************************************************/
TEST_CASE("local test sio", "[spi]")
{
spi_device_handle_t spi;
WORD_ALIGNED_ATTR uint8_t master_rx_buffer[320];
WORD_ALIGNED_ATTR uint8_t slave_rx_buffer[320];
for (int i = 0; i < 16; i++) {
SPI1.data_buf[0] = 0xcccccccc;
SPI2.data_buf[0] = 0xcccccccc;
}
/* This test use a strange connection to test the SIO mode:
* master spid -> slave spid
* slave spiq -> master spid
*/
spi_bus_config_t bus_cfg = SPI_BUS_TEST_DEFAULT_CONFIG();
spi_device_interface_config_t dev_cfg = SPI_DEVICE_TEST_DEFAULT_CONFIG();
spi_slave_interface_config_t slv_cfg = SPI_SLAVE_TEST_DEFAULT_CONFIG();
slv_cfg.spics_io_num = dev_cfg.spics_io_num;
TEST_ESP_OK(spi_slave_initialize(TEST_SLAVE_HOST, &bus_cfg, &slv_cfg, 0));
int miso_io_num = bus_cfg.miso_io_num;
int mosi_io_num = bus_cfg.mosi_io_num;
bus_cfg.mosi_io_num = bus_cfg.miso_io_num;
bus_cfg.miso_io_num = -1;
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &bus_cfg, 0));
dev_cfg.flags = SPI_DEVICE_HALFDUPLEX | SPI_DEVICE_3WIRE;
TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &dev_cfg, &spi));
spitest_gpio_output_sel(mosi_io_num, FUNC_GPIO, spi_periph_signal[TEST_SPI_HOST].spid_out);
spitest_gpio_output_sel(miso_io_num, FUNC_GPIO, spi_periph_signal[TEST_SLAVE_HOST].spiq_out);
spitest_gpio_output_sel(dev_cfg.spics_io_num, FUNC_GPIO, spi_periph_signal[TEST_SPI_HOST].spics_out[0]);
spitest_gpio_output_sel(bus_cfg.sclk_io_num, FUNC_GPIO, spi_periph_signal[TEST_SPI_HOST].spiclk_out);
for (int i = 0; i < 8; i ++) {
int tlen = i*2+1;
int rlen = 9-i;
ESP_LOGI(MASTER_TAG, "=========== TEST%d ==========", i);
spi_transaction_t master_t = {
.length = tlen*8,
.tx_buffer = spitest_master_send+i,
.rxlength = rlen*8,
.rx_buffer = master_rx_buffer+i,
};
spi_slave_transaction_t slave_t = {
.length = (tlen+rlen)*8,
.tx_buffer = spitest_slave_send+i,
.rx_buffer = slave_rx_buffer,
};
memset(master_rx_buffer, 0x66, sizeof(master_rx_buffer));
memset(slave_rx_buffer, 0x66, sizeof(slave_rx_buffer));
TEST_ESP_OK(spi_slave_queue_trans(TEST_SLAVE_HOST, &slave_t, portMAX_DELAY));
TEST_ESP_OK(spi_device_transmit(spi, &master_t));
spi_slave_transaction_t* ret_t;
TEST_ESP_OK(spi_slave_get_trans_result(TEST_SLAVE_HOST, &ret_t, portMAX_DELAY));
TEST_ASSERT(ret_t == &slave_t);
ESP_LOG_BUFFER_HEXDUMP("master tx", master_t.tx_buffer, tlen, ESP_LOG_INFO);
ESP_LOG_BUFFER_HEXDUMP("slave rx", slave_t.rx_buffer, tlen+rlen, ESP_LOG_INFO);
ESP_LOG_BUFFER_HEXDUMP("slave tx", slave_t.tx_buffer, tlen+rlen, ESP_LOG_INFO);
ESP_LOG_BUFFER_HEXDUMP("master rx", master_t.rx_buffer, rlen, ESP_LOG_INFO);
TEST_ASSERT_EQUAL_HEX8_ARRAY(master_t.tx_buffer, slave_t.rx_buffer, tlen);
TEST_ASSERT_EQUAL_HEX8_ARRAY(slave_t.tx_buffer + tlen, master_t.rx_buffer, rlen);
}
spi_slave_free(TEST_SLAVE_HOST);
master_free_device_bus(spi);
}
/********************************************************************************
* Test SIO Master & Slave
********************************************************************************/
//if test_mosi is false, test on miso of slave, otherwise test on mosi of slave
static void test_sio_master_round(bool test_mosi)
void test_sio_master_round(bool test_mosi)
{
spi_device_handle_t spi;
WORD_ALIGNED_ATTR uint8_t rx_buffer[320];
@ -77,14 +154,14 @@ static void test_sio_master_round(bool test_mosi)
master_free_device_bus(spi);
}
static void test_sio_master(void)
void test_sio_master(void)
{
test_sio_master_round(true);
unity_send_signal("master ready");
test_sio_master_round(false);
}
static void test_sio_slave_round(bool test_mosi)
void test_sio_slave_round(bool test_mosi)
{
WORD_ALIGNED_ATTR uint8_t rx_buffer[320];
@ -133,11 +210,11 @@ static void test_sio_slave_round(bool test_mosi)
spi_slave_free(TEST_SLAVE_HOST);
}
static void test_sio_slave(void)
void test_sio_slave(void)
{
test_sio_slave_round(true);
unity_wait_for_signal("master ready");
test_sio_slave_round(false);
}
TEST_CASE_MULTIPLE_DEVICES("sio mode", "[spi][test_env=Example_SPI_Multi_device]", test_sio_master, test_sio_slave);
TEST_CASE_MULTIPLE_DEVICES("sio mode", "[spi][test_env=Example_SPI_Multi_device]", test_sio_master, test_sio_slave);

0
components/driver/test/test_spi_slave.c → components/driver/test/esp32/test_spi_slave.c
View file

156
components/driver/test/test_i2s.c
View file

@ -1,156 +0,0 @@
/**
* I2S test environment UT_T1_I2S:
* connect GPIO18 and GPIO19, GPIO25 and GPIO26, GPIO21 and GPIO22
*/
#include <stdio.h>
#include <string.h>
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "driver/i2s.h"
#include "unity.h"
#include "math.h"
#define SAMPLE_RATE (36000)
#define SAMPLE_BITS (16)
#define MASTER_BCK_IO 18
#define MASTER_WS_IO 25
#define SLAVE_BCK_IO 19
#define SLAVE_WS_IO 26
#define DATA_IN_IO 21
#define DATA_OUT_IO 22
#define PERCENT_DIFF 0.0001
/**
* i2s initialize test
* 1. i2s_driver_install
* 2. i2s_set_pin
*/
TEST_CASE("I2S basic driver install, uninstall, set pin test", "[i2s]")
{
// dac, adc i2s
i2s_config_t i2s_config = {
.mode = I2S_MODE_MASTER | I2S_MODE_TX,
.sample_rate = SAMPLE_RATE,
.bits_per_sample = SAMPLE_BITS,
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
.communication_format = I2S_COMM_FORMAT_I2S | I2S_COMM_FORMAT_I2S_MSB,
.dma_buf_count = 6,
.dma_buf_len = 60,
.use_apll = 0,
.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
};
//install and start i2s driver
TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
//for internal DAC, this will enable both of the internal channels
TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, NULL));
//stop & destroy i2s driver
TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
// normal i2s
i2s_pin_config_t pin_config = {
.bck_io_num = MASTER_BCK_IO,
.ws_io_num = MASTER_WS_IO,
.data_out_num = DATA_OUT_IO,
.data_in_num = -1
};
TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &pin_config));
TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
//error param test
TEST_ASSERT(i2s_driver_install(I2S_NUM_MAX, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG);
TEST_ASSERT(i2s_driver_install(I2S_NUM_0, NULL, 0, NULL) == ESP_ERR_INVALID_ARG);
i2s_config.dma_buf_count = 1;
TEST_ASSERT(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG);
i2s_config.dma_buf_count = 129;
TEST_ASSERT(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG);
TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
}
TEST_CASE("I2S memory leaking test", "[i2s]")
{
i2s_config_t master_i2s_config = {
.mode = I2S_MODE_MASTER | I2S_MODE_RX,
.sample_rate = SAMPLE_RATE,
.bits_per_sample = SAMPLE_BITS,
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
.communication_format = I2S_COMM_FORMAT_I2S | I2S_COMM_FORMAT_I2S_MSB,
.dma_buf_count = 6,
.dma_buf_len = 100,
.use_apll = 0,
.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
};
i2s_pin_config_t master_pin_config = {
.bck_io_num = MASTER_BCK_IO,
.ws_io_num = MASTER_WS_IO,
.data_out_num = -1,
.data_in_num = DATA_IN_IO
};
TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
i2s_driver_uninstall(I2S_NUM_0);
int initial_size = esp_get_free_heap_size();
for(int i=0; i<100; i++) {
TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
i2s_driver_uninstall(I2S_NUM_0);
TEST_ASSERT(initial_size == esp_get_free_heap_size());
}
vTaskDelay(100 / portTICK_PERIOD_MS);
TEST_ASSERT(initial_size == esp_get_free_heap_size());
}
/*
* The I2S APLL clock variation test used to test the difference between the different sample rates, different bits per sample
* and the APLL clock generate for it. The TEST_CASE passes PERCENT_DIFF variation from the provided sample rate in APLL generated clock
* The percentage difference calculated as (mod((obtained clock rate - desired clock rate)/(desired clock rate))) * 100.
*/
TEST_CASE("I2S APLL clock variation test", "[i2s]")
{
i2s_pin_config_t pin_config = {
.bck_io_num = MASTER_BCK_IO,
.ws_io_num = MASTER_WS_IO,
.data_out_num = DATA_OUT_IO,
.data_in_num = -1
};
i2s_config_t i2s_config = {
.mode = I2S_MODE_MASTER | I2S_MODE_TX,
.sample_rate = SAMPLE_RATE,
.bits_per_sample = SAMPLE_BITS,
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
.communication_format = I2S_COMM_FORMAT_I2S,
.dma_buf_count = 6,
.dma_buf_len = 60,
.use_apll = true,
.intr_alloc_flags = 0,
};
TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &pin_config));
TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
int initial_size = esp_get_free_heap_size();
uint32_t sample_rate_arr[8] = { 10675, 11025, 16000, 22050, 32000, 44100, 48000, 96000 };
int bits_per_sample_arr[3] = { 16, 24, 32 };
for (int i = 0; i < (sizeof(sample_rate_arr)/sizeof(sample_rate_arr[0])); i++) {
for (int j = 0; j < (sizeof(bits_per_sample_arr)/sizeof(bits_per_sample_arr[0])); j++) {
i2s_config.sample_rate = sample_rate_arr[i];
i2s_config.bits_per_sample = bits_per_sample_arr[j];
TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &pin_config));
TEST_ASSERT((fabs((i2s_get_clk(I2S_NUM_0) - sample_rate_arr[i]))/(sample_rate_arr[i]))*100 < PERCENT_DIFF);
TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
TEST_ASSERT(initial_size == esp_get_free_heap_size());
}
}
vTaskDelay(100 / portTICK_PERIOD_MS);
TEST_ASSERT(initial_size == esp_get_free_heap_size());
}

431
components/driver/test/test_spi_param.c
View file

@ -1,431 +0,0 @@
#include "test/test_common_spi.h"
#include "driver/spi_master.h"
#include "driver/spi_slave.h"
#include "esp_log.h"
#include "soc/spi_periph.h"
#include "test/test_common_spi.h"
/********************************************************************************
* Test By Internal Connections
********************************************************************************/
static void local_test_init(void** context);
static void local_test_deinit(void* context);
static void local_test_loop(const void *test_param, void* context);
static const ptest_func_t local_test_func = {
.pre_test = local_test_init,
.post_test = local_test_deinit,
.loop = local_test_loop,
.def_param = spitest_def_param,
};
#define TEST_SPI_LOCAL(name, param_set) \
PARAM_GROUP_DECLARE(name, param_set) \
TEST_LOCAL(name, param_set, "[spi][timeout=120]", &local_test_func)
static void local_test_init(void** arg)
{
TEST_ASSERT(*arg==NULL);
*arg = malloc(sizeof(spitest_context_t));
spitest_context_t* context = (spitest_context_t*)*arg;
TEST_ASSERT(context!=NULL);
context->slave_context = (spi_slave_task_context_t){};
esp_err_t err = init_slave_context( &context->slave_context);
TEST_ASSERT(err == ESP_OK);
xTaskCreate(spitest_slave_task, "spi_slave", 4096, &context->slave_context, 0, &context->handle_slave);
}
static void local_test_deinit(void* arg)
{
spitest_context_t* context = arg;
vTaskDelete(context->handle_slave);
context->handle_slave = 0;
deinit_slave_context(&context->slave_context);
}
static void local_test_start(spi_device_handle_t *spi, int freq, const spitest_param_set_t* pset, spitest_context_t* context)
{
//master config
spi_bus_config_t buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
spi_device_interface_config_t devcfg = SPI_DEVICE_TEST_DEFAULT_CONFIG();
spi_slave_interface_config_t slvcfg = SPI_SLAVE_TEST_DEFAULT_CONFIG();
//pin config & initialize
//we can't have two sets of iomux pins on the same pins
assert(!pset->master_iomux || !pset->slave_iomux);
if (pset->slave_iomux) {
//only in this case, use VSPI iomux pins
buscfg.miso_io_num = spi_periph_signal[VSPI_HOST].spiq_iomux_pin;
buscfg.mosi_io_num = spi_periph_signal[VSPI_HOST].spid_iomux_pin;
buscfg.sclk_io_num = spi_periph_signal[VSPI_HOST].spiclk_iomux_pin;
devcfg.spics_io_num = spi_periph_signal[VSPI_HOST].spics0_iomux_pin;
slvcfg.spics_io_num = spi_periph_signal[VSPI_HOST].spics0_iomux_pin;
} else {
buscfg.miso_io_num = spi_periph_signal[HSPI_HOST].spiq_iomux_pin;
buscfg.mosi_io_num = spi_periph_signal[HSPI_HOST].spid_iomux_pin;
buscfg.sclk_io_num = spi_periph_signal[HSPI_HOST].spiclk_iomux_pin;
devcfg.spics_io_num = spi_periph_signal[HSPI_HOST].spics0_iomux_pin;
slvcfg.spics_io_num = spi_periph_signal[HSPI_HOST].spics0_iomux_pin;
}
//this does nothing, but avoid the driver from using iomux pins if required
buscfg.quadhd_io_num = (!pset->master_iomux && !pset->slave_iomux ? spi_periph_signal[VSPI_HOST].spiq_iomux_pin : -1);
devcfg.mode = pset->mode;
const int cs_pretrans_max = 15;
if (pset->dup == HALF_DUPLEX_MISO) {
devcfg.cs_ena_pretrans = cs_pretrans_max;
devcfg.flags |= SPI_DEVICE_HALFDUPLEX;
} else if (pset->dup == HALF_DUPLEX_MOSI) {
devcfg.cs_ena_pretrans = cs_pretrans_max;
devcfg.flags |= SPI_DEVICE_NO_DUMMY;
} else {
devcfg.cs_ena_pretrans = cs_pretrans_max;
}
const int cs_posttrans_max = 15;
devcfg.cs_ena_posttrans = cs_posttrans_max;
devcfg.input_delay_ns = pset->slave_tv_ns;
devcfg.clock_speed_hz = freq;
if (pset->master_limit != 0 && freq > pset->master_limit) devcfg.flags |= SPI_DEVICE_NO_DUMMY;
//slave config
slvcfg.mode = pset->mode;
slave_pull_up(&buscfg, slvcfg.spics_io_num);
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, pset->master_dma_chan));
TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devcfg, spi));
//slave automatically use iomux pins if pins are on VSPI_* pins
buscfg.quadhd_io_num = -1;
TEST_ESP_OK(spi_slave_initialize(TEST_SLAVE_HOST, &buscfg, &slvcfg, pset->slave_dma_chan));
//initialize master and slave on the same pins break some of the output configs, fix them
if (pset->master_iomux) {
spitest_gpio_output_sel(buscfg.mosi_io_num, FUNC_SPI, spi_periph_signal[HSPI_HOST].spid_out);
spitest_gpio_output_sel(buscfg.miso_io_num, FUNC_GPIO, spi_periph_signal[VSPI_HOST].spiq_out);
spitest_gpio_output_sel(devcfg.spics_io_num, FUNC_SPI, spi_periph_signal[HSPI_HOST].spics_out[0]);
spitest_gpio_output_sel(buscfg.sclk_io_num, FUNC_SPI, spi_periph_signal[HSPI_HOST].spiclk_out);
} else if (pset->slave_iomux) {
spitest_gpio_output_sel(buscfg.mosi_io_num, FUNC_GPIO, spi_periph_signal[HSPI_HOST].spid_out);
spitest_gpio_output_sel(buscfg.miso_io_num, FUNC_SPI, spi_periph_signal[VSPI_HOST].spiq_out);
spitest_gpio_output_sel(devcfg.spics_io_num, FUNC_GPIO, spi_periph_signal[HSPI_HOST].spics_out[0]);
spitest_gpio_output_sel(buscfg.sclk_io_num, FUNC_GPIO, spi_periph_signal[HSPI_HOST].spiclk_out);
} else {
spitest_gpio_output_sel(buscfg.mosi_io_num, FUNC_GPIO, spi_periph_signal[HSPI_HOST].spid_out);
spitest_gpio_output_sel(buscfg.miso_io_num, FUNC_GPIO, spi_periph_signal[VSPI_HOST].spiq_out);
spitest_gpio_output_sel(devcfg.spics_io_num, FUNC_GPIO, spi_periph_signal[HSPI_HOST].spics_out[0]);
spitest_gpio_output_sel(buscfg.sclk_io_num, FUNC_GPIO, spi_periph_signal[HSPI_HOST].spiclk_out);
}
//prepare slave tx data
for (int k = 0; k < pset->test_size; k++)
xQueueSend(context->slave_context.data_to_send, &context->slave_trans[k], portMAX_DELAY);
//clear master receive buffer
memset(context->master_rxbuf, 0x66, sizeof(context->master_rxbuf));
}
static void local_test_loop(const void* arg1, void* arg2)
{
const spitest_param_set_t *pset = arg1;
spitest_context_t *context = arg2;
spi_device_handle_t spi;
spitest_init_transactions(pset, context);
const int *timing_speed_array = pset->freq_list;
ESP_LOGI(MASTER_TAG, "****************** %s ***************", pset->pset_name);
for (int i = 0; ; i++) {
const int freq = timing_speed_array[i];
if (freq==0) break;
if (pset->freq_limit && freq > pset->freq_limit) break;
ESP_LOGI(MASTER_TAG, "======> %dk", freq / 1000);
local_test_start(&spi, freq, pset, context);
for (int k = 0; k < pset->test_size; k++) {
//wait for both master and slave end
ESP_LOGI(MASTER_TAG, "=> test%d", k);
//send master tx data
vTaskDelay(9);
spi_transaction_t *t = &context->master_trans[k];
TEST_ESP_OK(spi_device_transmit(spi, t));
int len = get_trans_len(pset->dup, t);
spitest_master_print_data(t, len);
size_t rcv_len;
slave_rxdata_t *rcv_data = xRingbufferReceive(context->slave_context.data_received, &rcv_len, portMAX_DELAY);
spitest_slave_print_data(rcv_data, true);
//check result
bool check_master_data = (pset->dup!=HALF_DUPLEX_MOSI &&
(pset->master_limit==0 || freq <= pset->master_limit));
bool check_slave_data = (pset->dup!=HALF_DUPLEX_MISO);
const bool check_len = true;
if (!check_master_data) ESP_LOGI(MASTER_TAG, "skip master data check");
if (!check_slave_data) ESP_LOGI(SLAVE_TAG, "skip slave data check");
TEST_ESP_OK(spitest_check_data(len, t, rcv_data, check_master_data, check_len, check_slave_data));
//clean
vRingbufferReturnItem(context->slave_context.data_received, rcv_data);
}
master_free_device_bus(spi);
TEST_ASSERT(spi_slave_free(TEST_SLAVE_HOST) == ESP_OK);
}
}
/************ Timing Test ***********************************************/
static spitest_param_set_t timing_pgroup[] = {
{ .pset_name = "FULL_DUP, MASTER IOMUX",
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
.master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX,
.master_iomux = true,
.slave_iomux = false,
.slave_tv_ns = TV_INT_CONNECT_GPIO,
},
{ .pset_name = "FULL_DUP, SLAVE IOMUX",
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
.master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
},
{ .pset_name = "FULL_DUP, BOTH GPIO",
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
.master_limit = SPI_MASTER_FREQ_10M,
.dup = FULL_DUPLEX,
.master_iomux = false,
.slave_iomux = false,
.slave_tv_ns = TV_INT_CONNECT_GPIO,
},
{ .pset_name = "MISO_DUP, MASTER IOMUX",
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
.master_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
.dup = HALF_DUPLEX_MISO,
.master_iomux = true,
.slave_iomux = false,
.slave_tv_ns = TV_INT_CONNECT_GPIO+12.5,
//for freq lower than 20M, the delay is 60(62.5)ns, however, the delay becomes 75ns over 26M
},
{ .pset_name = "MISO_DUP, SLAVE IOMUX",
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
//.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
.dup = HALF_DUPLEX_MISO,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT+12.5,
//for freq lower than 20M, the delay is 60(62.5)ns, however, the delay becomes 75ns over 26M
},
{ .pset_name = "MISO_DUP, BOTH GPIO",
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
//.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
.dup = HALF_DUPLEX_MISO,
.master_iomux = false,
.slave_iomux = false,
.slave_tv_ns = TV_INT_CONNECT_GPIO+12.5,
//for freq lower than 20M, the delay is 60(62.5)ns, however, the delay becomes 75ns over 26M
},
{ .pset_name = "MOSI_DUP, MASTER IOMUX",
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
//.freq_limit = ESP_SPI_SLAVE_MAX_READ_FREQ, //ESP_SPI_SLAVE_MAX_FREQ_SYNC,
.dup = HALF_DUPLEX_MOSI,
.master_iomux = true,
.slave_iomux = false,
.slave_tv_ns = TV_INT_CONNECT_GPIO,
},
{ .pset_name = "MOSI_DUP, SLAVE IOMUX",
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
//.freq_limit = ESP_SPI_SLAVE_MAX_READ_FREQ, //ESP_SPI_SLAVE_MAX_FREQ_SYNC,
.dup = HALF_DUPLEX_MOSI,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
},
{ .pset_name = "MOSI_DUP, BOTH GPIO",
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
//.freq_limit = ESP_SPI_SLAVE_MAX_READ_FREQ, //ESP_SPI_SLAVE_MAX_FREQ_SYNC,
.dup = HALF_DUPLEX_MOSI,
.master_iomux = false,
.slave_iomux = false,
.slave_tv_ns = TV_INT_CONNECT_GPIO,
},
};
TEST_SPI_LOCAL(TIMING, timing_pgroup)
/************ Mode Test ***********************************************/
#define FREQ_LIMIT_MODE SPI_MASTER_FREQ_16M
static int test_freq_mode_local[]={
1*1000*1000,
SPI_MASTER_FREQ_9M, //maximum freq MISO stable before next latch edge
SPI_MASTER_FREQ_13M,
SPI_MASTER_FREQ_16M,
SPI_MASTER_FREQ_20M,
SPI_MASTER_FREQ_26M,
SPI_MASTER_FREQ_40M,
0,
};
static spitest_param_set_t mode_pgroup[] = {
{ .pset_name = "Mode 0",
.freq_list = test_freq_mode_local,
.master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX,
.mode = 0,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
},
{ .pset_name = "Mode 1",
.freq_list = test_freq_mode_local,
.freq_limit = SPI_MASTER_FREQ_26M,
.master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX,
.mode = 1,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
},
{ .pset_name = "Mode 2",
.freq_list = test_freq_mode_local,
.master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX,
.mode = 2,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
},
{ .pset_name = "Mode 3",
.freq_list = test_freq_mode_local,
.freq_limit = SPI_MASTER_FREQ_26M,
.master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX,
.mode = 3,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
},
{ .pset_name = "Mode 0, DMA",
.freq_list = test_freq_mode_local,
.master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX,
.mode = 0,
.slave_dma_chan = 2,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT, //at 16M, the MISO delay (-0.5T+(3+2)apb) equals to non-DMA mode delay (3apb).
.length_aligned = true,
},
{ .pset_name = "Mode 1, DMA",
.freq_list = test_freq_mode_local,
.freq_limit = SPI_MASTER_FREQ_26M,
.master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX,
.mode = 1,
.slave_dma_chan = 2,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
.length_aligned = true,
},
{ .pset_name = "Mode 2, DMA",
.freq_list = test_freq_mode_local,
.master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX,
.mode = 2,
.slave_dma_chan = 2,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT, //at 16M, the MISO delay (-0.5T+(3+2)apb) equals to non-DMA mode delay (3apb).
.length_aligned = true,
},
{ .pset_name = "Mode 3, DMA",
.freq_list = test_freq_mode_local,
.freq_limit = SPI_MASTER_FREQ_26M,
.master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX,
.mode = 3,
.slave_dma_chan = 2,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
.length_aligned = true,
},
// MISO ////////////////////////////////////
{ .pset_name = "MISO, Mode 0",
.freq_list = test_freq_mode_local,
.dup = HALF_DUPLEX_MISO,
.mode = 0,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
},
{ .pset_name = "MISO, Mode 1",
.freq_list = test_freq_mode_local,
.dup = HALF_DUPLEX_MISO,
.mode = 1,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
},
{ .pset_name = "MISO, Mode 2",
.freq_list = test_freq_mode_local,
.dup = HALF_DUPLEX_MISO,
.mode = 2,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
},
{ .pset_name = "MISO, Mode 3",
.freq_list = test_freq_mode_local,
.dup = HALF_DUPLEX_MISO,
.mode = 3,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
},
{ .pset_name = "MISO, Mode 0, DMA",
.freq_list = test_freq_mode_local,
.dup = HALF_DUPLEX_MISO,
.mode = 0,
.slave_dma_chan = 2,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT+12.5, //at 16M, the MISO delay (-0.5T+(3+2)apb) equals to non-DMA mode delay (3apb).
.length_aligned = true,
},
{ .pset_name = "MISO, Mode 1, DMA",
.freq_list = test_freq_mode_local,
.dup = HALF_DUPLEX_MISO,
.mode = 1,
.slave_dma_chan = 2,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
.length_aligned = true,
},
{ .pset_name = "MISO, Mode 2, DMA",
.freq_list = test_freq_mode_local,
.dup = HALF_DUPLEX_MISO,
.mode = 2,
.slave_dma_chan = 2,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT+12.5, //at 16M, the MISO delay (-0.5T+(3+2)apb) equals to non-DMA mode delay (3apb).
.length_aligned = true,
},
{ .pset_name = "MISO, Mode 3, DMA",
.freq_list = test_freq_mode_local,
.dup = HALF_DUPLEX_MISO,
.mode = 3,
.slave_dma_chan = 2,
.master_iomux = false,
.slave_iomux = true,
.slave_tv_ns = TV_INT_CONNECT,
.length_aligned = true,
},
};
TEST_SPI_LOCAL(MODE, mode_pgroup)

105
components/driver/test/test_spi_sio.c
View file

@ -1,105 +0,0 @@
/*
Tests for the spi sio mode
*/
#include <esp_types.h>
#include <stdio.h>
#include <stdlib.h>
#include <malloc.h>
#include <string.h>
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/semphr.h"
#include "freertos/queue.h"
#include "freertos/xtensa_api.h"
#include "unity.h"
#include "driver/spi_master.h"
#include "driver/spi_slave.h"
#include "esp_heap_caps.h"
#include "esp_log.h"
#include "soc/spi_periph.h"
#include "test_utils.h"
#include "test/test_common_spi.h"
#include "soc/gpio_periph.h"
#include "sdkconfig.h"
#include "hal/spi_ll.h"
/********************************************************************************
* Test SIO
********************************************************************************/
TEST_CASE("local test sio", "[spi]")
{
spi_device_handle_t spi;
WORD_ALIGNED_ATTR uint8_t master_rx_buffer[320];
WORD_ALIGNED_ATTR uint8_t slave_rx_buffer[320];
uint32_t padding[16];
for (int i = 0; i < 16; i++)
padding[i] = 0xcccccccc;;
spi_ll_write_buffer(SPI_LL_GET_HW(TEST_SPI_HOST), (uint8_t*)&padding, 8*64);
spi_ll_write_buffer(SPI_LL_GET_HW(TEST_SLAVE_HOST), (uint8_t*)&padding, 8*64);
/* This test use a strange connection to test the SIO mode:
* master spid -> slave spid
* slave spiq -> master spid
*/
spi_bus_config_t bus_cfg = SPI_BUS_TEST_DEFAULT_CONFIG();
spi_device_interface_config_t dev_cfg = SPI_DEVICE_TEST_DEFAULT_CONFIG();
spi_slave_interface_config_t slv_cfg = SPI_SLAVE_TEST_DEFAULT_CONFIG();
slv_cfg.spics_io_num = dev_cfg.spics_io_num;
TEST_ESP_OK(spi_slave_initialize(TEST_SLAVE_HOST, &bus_cfg, &slv_cfg, 0));
int miso_io_num = bus_cfg.miso_io_num;
int mosi_io_num = bus_cfg.mosi_io_num;
bus_cfg.mosi_io_num = bus_cfg.miso_io_num;
bus_cfg.miso_io_num = -1;
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &bus_cfg, 0));
dev_cfg.flags = SPI_DEVICE_HALFDUPLEX | SPI_DEVICE_3WIRE;
TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &dev_cfg, &spi));
spitest_gpio_output_sel(mosi_io_num, FUNC_GPIO, spi_periph_signal[TEST_SPI_HOST].spid_out);
spitest_gpio_output_sel(miso_io_num, FUNC_GPIO, spi_periph_signal[TEST_SLAVE_HOST].spiq_out);
spitest_gpio_output_sel(dev_cfg.spics_io_num, FUNC_GPIO, spi_periph_signal[TEST_SPI_HOST].spics_out[0]);
spitest_gpio_output_sel(bus_cfg.sclk_io_num, FUNC_GPIO, spi_periph_signal[TEST_SPI_HOST].spiclk_out);
for (int i = 0; i < 8; i ++) {
int tlen = i*2+1;
int rlen = 9-i;
ESP_LOGI(MASTER_TAG, "=========== TEST%d ==========", i);
spi_transaction_t master_t = {
.length = tlen*8,
.tx_buffer = spitest_master_send+i,
.rxlength = rlen*8,
.rx_buffer = master_rx_buffer+i,
};
spi_slave_transaction_t slave_t = {
.length = (tlen+rlen)*8,
.tx_buffer = spitest_slave_send+i,
.rx_buffer = slave_rx_buffer,
};
memset(master_rx_buffer, 0x66, sizeof(master_rx_buffer));
memset(slave_rx_buffer, 0x66, sizeof(slave_rx_buffer));
TEST_ESP_OK(spi_slave_queue_trans(TEST_SLAVE_HOST, &slave_t, portMAX_DELAY));
TEST_ESP_OK(spi_device_transmit(spi, &master_t));
spi_slave_transaction_t* ret_t;
TEST_ESP_OK(spi_slave_get_trans_result(TEST_SLAVE_HOST, &ret_t, portMAX_DELAY));
TEST_ASSERT(ret_t == &slave_t);
ESP_LOG_BUFFER_HEXDUMP("master tx", master_t.tx_buffer, tlen, ESP_LOG_INFO);
ESP_LOG_BUFFER_HEXDUMP("slave rx", slave_t.rx_buffer, tlen+rlen, ESP_LOG_INFO);
ESP_LOG_BUFFER_HEXDUMP("slave tx", slave_t.tx_buffer, tlen+rlen, ESP_LOG_INFO);
ESP_LOG_BUFFER_HEXDUMP("master rx", master_t.rx_buffer, rlen, ESP_LOG_INFO);
TEST_ASSERT_EQUAL_HEX8_ARRAY(master_t.tx_buffer, slave_t.rx_buffer, tlen);
TEST_ASSERT_EQUAL_HEX8_ARRAY(slave_t.tx_buffer + tlen, master_t.rx_buffer, rlen);
}
spi_slave_free(TEST_SLAVE_HOST);
master_free_device_bus(spi);
}

2
components/esp_event/test/test_event.c
View file

@ -838,7 +838,7 @@ TEST_CASE("performance test - dedicated task", "[event]")
performance_test(true);
}
TEST_CASE("performance test - no dedicated task", "[event]")
TEST_CASE_ESP32("performance test - no dedicated task", "[event]")
{
performance_test(false);
}

2
components/heap/test/test_leak.c
View file

@ -57,4 +57,4 @@ static void test_fn3(void)
check_calloc(7000);
}
TEST_CASE_MULTIPLE_STAGES("Check for leaks in MULTIPLE_STAGES mode (manual reset)", "[heap][leaks][reset=SW_CPU_RESET, SW_CPU_RESET]", test_fn2, test_fn2, test_fn3);
TEST_CASE_MULTIPLE_STAGES_ESP32("Check for leaks in MULTIPLE_STAGES mode (manual reset)", "[heap][leaks][reset=SW_CPU_RESET, SW_CPU_RESET]", test_fn2, test_fn2, test_fn3);

2
components/heap/test/test_malloc_caps.c
View file

@ -11,7 +11,7 @@
#include <stdlib.h>
#include <sys/param.h>
TEST_CASE("Capabilities allocator test", "[heap]")
TEST_CASE_ESP32("Capabilities allocator test", "[heap]")
{
char *m1, *m2[10];
int x;

2
components/heap/test/test_realloc.c
View file

@ -22,7 +22,7 @@ TEST_CASE("realloc shrink buffer in place", "[heap]")
#endif
TEST_CASE("realloc move data to a new heap type", "[heap]")
TEST_CASE_ESP32("realloc move data to a new heap type", "[heap]")
{
const char *test = "I am some test content to put in the heap";
char buf[64];

2
components/libsodium/test/test_sodium.c
View file

@ -39,7 +39,7 @@ TEST_CASE("box tests", "[libsodium]")
extern int ed25519_convert_xmain(void);
TEST_CASE("ed25519_convert tests", "[libsodium][timeout=60]")
TEST_CASE_ESP32("ed25519_convert tests", "[libsodium][timeout=60]")
{
printf("Running ed25519_convert\n");
TEST_ASSERT_EQUAL(0, ed25519_convert_xmain() );

4
components/mbedtls/test/test_ecp.c
View file

@ -21,7 +21,7 @@
error hex value (mbedTLS uses -N for error codes) */
#define TEST_ASSERT_MBEDTLS_OK(X) TEST_ASSERT_EQUAL_HEX32(0, -(X))
TEST_CASE("mbedtls ECDH Generate Key", "[mbedtls]")
TEST_CASE_ESP32("mbedtls ECDH Generate Key", "[mbedtls]")
{
mbedtls_ecdh_context ctx;
mbedtls_entropy_context entropy;
@ -48,7 +48,7 @@ TEST_CASE("mbedtls ECP self-tests", "[mbedtls]")
TEST_ASSERT_EQUAL(0, mbedtls_ecp_self_test(1));
}
TEST_CASE("mbedtls ECP mul w/ koblitz", "[mbedtls]")
TEST_CASE_ESP32("mbedtls ECP mul w/ koblitz", "[mbedtls]")
{
/* Test case code via https://github.com/espressif/esp-idf/issues/1556 */
mbedtls_entropy_context ctxEntropy;

4
components/mbedtls/test/test_mbedtls_mpi.c
View file

@ -143,7 +143,7 @@ static bool test_bignum_modexp(const char *z_str, const char *x_str, const char
if (ret_error != mbedtls_mpi_exp_mod(&Z, &X, &Y, &M, NULL)) {
fail = true;
}
if (ret_error == MBEDTLS_OK) {
mbedtls_mpi_write_string(&Z, 16, z_buf, sizeof(z_buf)-1, &z_buf_len);
if (memcmp(z_str, z_buf, strlen(z_str)) != 0) {
@ -165,7 +165,7 @@ static bool test_bignum_modexp(const char *z_str, const char *x_str, const char
return fail;
}
TEST_CASE("test MPI modexp", "[bignum]")
TEST_CASE_ESP32("test MPI modexp", "[bignum]")
{
bool test_error = false;
printf("Z = (X ^ Y) mod M \n");

14
components/mbedtls/test/test_mbedtls_sha.c
View file

@ -15,7 +15,7 @@
#include "sdkconfig.h"
#include "test_apb_dport_access.h"
TEST_CASE("mbedtls SHA self-tests", "[mbedtls]")
TEST_CASE_ESP32("mbedtls SHA self-tests", "[mbedtls]")
{
start_apb_access_loop();
TEST_ASSERT_FALSE_MESSAGE(mbedtls_sha1_self_test(1), "SHA1 self-tests should pass.");
@ -121,7 +121,7 @@ static void tskRunSHA256Test(void *pvParameters)
#define SHA_TASK_STACK_SIZE (10*1024)
TEST_CASE("mbedtls SHA multithreading", "[mbedtls]")
TEST_CASE_ESP32("mbedtls SHA multithreading", "[mbedtls]")
{
done_sem = xSemaphoreCreateCounting(4, 0);
xTaskCreate(tskRunSHA1Test, "SHA1Task1", SHA_TASK_STACK_SIZE, NULL, 3, NULL);
@ -164,7 +164,7 @@ void tskRunSHASelftests(void *param)
vTaskDelete(NULL);
}
TEST_CASE("mbedtls SHA self-tests multithreaded", "[mbedtls]")
TEST_CASE_ESP32("mbedtls SHA self-tests multithreaded", "[mbedtls]")
{
done_sem = xSemaphoreCreateCounting(2, 0);
xTaskCreate(tskRunSHASelftests, "SHASelftests1", SHA_TASK_STACK_SIZE, NULL, 3, NULL);
@ -180,7 +180,7 @@ TEST_CASE("mbedtls SHA self-tests multithreaded", "[mbedtls]")
vSemaphoreDelete(done_sem);
}
TEST_CASE("mbedtls SHA512 clone", "[mbedtls]")
TEST_CASE_ESP32("mbedtls SHA512 clone", "[mbedtls]")
{
mbedtls_sha512_context ctx;
mbedtls_sha512_context clone;
@ -205,7 +205,7 @@ TEST_CASE("mbedtls SHA512 clone", "[mbedtls]")
TEST_ASSERT_EQUAL_MEMORY_MESSAGE(sha512_thousand_bs, sha512, 64, "SHA512 cloned calculation");
}
TEST_CASE("mbedtls SHA384 clone", "[mbedtls]")
TEST_CASE_ESP32("mbedtls SHA384 clone", "[mbedtls]")
{
mbedtls_sha512_context ctx;
mbedtls_sha512_context clone;
@ -231,7 +231,7 @@ TEST_CASE("mbedtls SHA384 clone", "[mbedtls]")
}
TEST_CASE("mbedtls SHA256 clone", "[mbedtls]")
TEST_CASE_ESP32("mbedtls SHA256 clone", "[mbedtls]")
{
mbedtls_sha256_context ctx;
mbedtls_sha256_context clone;
@ -276,7 +276,7 @@ static void tskFinaliseSha(void *v_param)
vTaskDelete(NULL);
}
TEST_CASE("mbedtls SHA session passed between tasks" , "[mbedtls]")
TEST_CASE_ESP32("mbedtls SHA session passed between tasks" , "[mbedtls]")
{
finalise_sha_param_t param = { 0 };

2
components/newlib/test/test_time.c
View file

@ -423,7 +423,7 @@ void test_posix_timers_clock (void)
#endif // defined( WITH_FRC ) || defined( WITH_RTC )
}
TEST_CASE("test posix_timers clock_... functions", "[newlib]")
TEST_CASE_ESP32("test posix_timers clock_... functions", "[newlib]")
{
test_posix_timers_clock();
}

12
components/protocomm/test/test_protocomm.c
View file

@ -1098,7 +1098,7 @@ static esp_err_t test_security0 (void)
return ESP_OK;
}
TEST_CASE("leak test", "[PROTOCOMM]")
TEST_CASE_ESP32("leak test", "[PROTOCOMM]")
{
#ifdef CONFIG_HEAP_TRACING
heap_trace_init_standalone(trace_record, NUM_RECORDS);
@ -1144,17 +1144,17 @@ TEST_CASE("security 0 basic test", "[PROTOCOMM]")
TEST_ASSERT(test_security0() == ESP_OK);
}
TEST_CASE("security 1 basic test", "[PROTOCOMM]")
TEST_CASE_ESP32("security 1 basic test", "[PROTOCOMM]")
{
TEST_ASSERT(test_security1() == ESP_OK);
}
TEST_CASE("security 1 no encryption test", "[PROTOCOMM]")
TEST_CASE_ESP32("security 1 no encryption test", "[PROTOCOMM]")
{
TEST_ASSERT(test_security1_no_encryption() == ESP_OK);
}
TEST_CASE("security 1 session overflow test", "[PROTOCOMM]")
TEST_CASE_ESP32("security 1 session overflow test", "[PROTOCOMM]")
{
TEST_ASSERT(test_security1_session_overflow() == ESP_OK);
}
@ -1164,12 +1164,12 @@ TEST_CASE("security 1 wrong pop test", "[PROTOCOMM]")
TEST_ASSERT(test_security1_wrong_pop() == ESP_OK);
}
TEST_CASE("security 1 insecure client test", "[PROTOCOMM]")
TEST_CASE_ESP32("security 1 insecure client test", "[PROTOCOMM]")
{
TEST_ASSERT(test_security1_insecure_client() == ESP_OK);
}
TEST_CASE("security 1 weak session test", "[PROTOCOMM]")
TEST_CASE_ESP32("security 1 weak session test", "[PROTOCOMM]")
{
TEST_ASSERT(test_security1_weak_session() == ESP_OK);
}

0
components/spi_flash/test/test_partition_ext.c → components/spi_flash/test/esp32/test_partition_ext.c
View file

10
components/spi_flash/test/test_mmap.c
View file

@ -75,7 +75,7 @@ static void setup_mmap_tests(void)
}
}
TEST_CASE("Can mmap into data address space", "[spi_flash]")
TEST_CASE_ESP32("Can mmap into data address space", "[spi_flash]")
{
setup_mmap_tests();
@ -135,7 +135,7 @@ TEST_CASE("Can mmap into data address space", "[spi_flash]")
TEST_ASSERT_EQUAL_PTR(NULL, spi_flash_phys2cache(start, SPI_FLASH_MMAP_DATA));
}
TEST_CASE("Can mmap into instruction address space", "[mmap]")
TEST_CASE_ESP32("Can mmap into instruction address space", "[mmap]")
{
setup_mmap_tests();
@ -183,7 +183,7 @@ TEST_CASE("Can mmap into instruction address space", "[mmap]")
}
TEST_CASE("Can mmap unordered pages into contiguous memory", "[spi_flash]")
TEST_CASE_ESP32("Can mmap unordered pages into contiguous memory", "[spi_flash]")
{
int nopages;
int *pages;
@ -324,7 +324,7 @@ TEST_CASE("flash_mmap can mmap after get enough free MMU pages", "[spi_flash]")
TEST_ASSERT_EQUAL_PTR(NULL, spi_flash_phys2cache(start, SPI_FLASH_MMAP_DATA));
}
TEST_CASE("phys2cache/cache2phys basic checks", "[spi_flash]")
TEST_CASE_ESP32("phys2cache/cache2phys basic checks", "[spi_flash]")
{
uint8_t buf[64];
@ -401,7 +401,7 @@ TEST_CASE("munmap followed by mmap flushes cache", "[spi_flash]")
TEST_ASSERT_NOT_EQUAL(0, memcmp(buf, data, sizeof(buf)));
}
TEST_CASE("no stale data read post mmap and write partition", "[spi_flash]")
TEST_CASE_ESP32("no stale data read post mmap and write partition", "[spi_flash]")
{
const char buf[] = "Test buffer data for partition";
char read_data[sizeof(buf)];

2
components/spi_flash/test/test_read_write.c
View file

@ -167,7 +167,7 @@ static void IRAM_ATTR test_write(int dst_off, int src_off, int len)
TEST_ASSERT_EQUAL_INT(cmp_or_dump(dst_buf, dst_gold, sizeof(dst_buf)), 0);
}
TEST_CASE("Test spi_flash_write", "[spi_flash][esp_flash]")
TEST_CASE_ESP32("Test spi_flash_write", "[spi_flash][esp_flash]")
{
setup_tests();
#if CONFIG_SPI_FLASH_MINIMAL_TEST

13
components/unity/include/unity_test_runner.h
View file

@ -130,6 +130,8 @@ void unity_testcase_register(test_desc_t* desc);
unity_testcase_register( & UNITY_TEST_UID(test_desc_) ); \
}
/*
* First argument is a free-form description,
* second argument is (by convention) a list of identifiers, each one in square brackets.
@ -172,3 +174,14 @@ void unity_run_all_tests(void);
void unity_run_menu(void);
#include "sdkconfig.h"
#if CONFIG_IDF_TARGET_ESP32
#define TEST_CASE_ESP32(...) TEST_CASE(__VA_ARGS__)
#define TEST_CASE_MULTIPLE_STAGES_ESP32(...) TEST_CASE_MULTIPLE_STAGES(__VA_ARGS__)
#define TEST_CASE_MULTIPLE_DEVICES_ESP32(...) TEST_CASE_MULTIPLE_DEVICES(__VA_ARGS__)
#else
#define TEST_CASE_ESP32(...) __attribute__((unused)) static void UNITY_TEST_UID(test_func_) (void)
#define TEST_CASE_MULTIPLE_STAGES_ESP32(_, __, ...) __attribute__((unused)) static test_func UNITY_TEST_UID(test_functions)[] = {__VA_ARGS__};
#define TEST_CASE_MULTIPLE_DEVICES_ESP32(_, __, ...) __attribute__((unused)) static test_func UNITY_TEST_UID(test_functions)[] = {__VA_ARGS__};
#endif

2
components/vfs/test/test_vfs_fd.c
View file

@ -232,7 +232,7 @@ static int time_test_vfs_write(int fd, const void *data, size_t size)
return size;
}
TEST_CASE("Open & write & close through VFS passes performance test", "[vfs]")
TEST_CASE_ESP32("Open & write & close through VFS passes performance test", "[vfs]")
{
esp_vfs_t desc = {
.flags = ESP_VFS_FLAG_DEFAULT,

2
components/wpa_supplicant/test/test_crypto.c
View file

@ -23,7 +23,7 @@
#include "mbedtls/ecp.h"
typedef struct crypto_bignum crypto_bignum;
TEST_CASE("Test crypto lib bignum apis", "[wpa_crypto]")
TEST_CASE_ESP32("Test crypto lib bignum apis", "[wpa_crypto]")
{
{

2
tools/ci/config/target-test.yml
View file

@ -414,7 +414,7 @@ UT_030:
UT_031:
extends: .unit_test_template
parallel: 34
parallel: 28
tags:
- 7.2.2
- UT_T1_1