diff --git a/Kconfig b/Kconfig index 73770a79a..11ea099de 100644 --- a/Kconfig +++ b/Kconfig @@ -7,18 +7,18 @@ mainmenu "Espressif IoT Development Framework Configuration" menu "SDK tool configuration" config TOOLPREFIX - string "Compiler toolchain path/prefix" - default "xtensa-esp32-elf-" - help - The prefix/path that is used to call the toolchain. The default setting assumes - a crosstool-ng gcc setup that is in your PATH. + string "Compiler toolchain path/prefix" + default "xtensa-esp32-elf-" + help + The prefix/path that is used to call the toolchain. The default setting assumes + a crosstool-ng gcc setup that is in your PATH. config PYTHON string "Python 2 interpreter" - default "python" - help - The executable name/path that is used to run python. On some systems Python 2.x - may need to be invoked as python2. + default "python" + help + The executable name/path that is used to run python. On some systems Python 2.x + may need to be invoked as python2. endmenu source "$COMPONENT_KCONFIGS_PROJBUILD" diff --git a/components/bootloader/src/main/bootloader_config.h b/components/bootloader/src/main/bootloader_config.h index 7ad97af67..709ff41b1 100644 --- a/components/bootloader/src/main/bootloader_config.h +++ b/components/bootloader/src/main/bootloader_config.h @@ -30,6 +30,10 @@ extern "C" #define IROM_HIGH 0x40400000 #define DROM_LOW 0x3F400000 #define DROM_HIGH 0x3F800000 +#define RTC_IRAM_LOW 0x400C0000 +#define RTC_IRAM_HIGH 0x400C2000 +#define RTC_DATA_LOW 0x50000000 +#define RTC_DATA_HIGH 0x50002000 /*spi mode,saved in third byte in flash */ enum { diff --git a/components/bootloader/src/main/bootloader_start.c b/components/bootloader/src/main/bootloader_start.c index 6b3298c29..e0ab7f9e2 100644 --- a/components/bootloader/src/main/bootloader_start.c +++ b/components/bootloader/src/main/bootloader_start.c @@ -22,6 +22,7 @@ #include "rom/ets_sys.h" #include "rom/spi_flash.h" #include "rom/crc.h" +#include "rom/rtc.h" #include "soc/soc.h" #include "soc/cpu.h" @@ -362,11 +363,15 @@ void unpack_load_app(const partition_pos_t* partition) uint32_t irom_load_addr = 0; uint32_t irom_size = 0; + /* Reload the RTC memory sections whenever a non-deepsleep reset + is occuring */ + bool load_rtc_memory = rtc_get_reset_reason(0) != DEEPSLEEP_RESET; + ESP_LOGD(TAG, "bin_header: %u %u %u %u %08x", image_header.magic, - image_header.blocks, - image_header.spi_mode, - image_header.spi_size, - (unsigned)image_header.entry_addr); + image_header.blocks, + image_header.spi_mode, + image_header.spi_size, + (unsigned)image_header.entry_addr); for (uint32_t section_index = 0; section_index < image_header.blocks; @@ -406,7 +411,18 @@ void unpack_load_app(const partition_pos_t* partition) map = true; } - ESP_LOGI(TAG, "section %d: paddr=0x%08x vaddr=0x%08x size=0x%05x (%6d) %s", section_index, pos, section_header.load_addr, section_header.data_len, section_header.data_len, (load)?"load":(map)?"map":""); + if(!load_rtc_memory && address >= RTC_IRAM_LOW && address < RTC_IRAM_HIGH) { + ESP_LOGD(TAG, "Skipping RTC code section at %08x\n", pos); + load = false; + } + + if(!load_rtc_memory && address >= RTC_DATA_LOW && address < RTC_DATA_HIGH) { + ESP_LOGD(TAG, "Skipping RTC data section at %08x\n", pos); + load = false; + } + + ESP_LOGI(TAG, "section %d: paddr=0x%08x vaddr=0x%08x size=0x%05x (%6d) %s", section_index, pos, + section_header.load_addr, section_header.data_len, section_header.data_len, (load)?"load":(map)?"map":""); if (!load) { pos += section_header.data_len; diff --git a/components/bt/Kconfig b/components/bt/Kconfig index ab163efc6..e43ff864d 100644 --- a/components/bt/Kconfig +++ b/components/bt/Kconfig @@ -3,21 +3,27 @@ visible if MEMMAP_BT config BT_ENABLED - bool - depends on ESP32_ENABLE_STACK_BT - help - This compiles in the low-level BT stack. + bool + depends on ESP32_ENABLE_STACK_BT + help + This compiles in the low-level BT stack. #config BT_BTLE -# bool "Enable BTLE" -# depends on BT_ENABLED -# help -# This compiles BTLE support +# bool "Enable BTLE" +# depends on BT_ENABLED +# help +# This compiles BTLE support # #config BT_BT -# bool "Enable classic BT" -# depends on BT_ENABLED -# help -# This enables classic BT support +# bool "Enable classic BT" +# depends on BT_ENABLED +# help +# This enables classic BT support endmenu + +# Memory reserved at start of DRAM for Bluetooth stack +config BT_RESERVE_DRAM + hex + default 0x10000 if MEMMAP_BT + default 0 diff --git a/components/esp32/Kconfig b/components/esp32/Kconfig index a43d16d2c..535df23eb 100644 --- a/components/esp32/Kconfig +++ b/components/esp32/Kconfig @@ -63,6 +63,12 @@ config MEMMAP_TRACEMEM of memory that can't be used for general purposes anymore. Disable this if you do not know what this is. +# Memory to reverse for trace, used in linker script +config TRACEMEM_RESERVE_DRAM + hex + default 0x8000 if MEMMAP_TRACEMEM + default 0x0 + config MEMMAP_SPISRAM bool "Use external SPI SRAM chip as main memory" default "n" @@ -78,7 +84,7 @@ config WIFI_ENABLED help This compiles in the low-level WiFi stack. - Temporarily, this option is not compatible with BT stack. + Temporarily, this option is not compatible with BT stack. config SYSTEM_EVENT_QUEUE_SIZE int "System event queue size" @@ -101,13 +107,37 @@ config MAIN_TASK_STACK_SIZE config NEWLIB_STDOUT_ADDCR - bool "Standard-out output adds carriage return before newline" - default y - help - Most people are used to end their printf strings with a newline. If this - is sent as is to the serial port, most terminal programs will only move the - cursor one line down, not also move it to the beginning of the line. This - is usually done by an added CR character. Enabling this will make the - standard output code automatically add a CR character before a LF. + bool "Standard-out output adds carriage return before newline" + default y + help + Most people are used to end their printf strings with a newline. If this + is sent as is to the serial port, most terminal programs will only move the + cursor one line down, not also move it to the beginning of the line. This + is usually done by an added CR character. Enabling this will make the + standard output code automatically add a CR character before a LF. + +config ULP_COPROC_ENABLED + bool "Enable Ultra Low Power (ULP) Coprocessor" + default "n" + help + Set to 'y' if you plan to load a firmware for the coprocessor. + + If this option is enabled, further coprocessor configuration will appear in the Components menu. + +config ULP_COPROC_RESERVE_MEM + int "RTC slow memory reserved for coprocessor" + default 512 + range 32 8192 + depends on ULP_COPROC_ENABLED + help + Bytes of memory to reserve for ULP coprocessor firmware & data. + + Data is reserved at the beginning of RTC slow memory. + +# Set CONFIG_ULP_COPROC_RESERVE_MEM to 0 if ULP is disabled +config ULP_COPROC_RESERVE_MEM + int + default 0 + depends on !ULP_COPROC_ENABLED endmenu diff --git a/components/esp32/component.mk b/components/esp32/component.mk index d275898db..223c955d5 100644 --- a/components/esp32/component.mk +++ b/components/esp32/component.mk @@ -12,21 +12,7 @@ COMPONENT_SRCDIRS := . hwcrypto LIBS := crypto core net80211 phy rtc pp wpa wps -ifeq ($(CONFIG_MEMMAP_BT),y) - ifeq ($(CONFIG_MEMMAP_TRACEMEM),y) - LINKER_SCRIPTS = -T esp32.bt.trace.ld - else - LINKER_SCRIPTS = -T esp32.bt.ld - endif -else - ifeq ($(CONFIG_MEMMAP_TRACEMEM),y) - LINKER_SCRIPTS = -T esp32.trace.ld - else - LINKER_SCRIPTS = -T esp32.ld - endif -endif - -LINKER_SCRIPTS += -T esp32.common.ld -T esp32.rom.ld -T esp32.peripherals.ld +LINKER_SCRIPTS += -T esp32_out.ld -T esp32.common.ld -T esp32.rom.ld -T esp32.peripherals.ld COMPONENT_ADD_LDFLAGS := -lesp32 \ $(abspath libhal.a) \ @@ -51,3 +37,14 @@ $(eval $(call SubmoduleRequiredForFiles,$(ALL_LIB_FILES))) # It would be better for components to be able to expose any of these # non-standard dependencies via get_variable, but this will do for now. $(COMPONENT_LIBRARY): $(ALL_LIB_FILES) + +# Preprocess esp32.ld linker script into esp32_out.ld +# +# The library doesn't really depend on esp32_out.ld, but it +# saves us from having to add the target to a Makefile.projbuild +$(COMPONENT_LIBRARY): esp32_out.ld + +esp32_out.ld: $(COMPONENT_PATH)/ld/esp32.ld ../include/sdkconfig.h + $(CC) -I ../include -C -P -x c -E $< -o $@ + +COMPONENT_EXTRA_CLEAN := esp32_out.ld diff --git a/components/esp32/deepsleep.c b/components/esp32/deepsleep.c new file mode 100644 index 000000000..61268bce6 --- /dev/null +++ b/components/esp32/deepsleep.c @@ -0,0 +1,49 @@ +/* Wake from deep sleep stub + + See esp_deepsleep.h esp_wake_deep_sleep() comments for details. +*/ +#include +#include +#include "rom/cache.h" +#include "rom/rtc.h" +#include "soc/rtc_cntl_reg.h" +#include "soc/dport_reg.h" +#include "esp_attr.h" +#include "esp_deepsleep.h" + +/* Updating RTC_MEMORY_CRC_REG register via set_rtc_memory_crc() + is not thread-safe. */ +static _lock_t lock_rtc_memory_crc; + +esp_deep_sleep_wake_stub_fn_t esp_get_deep_sleep_wake_stub(void) +{ + _lock_acquire(&lock_rtc_memory_crc); + uint32_t stored_crc = REG_READ(RTC_MEMORY_CRC_REG); + set_rtc_memory_crc(); + uint32_t calc_crc = REG_READ(RTC_MEMORY_CRC_REG); + REG_WRITE(RTC_MEMORY_CRC_REG, stored_crc); + _lock_release(&lock_rtc_memory_crc); + + if(stored_crc == calc_crc) { + return (esp_deep_sleep_wake_stub_fn_t)REG_READ(RTC_ENTRY_ADDR_REG); + } else { + return NULL; + } +} + +void esp_set_deep_sleep_wake_stub(esp_deep_sleep_wake_stub_fn_t new_stub) +{ + _lock_acquire(&lock_rtc_memory_crc); + REG_WRITE(RTC_ENTRY_ADDR_REG, (uint32_t)new_stub); + set_rtc_memory_crc(); + _lock_release(&lock_rtc_memory_crc); +} + +void RTC_IRAM_ATTR esp_default_wake_deep_sleep(void) { + // + //mmu_init(0); + REG_SET_BIT(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CACHE_MMU_IA_CLR); + REG_CLR_BIT(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CACHE_MMU_IA_CLR); +} + +void __attribute__((weak, alias("esp_default_wake_deep_sleep"))) esp_wake_deep_sleep(void); diff --git a/components/esp32/include/esp_attr.h b/components/esp32/include/esp_attr.h index 18a611489..156d2957f 100644 --- a/components/esp32/include/esp_attr.h +++ b/components/esp32/include/esp_attr.h @@ -17,8 +17,8 @@ #define ROMFN_ATTR //Normally, the linker script will put all code and rodata in flash, -//and all variables in shared RAM. This can be redirected to IRAM if -//needed using these macros. +//and all variables in shared RAM. These macros can be used to redirect +//particular functions/variables to other memory regions. // Forces code into IRAM instead of flash #define IRAM_ATTR __attribute__((section(".iram1"))) @@ -26,4 +26,16 @@ // Forces data into DRAM instead of flash #define DRAM_ATTR __attribute__((section(".dram1"))) +// Forces code into RTC fast memory +#define RTC_IRAM_ATTR __attribute__((section(".rtc.text"))) + +// Forces data into RTC slow memory +// Any variable marked with this attribute will keep its value +// during a deep sleep / wake cycle. +#define RTC_DATA_ATTR __attribute__((section(".rtc.data"))) + +// Forces read-only data into RTC slow memory +// Makes constant data available to RTC wake stubs (see esp_deepsleep.h) +#define RTC_RODATA_ATTR __attribute__((section(".rtc.rodata"))) + #endif /* __ESP_ATTR_H__ */ diff --git a/components/esp32/include/esp_deepsleep.h b/components/esp32/include/esp_deepsleep.h new file mode 100644 index 000000000..3683a8eea --- /dev/null +++ b/components/esp32/include/esp_deepsleep.h @@ -0,0 +1,137 @@ +// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at + +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#ifndef __ESP_DEEPSLEEP_H__ +#define __ESP_DEEPSLEEP_H_ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** \defgroup Deep_Sleep_API Deep Sleep API + * @brief API for putting device into deep sleep + */ + +/** @addtogroup Deep_Sleep_API + * @{ + */ + +/** + * @brief Set the chip to deep-sleep mode. + * + * The device will automatically wake up after the deep-sleep time set + * by the users. Upon waking up, the device boots up from user_init. + * + * @attention The parameter time_in_us to be "uint64" is for further development. + * Only the low 32 bits of parameter time_in_us are avalable now. + * + * @param uint64 time_in_us : deep-sleep time, only the low 32bits are avalable now. unit: microsecond + * + * @return null + */ +void system_deep_sleep(uint64_t time_in_us); + +/** + * @brief Default stub to run on wake from deep sleep. + * + * Allows for executing code immediately on wake from sleep, before + * the software bootloader or esp-idf app has started up. + * + * This function is weak-linked, so you can implement your own version + * to run code immediately when the chip wakes from + * sleep. + * + * For example: + * @code + * void RTC_IRAM_ATTR esp_wake_deep_sleep(void) { + * esp_default_wake_deep_sleep(); + * // Add additional functionality here + * } + * + * (Implementing this function is not required for normal operation, + * in the usual case your app will start normally when waking from + * deep sleep.) + * + * esp_wake_deep_sleep() functionality is limited: + * + * - Runs immediately on wake, so most of the SoC is freshly reset - + * flash is unmapped and hardware is otherwise uninitialised. + * + * - Can only call functions implemented in ROM, or marked RTC_IRAM_ATTR. + * + * - Static variables marked RTC_DATA_ATTR will have initial values on + * cold boot, and maintain these values between sleep/wake cycles. + * + * - Read-only data should be marked RTC_RODATA_ATTR. Strings must be + * declared as variables also using RTC_RODATA_ATTR, like this: + * RTC_RODATA_ATTR const char message[] = "Hello from very early boot!\n"; + * + * - Any other static memory will not be initialised (either to zero, + * or to any predefined value). + * + * + * - If you implement your own stub, the first call the stub makes + should be to esp_default_wake_deep_sleep(). + */ +void esp_wake_deep_sleep(void); + +/** + * @brief Function type for stub to run on wake from sleep. + * + */ +typedef void (*esp_deep_sleep_wake_stub_fn_t)(void); + +/** + * @brief Install a new stub at runtime to run on wake from deep sleep + * + * If implementing esp_wake_deep_sleep() then it is not necessary to + * call this function. + * + * However, it is possible to call this function to substitute a + * different deep sleep stub. Any function used as a deep sleep stub + * must be marked RTC_IRAM_ATTR, and must obey the same rules given + * for esp_wake_deep_sleep(). + */ +void esp_set_deep_sleep_wake_stub(esp_deep_sleep_wake_stub_fn_t new_stub); + +/** + * @brief Return current wake from deep sleep stub, or NULL if + * no stub is installed. + */ +esp_deep_sleep_wake_stub_fn_t esp_get_deep_sleep_wake_stub(void); + +/* The default esp-idf-provided esp_wake_deep_sleep() stub. + + If you replace esp_wake_deep_sleep() in your program, or use + esp_set_deep_sleep_wake_stub(), then it is recommended you call + esp_default_wake_deep_sleep() as the first function in your stub. +*/ +void esp_default_wake_deep_sleep(void); + +/** + * @} + */ + + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __ESP_SYSTEM_H__ */ diff --git a/components/esp32/include/esp_system.h b/components/esp32/include/esp_system.h index 3a479060b..84133366d 100644 --- a/components/esp32/include/esp_system.h +++ b/components/esp32/include/esp_system.h @@ -18,6 +18,7 @@ #include #include "esp_err.h" +#include "esp_deepsleep.h" #ifdef __cplusplus extern "C" { @@ -62,21 +63,6 @@ void system_restore(void); */ void system_restart(void); -/** - * @brief Set the chip to deep-sleep mode. - * - * The device will automatically wake up after the deep-sleep time set - * by the users. Upon waking up, the device boots up from user_init. - * - * @attention The parameter time_in_us to be "uint64" is for further development. - * Only the low 32 bits of parameter time_in_us are avalable now. - * - * @param uint64 time_in_us : deep-sleep time, only the low 32bits are avalable now. unit: microsecond - * - * @return null - */ -void system_deep_sleep(uint64_t time_in_us); - /** * @brief Get system time, unit: microsecond. * diff --git a/components/esp32/include/rom/rtc.h b/components/esp32/include/rom/rtc.h index d8c0c789a..1ff7f033b 100644 --- a/components/esp32/include/rom/rtc.h +++ b/components/esp32/include/rom/rtc.h @@ -44,25 +44,25 @@ extern "C" { ************************************************************************************* * rtc memory addr type size usage * 0x3ff61000(0x50000000) Slow SIZE_CP Co-Processor code/Reset Entry - * 0x3ff61000+SIZE_CP Slow 6144-SIZE_CP - * 0x3ff62800 Slow 2048 Reserved + * 0x3ff61000+SIZE_CP Slow 4096-SIZE_CP + * 0x3ff62800 Slow 4096 Reserved * * 0x3ff80000(0x400c0000) Fast 8192 deep sleep entry code * ************************************************************************************* * Rtc store registers usage - * RTC_STORE0 - * RTC_STORE1 - * RTC_STORE2 - * RTC_STORE3 - * RTC_STORE4 Reserved - * RTC_STORE5 External Xtal Frequency - * RTC_STORE6 FAST_RTC_MEMORY_ENTRY - * RTC_STORE7 FAST_RTC_MEMORY_CRC + * RTC_CNTL_STORE0_REG + * RTC_CNTL_STORE1_REG + * RTC_CNTL_STORE2_REG + * RTC_CNTL_STORE3_REG + * RTC_CNTL_STORE4_REG Reserved + * RTC_CNTL_STORE5_REG External Xtal Frequency + * RTC_CNTL_STORE6_REG FAST_RTC_MEMORY_ENTRY + * RTC_CNTL_STORE7_REG FAST_RTC_MEMORY_CRC ************************************************************************************* */ -#define RTC_ENTRY_ADDR RTC_STORE6 -#define RTC_MEMORY_CRC RTC_STORE7 +#define RTC_ENTRY_ADDR_REG RTC_CNTL_STORE6_REG +#define RTC_MEMORY_CRC_REG RTC_CNTL_STORE7_REG typedef enum { @@ -161,7 +161,7 @@ WAKEUP_REASON rtc_get_wakeup_cause(void); * * @param uint32_t start_addr : 0 - 0x7ff for Fast RTC Memory. * - * @param uint32_t crc_len : 0 - 0x7ff, 0 for 1 byte, 0x7ff for 0x800 byte. + * @param uint32_t crc_len : 0 - 0x7ff, 0 for 4 byte, 0x7ff for 0x2000 byte. * * @return uint32_t : CRC32 result */ diff --git a/components/esp32/ld/esp32.bt.ld b/components/esp32/ld/esp32.bt.ld deleted file mode 100644 index 90d0f491b..000000000 --- a/components/esp32/ld/esp32.bt.ld +++ /dev/null @@ -1,14 +0,0 @@ -/* THESE ARE THE VIRTUAL RUNTIME ADDRESSES */ -/* The load addresses are defined later using the AT statements. */ -MEMORY -{ - /* All these values assume the flash cache is on, and have the blocks this uses subtracted from the length - of the various regions. The 'data access port' dram/drom regions map to the same iram/irom regions but - are connected to the data port of the CPU and eg allow bytewise access. */ - iram0_0_seg (RX) : org = 0x40080000, len = 0x20000 /* IRAM for PRO cpu. Not sure if happy with this, this is MMU area... */ - iram0_2_seg (RX) : org = 0x400D0018, len = 0x330000 /* Even though the segment name is iram, it is actually mapped to flash */ - dram0_0_seg (RW) : org = 0x3FFC0000, len = 0x40000 /* Shared RAM, minus rom bss/data/stack.*/ - drom0_0_seg (R) : org = 0x3F400010, len = 0x800000 -} - -_heap_end = 0x40000000; diff --git a/components/esp32/ld/esp32.bt.trace.ld b/components/esp32/ld/esp32.bt.trace.ld deleted file mode 100644 index d4d7069eb..000000000 --- a/components/esp32/ld/esp32.bt.trace.ld +++ /dev/null @@ -1,14 +0,0 @@ -/* THESE ARE THE VIRTUAL RUNTIME ADDRESSES */ -/* The load addresses are defined later using the AT statements. */ -MEMORY -{ - /* All these values assume the flash cache is on, and have the blocks this uses subtracted from the length - of the various regions. The 'data access port' dram/drom regions map to the same iram/irom regions but - are connected to the data port of the CPU and eg allow bytewise access. */ - iram0_0_seg (RX) : org = 0x40080000, len = 0x20000 /* IRAM for PRO cpu. Not sure if happy with this, this is MMU area... */ - iram0_2_seg (RX) : org = 0x400D0018, len = 0x330000 /* Even though the segment name is iram, it is actually mapped to flash */ - dram0_0_seg (RW) : org = 0x3FFC0000, len = 0x38000 /* Shared RAM, minus rom bss/data/stack.*/ - drom0_0_seg (R) : org = 0x3F400010, len = 0x800000 -} - -_heap_end = 0x3FFF8000; diff --git a/components/esp32/ld/esp32.common.ld b/components/esp32/ld/esp32.common.ld index 3fb4ca761..a3c636784 100644 --- a/components/esp32/ld/esp32.common.ld +++ b/components/esp32/ld/esp32.common.ld @@ -102,7 +102,7 @@ SECTIONS _rodata_start = ABSOLUTE(.); *(.rodata) *(.rodata.*) - *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */ + *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */ *(.gnu.linkonce.r.*) *(.rodata1) __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); @@ -132,7 +132,7 @@ SECTIONS *(.dynamic) *(.gnu.version_d) _rodata_end = ABSOLUTE(.); - /* Literals are also RO data. */ + /* Literals are also RO data. */ _lit4_start = ABSOLUTE(.); *(*.lit4) *(.lit4.*) @@ -153,4 +153,16 @@ SECTIONS _text_end = ABSOLUTE(.); _etext = .; } >iram0_2_seg + + .rtc.text : + { + . = ALIGN(4); + *(.rtc.literal .rtc.text) + } >rtc_iram_seg + + .rtc.data : + { + *(.rtc.data) + *(.rtc.rodata) + } > rtc_slow_seg } diff --git a/components/esp32/ld/esp32.ld b/components/esp32/ld/esp32.ld index becbc6baa..d6b0ac42d 100644 --- a/components/esp32/ld/esp32.ld +++ b/components/esp32/ld/esp32.ld @@ -1,14 +1,55 @@ -/* THESE ARE THE VIRTUAL RUNTIME ADDRESSES */ -/* The load addresses are defined later using the AT statements. */ +/* ESP32 Linker Script Memory Layout + + This file describes the memory layout (memory blocks) as virtual + memory addresses. + + esp32.common.ld contains output sections to link compiler output + into these memory blocks. + + *** + + This linker script is passed through the C preprocessor to include + configuration options. + + Please use preprocessor features sparingly! Restrict + to simple macros with numeric values, and/or #if/#endif blocks. +*/ +#include "sdkconfig.h" + MEMORY { /* All these values assume the flash cache is on, and have the blocks this uses subtracted from the length of the various regions. The 'data access port' dram/drom regions map to the same iram/irom regions but are connected to the data port of the CPU and eg allow bytewise access. */ - iram0_0_seg (RX) : org = 0x40080000, len = 0x20000 /* IRAM for PRO cpu. Not sure if happy with this, this is MMU area... */ - iram0_2_seg (RX) : org = 0x400D0018, len = 0x330000 /* Even though the segment name is iram, it is actually mapped to flash */ - dram0_0_seg (RW) : org = 0x3FFB0000, len = 0x50000 /* Shared RAM, minus rom bss/data/stack.*/ + + /* IRAM for PRO cpu. Not sure if happy with this, this is MMU area... */ + iram0_0_seg (RX) : org = 0x40080000, len = 0x20000 + + /* Even though the segment name is iram, it is actually mapped to flash */ + iram0_2_seg (RX) : org = 0x400D0018, len = 0x330000 + + /* Shared data RAM, excluding memory reserved for ROM bss/data/stack. + + Enabling Bluetooth & Trace Memory features in menuconfig will decrease + the amount of RAM available. + */ + dram0_0_seg (RW) : org = 0x3FFB0000 + CONFIG_BT_RESERVE_DRAM, + len = 0x50000 - CONFIG_TRACEMEM_RESERVE_DRAM - CONFIG_BT_RESERVE_DRAM + + /* Flash mapped constant data */ drom0_0_seg (R) : org = 0x3F400010, len = 0x800000 + + /* RTC fast memory (executable). Persists over deep sleep. + */ + rtc_iram_seg(RWX) : org = 0x400C0000, len = 0x2000 + + /* RTC slow memory (data accessible). Persists over deep sleep. + + Start of RTC slow memory is reserved for ULP co-processor code + data, if enabled. + */ + rtc_slow_seg(RW) : org = 0x50000000 + CONFIG_ULP_COPROC_RESERVE_MEM, + len = 0x1000 - CONFIG_ULP_COPROC_RESERVE_MEM } -_heap_end = 0x40000000; +/* Heap ends at top of dram0_0_seg */ +_heap_end = 0x40000000 - CONFIG_TRACEMEM_RESERVE_DRAM; diff --git a/components/esp32/ld/esp32.trace.ld b/components/esp32/ld/esp32.trace.ld deleted file mode 100644 index f619f8d98..000000000 --- a/components/esp32/ld/esp32.trace.ld +++ /dev/null @@ -1,14 +0,0 @@ -/* THESE ARE THE VIRTUAL RUNTIME ADDRESSES */ -/* The load addresses are defined later using the AT statements. */ -MEMORY -{ - /* All these values assume the flash cache is on, and have the blocks this uses subtracted from the length - of the various regions. The 'data access port' dram/drom regions map to the same iram/irom regions but - are connected to the data port of the CPU and eg allow bytewise access. */ - iram0_0_seg (RX) : org = 0x40080000, len = 0x20000 /* IRAM for PRO cpu. Not sure if happy with this, this is MMU area... */ - iram0_2_seg (RX) : org = 0x400D0018, len = 0x330000 /* Even though the segment name is iram, it is actually mapped to flash */ - dram0_0_seg (RW) : org = 0x3FFB0000, len = 0x48000 /* Shared RAM, minus rom bss/data/stack.*/ - drom0_0_seg (R) : org = 0x3F400010, len = 0x800000 -} - -_heap_end = 0x3FFF8000; diff --git a/components/freertos/Kconfig b/components/freertos/Kconfig index af7142bb1..7e0245e92 100644 --- a/components/freertos/Kconfig +++ b/components/freertos/Kconfig @@ -2,47 +2,47 @@ menu "FreeRTOS" # This is actually also handled in the ESP32 startup code, not only in FreeRTOS. config FREERTOS_UNICORE - bool "Run FreeRTOS only on first core" - default n - help - This version of FreeRTOS normally takes control of all cores of - the CPU. Select this if you only want to start it on the first core. - This is needed when e.g. another process needs complete control - over the second core. + bool "Run FreeRTOS only on first core" + default n + help + This version of FreeRTOS normally takes control of all cores of + the CPU. Select this if you only want to start it on the first core. + This is needed when e.g. another process needs complete control + over the second core. choice FREERTOS_CORETIMER - prompt "Xtensa timer to use as the FreeRTOS tick source" - default CONFIG_FREERTOS_CORETIMER_0 - help - FreeRTOS needs a timer with an associated interrupt to use as - the main tick source to increase counters, run timers and do - pre-emptive multitasking with. There are multiple timers available - to do this, with different interrupt priorities. Check + prompt "Xtensa timer to use as the FreeRTOS tick source" + default CONFIG_FREERTOS_CORETIMER_0 + help + FreeRTOS needs a timer with an associated interrupt to use as + the main tick source to increase counters, run timers and do + pre-emptive multitasking with. There are multiple timers available + to do this, with different interrupt priorities. Check config FREERTOS_CORETIMER_0 - bool "Timer 0 (int 6, level 1)" - help - Select this to use timer 0 + bool "Timer 0 (int 6, level 1)" + help + Select this to use timer 0 config FREERTOS_CORETIMER_1 - bool "Timer 1 (int 15, level 3)" - help - Select this to use timer 1 + bool "Timer 1 (int 15, level 3)" + help + Select this to use timer 1 config FREERTOS_CORETIMER_2 - bool "Timer 2 (int 16, level 5)" - help - Select this to use timer 2 + bool "Timer 2 (int 16, level 5)" + help + Select this to use timer 2 endchoice config FREERTOS_HZ - int "Tick rate (Hz)" - range 1 10000 - default 100 - help - Select the tick rate at which FreeRTOS does pre-emptive context switching. + int "Tick rate (Hz)" + range 1 10000 + default 100 + help + Select the tick rate at which FreeRTOS does pre-emptive context switching. config FREERTOS_ASSERT_ON_UNTESTED_FUNCTION bool "Halt when an SMP-untested function is called" @@ -53,149 +53,149 @@ config FREERTOS_ASSERT_ON_UNTESTED_FUNCTION will throw an assert(). choice FREERTOS_CHECK_STACKOVERFLOW - prompt "Check for stack overflow" - default FREERTOS_CHECK_STACKOVERFLOW_QUICK - help - FreeRTOS can check for stack overflows in threads and trigger an user function - called vApplicationStackOverflowHook when this happens. + prompt "Check for stack overflow" + default FREERTOS_CHECK_STACKOVERFLOW_QUICK + help + FreeRTOS can check for stack overflows in threads and trigger an user function + called vApplicationStackOverflowHook when this happens. config FREERTOS_CHECK_STACKOVERFLOW_NONE - bool "No checking" - help - Do not check for stack overflows (configCHECK_FOR_STACK_OVERFLOW=0) + bool "No checking" + help + Do not check for stack overflows (configCHECK_FOR_STACK_OVERFLOW=0) config FREERTOS_CHECK_STACKOVERFLOW_PTRVAL - bool "Check by stack pointer value" - help - Check for stack overflows on each context switch by checking if - the stack pointer is in a valid range. Quick but does not detect - stack overflows that happened between context switches - (configCHECK_FOR_STACK_OVERFLOW=1) + bool "Check by stack pointer value" + help + Check for stack overflows on each context switch by checking if + the stack pointer is in a valid range. Quick but does not detect + stack overflows that happened between context switches + (configCHECK_FOR_STACK_OVERFLOW=1) config FREERTOS_CHECK_STACKOVERFLOW_CANARY - bool "Check using canary bytes" - help - Places some magic bytes at the end of the stack area and on each - context switch, check if these bytes are still intact. More thorough - than just checking the pointer, but also slightly slower. - (configCHECK_FOR_STACK_OVERFLOW=2) + bool "Check using canary bytes" + help + Places some magic bytes at the end of the stack area and on each + context switch, check if these bytes are still intact. More thorough + than just checking the pointer, but also slightly slower. + (configCHECK_FOR_STACK_OVERFLOW=2) endchoice config FREERTOS_THREAD_LOCAL_STORAGE_POINTERS - int "Amount of thread local storage pointers" - range 0 256 if !WIFI_ENABLED - range 1 256 if WIFI_ENABLED - default 1 - help - FreeRTOS has the ability to store per-thread pointers in the task - control block. This controls the amount of pointers available; - 0 turns off this functionality. + int "Amount of thread local storage pointers" + range 0 256 if !WIFI_ENABLED + range 1 256 if WIFI_ENABLED + default 1 + help + FreeRTOS has the ability to store per-thread pointers in the task + control block. This controls the amount of pointers available; + 0 turns off this functionality. - If using the WiFi stack, this value must be at least 1. + If using the WiFi stack, this value must be at least 1. #This still needs to be implemented. choice FREERTOS_PANIC - prompt "Panic handler behaviour" - default FREERTOS_PANIC_PRINT_REBOOT - help - If FreeRTOS detects unexpected behaviour or an unhandled exception, the panic handler is - invoked. Configure the panic handlers action here. + prompt "Panic handler behaviour" + default FREERTOS_PANIC_PRINT_REBOOT + help + If FreeRTOS detects unexpected behaviour or an unhandled exception, the panic handler is + invoked. Configure the panic handlers action here. config FREERTOS_PANIC_PRINT_HALT - bool "Print registers and halt" - help - Outputs the relevant registers over the serial port and halt the - processor. Needs a manual reset to restart. + bool "Print registers and halt" + help + Outputs the relevant registers over the serial port and halt the + processor. Needs a manual reset to restart. config FREERTOS_PANIC_PRINT_REBOOT - bool "Print registers and reboot" - help - Outputs the relevant registers over the serial port and immediately - reset the processor. + bool "Print registers and reboot" + help + Outputs the relevant registers over the serial port and immediately + reset the processor. config FREERTOS_PANIC_SILENT_REBOOT - bool "Silent reboot" - help - Just resets the processor without outputting anything + bool "Silent reboot" + help + Just resets the processor without outputting anything config FREERTOS_PANIC_GDBSTUB - bool "Invoke GDBStub" - help - Invoke gdbstub on the serial port, allowing for gdb to attach to it to do a postmortem - of the crash. + bool "Invoke GDBStub" + help + Invoke gdbstub on the serial port, allowing for gdb to attach to it to do a postmortem + of the crash. endchoice config FREERTOS_DEBUG_OCDAWARE - bool "Make exception and panic handlers JTAG/OCD aware" - default y - help - The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and - instead of panicking, have the debugger stop on the offending instruction. + bool "Make exception and panic handlers JTAG/OCD aware" + default y + help + The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and + instead of panicking, have the debugger stop on the offending instruction. choice FREERTOS_ASSERT - prompt "FreeRTOS assertions" - default FREERTOS_ASSERT_FAIL_ABORT - help - Failed FreeRTOS configASSERT() assertions can be configured to - behave in different ways. + prompt "FreeRTOS assertions" + default FREERTOS_ASSERT_FAIL_ABORT + help + Failed FreeRTOS configASSERT() assertions can be configured to + behave in different ways. config FREERTOS_ASSERT_FAIL_ABORT - bool "abort() on failed assertions" - help - If a FreeRTOS configASSERT() fails, FreeRTOS will abort() and - halt execution. The panic handler can be configured to handle - the outcome of an abort() in different ways. + bool "abort() on failed assertions" + help + If a FreeRTOS configASSERT() fails, FreeRTOS will abort() and + halt execution. The panic handler can be configured to handle + the outcome of an abort() in different ways. config FREERTOS_ASSERT_FAIL_PRINT_CONTINUE - bool "Print and continue failed assertions" - help - If a FreeRTOS assertion fails, print it out and continue. + bool "Print and continue failed assertions" + help + If a FreeRTOS assertion fails, print it out and continue. config FREERTOS_ASSERT_DISABLE - bool "Disable FreeRTOS assertions" - help - FreeRTOS configASSERT() will not be compiled into the binary. + bool "Disable FreeRTOS assertions" + help + FreeRTOS configASSERT() will not be compiled into the binary. endchoice config FREERTOS_BREAK_ON_SCHEDULER_START_JTAG - bool "Stop program on scheduler start when JTAG/OCD is detected" - depends on FREERTOS_DEBUG_OCDAWARE - default y - help - If JTAG/OCD is connected, stop execution when the scheduler is started and the first - task is executed. + bool "Stop program on scheduler start when JTAG/OCD is detected" + depends on FREERTOS_DEBUG_OCDAWARE + default y + help + If JTAG/OCD is connected, stop execution when the scheduler is started and the first + task is executed. menuconfig ENABLE_MEMORY_DEBUG - bool "Enable heap memory debug" - default n - help - Enable this option to show malloc heap block and memory crash detect + bool "Enable heap memory debug" + default n + help + Enable this option to show malloc heap block and memory crash detect menuconfig FREERTOS_DEBUG_INTERNALS - bool "Debug FreeRTOS internals" - default n - help - Enable this option to show the menu with internal FreeRTOS debugging features. - This option does not change any code by itself, it just shows/hides some options. + bool "Debug FreeRTOS internals" + default n + help + Enable this option to show the menu with internal FreeRTOS debugging features. + This option does not change any code by itself, it just shows/hides some options. if FREERTOS_DEBUG_INTERNALS config FREERTOS_PORTMUX_DEBUG - bool "Debug portMUX portENTER_CRITICAL/portEXIT_CRITICAL" - depends on FREERTOS_DEBUG_INTERNALS - default n - help - If enabled, debug information (including integrity checks) will be printed - to UART for the port-specific MUX implementation. + bool "Debug portMUX portENTER_CRITICAL/portEXIT_CRITICAL" + depends on FREERTOS_DEBUG_INTERNALS + default n + help + If enabled, debug information (including integrity checks) will be printed + to UART for the port-specific MUX implementation. config FREERTOS_PORTMUX_DEBUG_RECURSIVE - bool "Debug portMUX Recursion" - depends on FREERTOS_PORTMUX_DEBUG - default n - help - If enabled, additional debug information will be printed for recursive - portMUX usage. + bool "Debug portMUX Recursion" + depends on FREERTOS_PORTMUX_DEBUG + default n + help + If enabled, additional debug information will be printed for recursive + portMUX usage. endif # FREERTOS_DEBUG_INTERNALS diff --git a/components/log/Kconfig b/components/log/Kconfig index 1627ea183..43e3a523f 100644 --- a/components/log/Kconfig +++ b/components/log/Kconfig @@ -28,13 +28,13 @@ config LOG_DEFAULT_LEVEL_VERBOSE endchoice config LOG_DEFAULT_LEVEL - int - default 0 if LOG_DEFAULT_LEVEL_NONE - default 1 if LOG_DEFAULT_LEVEL_ERROR - default 2 if LOG_DEFAULT_LEVEL_WARN - default 3 if LOG_DEFAULT_LEVEL_INFO - default 4 if LOG_DEFAULT_LEVEL_DEBUG - default 5 if LOG_DEFAULT_LEVEL_VERBOSE + int + default 0 if LOG_DEFAULT_LEVEL_NONE + default 1 if LOG_DEFAULT_LEVEL_ERROR + default 2 if LOG_DEFAULT_LEVEL_WARN + default 3 if LOG_DEFAULT_LEVEL_INFO + default 4 if LOG_DEFAULT_LEVEL_DEBUG + default 5 if LOG_DEFAULT_LEVEL_VERBOSE config LOG_COLORS bool "Use ANSI terminal colors in log output" diff --git a/components/lwip/Kconfig b/components/lwip/Kconfig index ceb1453f9..715d7dd46 100644 --- a/components/lwip/Kconfig +++ b/components/lwip/Kconfig @@ -1,27 +1,27 @@ menu "LWIP" config LWIP_MAX_SOCKETS - int "Max number of open sockets" - range 1 16 - default 4 - help - Sockets take up a certain amount of memory, and allowing fewer - sockets to be open at the same time conserves memory. Specify - the maximum amount of sockets here. + int "Max number of open sockets" + range 1 16 + default 4 + help + Sockets take up a certain amount of memory, and allowing fewer + sockets to be open at the same time conserves memory. Specify + the maximum amount of sockets here. config LWIP_THREAD_LOCAL_STORAGE_INDEX - int "Index for thread-local-storage pointer for lwip" - default 0 - help - Specify the thread-local-storage-pointer index for lwip - use. + int "Index for thread-local-storage pointer for lwip" + default 0 + help + Specify the thread-local-storage-pointer index for lwip + use. config LWIP_SO_REUSE - bool "Enable SO_REUSEADDR option" - default 0 - help - Enabling this option allows binding to a port which remains in - TIME_WAIT. + bool "Enable SO_REUSEADDR option" + default 0 + help + Enabling this option allows binding to a port which remains in + TIME_WAIT. endmenu diff --git a/components/mbedtls/Kconfig b/components/mbedtls/Kconfig index b9c92bd7c..60facc7d2 100644 --- a/components/mbedtls/Kconfig +++ b/components/mbedtls/Kconfig @@ -2,7 +2,7 @@ menu "mbedTLS" config MBEDTLS_SSL_MAX_CONTENT_LEN int "TLS maximum message content length" - default 16384 + default 16384 range 512 16384 help Maximum TLS message length (in bytes) supported by mbedTLS. diff --git a/components/spi_flash/Kconfig b/components/spi_flash/Kconfig index c344a6b74..154dc7c30 100644 --- a/components/spi_flash/Kconfig +++ b/components/spi_flash/Kconfig @@ -1,15 +1,15 @@ menu "SPI Flash driver" config SPI_FLASH_ENABLE_COUNTERS - bool "Enable operation counters" - default 0 - help - This option enables the following APIs: - spi_flash_reset_counters - spi_flash_dump_counters - spi_flash_get_counters - These APIs may be used to collect performance data for spi_flash APIs - and to help understand behaviour of libraries which use SPI flash. + bool "Enable operation counters" + default 0 + help + This option enables the following APIs: + spi_flash_reset_counters + spi_flash_dump_counters + spi_flash_get_counters + These APIs may be used to collect performance data for spi_flash APIs + and to help understand behaviour of libraries which use SPI flash. endmenu