dport access: introduce pause/resume instead of deinit

This commit is contained in:
Ivan Grokhotkov 2017-08-24 17:48:40 +08:00
parent f8b719d911
commit 65b046f17f
4 changed files with 17 additions and 5 deletions

View file

@ -184,7 +184,7 @@ void esp_dport_access_int_init(void)
assert(res == pdTRUE);
}
void esp_dport_access_int_deinit(void)
void esp_dport_access_int_pause(void)
{
portENTER_CRITICAL_ISR(&g_dport_mux);
dport_core_state[0] = DPORT_CORE_STATE_IDLE;
@ -193,3 +193,14 @@ void esp_dport_access_int_deinit(void)
#endif
portEXIT_CRITICAL_ISR(&g_dport_mux);
}
void esp_dport_access_int_resume(void)
{
portENTER_CRITICAL_ISR(&g_dport_mux);
dport_core_state[0] = DPORT_CORE_STATE_RUNNING;
#ifndef CONFIG_FREERTOS_UNICORE
dport_core_state[1] = DPORT_CORE_STATE_RUNNING;
#endif
portEXIT_CRITICAL_ISR(&g_dport_mux);
}

View file

@ -24,7 +24,8 @@ extern "C" {
void esp_dport_access_stall_other_cpu_start(void);
void esp_dport_access_stall_other_cpu_end(void);
void esp_dport_access_int_init(void);
void esp_dport_access_int_deinit(void);
void esp_dport_access_int_pause(void);
void esp_dport_access_int_resume(void);
#if defined(BOOTLOADER_BUILD) || defined(CONFIG_FREERTOS_UNICORE) || !defined(ESP_PLATFORM)
#define DPORT_STALL_OTHER_CPU_START()

View file

@ -211,7 +211,7 @@ void panicHandler(XtExcFrame *frame)
return;
}
haltOtherCore();
esp_dport_access_int_deinit();
esp_dport_access_int_pause();
panicPutStr("Guru Meditation Error: Core ");
panicPutDec(core_id);
panicPutStr(" panic'ed (");
@ -264,7 +264,7 @@ void panicHandler(XtExcFrame *frame)
void xt_unhandled_exception(XtExcFrame *frame)
{
haltOtherCore();
esp_dport_access_int_deinit();
esp_dport_access_int_pause();
if (!abort_called) {
panicPutStr("Guru Meditation Error of type ");
int exccause = frame->exccause;

View file

@ -270,7 +270,7 @@ void IRAM_ATTR esp_restart_noos()
esp_cpu_stall(other_core_id);
// other core is now stalled, can access DPORT registers directly
esp_dport_access_int_deinit();
esp_dport_access_int_pause();
// We need to disable TG0/TG1 watchdogs
// First enable RTC watchdog for 1 second