Merge branch 'bugfix/spi_flash_yield_coredump' into 'master'
fixes for core dump regressions See merge request espressif/esp-idf!8978
This commit is contained in:
commit
61ab64439b
12 changed files with 85 additions and 13 deletions
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@ -181,11 +181,14 @@ int xt_clock_freq(void) __attribute__((deprecated));
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#define configMAX_PRIORITIES ( 25 )
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#endif
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#ifndef CONFIG_APPTRACE_ENABLE
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#define configMINIMAL_STACK_SIZE 768
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#else
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#if defined(CONFIG_APPTRACE_ENABLE)
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/* apptrace module requires at least 2KB of stack per task */
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#define configMINIMAL_STACK_SIZE 2048
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#elif defined(CONFIG_COMPILER_OPTIMIZATION_NONE)
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/* with optimizations disabled, scheduler uses additional stack */
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#define configMINIMAL_STACK_SIZE 1024
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#else
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#define configMINIMAL_STACK_SIZE 768
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#endif
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#ifndef configIDLE_TASK_STACK_SIZE
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@ -144,7 +144,7 @@ static inline uint32_t xPortGetCoreID(void);
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// They can be called from interrupts too.
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// WARNING: Only applies to current CPU. See notes above.
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static inline unsigned portENTER_CRITICAL_NESTED(void) {
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unsigned state = XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL);
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unsigned state = XTOS_SET_MIN_INTLEVEL(XCHAL_EXCM_LEVEL);
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portbenchmarkINTERRUPT_DISABLE();
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return state;
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}
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@ -67,7 +67,7 @@ static inline bool __attribute__((always_inline)) spinlock_acquire(spinlock_t *l
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uint32_t core_id, other_core_id;
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assert(lock);
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irq_status = XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL);
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irq_status = XTOS_SET_MIN_INTLEVEL(XCHAL_EXCM_LEVEL);
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if(timeout != SPINLOCK_WAIT_FOREVER){
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RSR(CCOUNT, ccount_start);
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@ -139,7 +139,7 @@ static inline void __attribute__((always_inline)) spinlock_release(spinlock_t *l
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uint32_t core_id;
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assert(lock);
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irq_status = XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL);
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irq_status = XTOS_SET_MIN_INTLEVEL(XCHAL_EXCM_LEVEL);
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RSR(PRID, core_id);
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assert(core_id == lock->owner); // This is a mutex we didn't lock, or it's corrupt
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@ -372,7 +372,9 @@ esp_err_t IRAM_ATTR esp_flash_erase_region(esp_flash_t *chip, uint32_t start, ui
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no_yield_time_us += (esp_timer_get_time() - start_time_us);
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if (no_yield_time_us / 1000 >= CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS) {
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no_yield_time_us = 0;
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vTaskDelay(CONFIG_SPI_FLASH_ERASE_YIELD_TICKS);
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if (chip->os_func->yield) {
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chip->os_func->yield(chip->os_func_data);
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}
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}
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#endif
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}
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@ -82,6 +82,7 @@ static spi_flash_counters_t s_flash_stats;
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static esp_err_t spi_flash_translate_rc(esp_rom_spiflash_result_t rc);
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static bool is_safe_write_address(size_t addr, size_t size);
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static void spi_flash_os_yield(void);
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const DRAM_ATTR spi_flash_guard_funcs_t g_flash_guard_default_ops = {
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.start = spi_flash_disable_interrupts_caches_and_other_cpu,
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@ -89,18 +90,20 @@ const DRAM_ATTR spi_flash_guard_funcs_t g_flash_guard_default_ops = {
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.op_lock = spi_flash_op_lock,
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.op_unlock = spi_flash_op_unlock,
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#if !CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED
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.is_safe_write_address = is_safe_write_address
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.is_safe_write_address = is_safe_write_address,
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#endif
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.yield = spi_flash_os_yield,
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};
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const DRAM_ATTR spi_flash_guard_funcs_t g_flash_guard_no_os_ops = {
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.start = spi_flash_disable_interrupts_caches_and_other_cpu_no_os,
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.end = spi_flash_enable_interrupts_caches_no_os,
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.op_lock = 0,
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.op_unlock = 0,
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.op_lock = NULL,
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.op_unlock = NULL,
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#if !CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED
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.is_safe_write_address = 0
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.is_safe_write_address = NULL,
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#endif
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.yield = NULL,
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};
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static const spi_flash_guard_funcs_t *s_flash_guard_ops;
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@ -185,6 +188,13 @@ static inline void IRAM_ATTR spi_flash_guard_op_unlock(void)
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}
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}
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static void IRAM_ATTR spi_flash_os_yield(void)
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{
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#ifdef CONFIG_SPI_FLASH_YIELD_DURING_ERASE
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vTaskDelay(CONFIG_SPI_FLASH_ERASE_YIELD_TICKS);
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#endif
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}
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#ifdef CONFIG_SPI_FLASH_USE_LEGACY_IMPL
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static esp_rom_spiflash_result_t IRAM_ATTR spi_flash_unlock(void)
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{
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@ -263,7 +273,9 @@ esp_err_t IRAM_ATTR spi_flash_erase_range(size_t start_addr, size_t size)
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no_yield_time_us += (esp_timer_get_time() - start_time_us);
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if (no_yield_time_us / 1000 >= CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS) {
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no_yield_time_us = 0;
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vTaskDelay(CONFIG_SPI_FLASH_ERASE_YIELD_TICKS);
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if (s_flash_guard_ops && s_flash_guard_ops->yield) {
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s_flash_guard_ops->yield();
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}
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}
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#endif
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}
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@ -50,6 +50,9 @@ typedef struct {
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/** Delay for at least 'us' microseconds. Called in between 'start' and 'end'. */
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esp_err_t (*delay_us)(void *arg, unsigned us);
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/** Yield to other tasks. Called during erase operations. */
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esp_err_t (*yield)(void *arg);
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} esp_flash_os_functions_t;
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/** @brief Structure to describe a SPI flash chip connected to the system.
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@ -341,6 +341,10 @@ typedef void (*spi_flash_op_unlock_func_t)(void);
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* @brief Function to protect SPI flash critical regions corruption.
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*/
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typedef bool (*spi_flash_is_safe_write_address_t)(size_t addr, size_t size);
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/**
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* @brief Function to yield to the OS during erase operation.
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*/
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typedef void (*spi_flash_os_yield_t)(void);
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/**
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* Structure holding SPI flash access critical sections management functions.
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@ -381,6 +385,7 @@ typedef struct {
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#if !CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED
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spi_flash_is_safe_write_address_t is_safe_write_address; /**< checks flash write addresses.*/
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#endif
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spi_flash_os_yield_t yield; /**< yield to the OS during flash erase */
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} spi_flash_guard_funcs_t;
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/**
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@ -17,6 +17,8 @@
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#include "esp_spi_flash.h" //for ``g_flash_guard_default_ops``
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#include "esp_flash.h"
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#include "esp_flash_partitions.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "hal/spi_types.h"
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#include "sdkconfig.h"
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@ -101,6 +103,14 @@ static IRAM_ATTR esp_err_t delay_us(void *arg, unsigned us)
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return ESP_OK;
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}
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static IRAM_ATTR esp_err_t spi_flash_os_yield(void *arg)
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{
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#ifdef CONFIG_SPI_FLASH_YIELD_DURING_ERASE
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vTaskDelay(CONFIG_SPI_FLASH_ERASE_YIELD_TICKS);
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#endif
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return ESP_OK;
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}
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static IRAM_ATTR esp_err_t main_flash_region_protected(void* arg, size_t start_addr, size_t size)
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{
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if (((spi1_app_func_arg_t*)arg)->no_protect || esp_partition_main_flash_region_safe(start_addr, size)) {
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@ -117,14 +127,16 @@ static DRAM_ATTR spi1_app_func_arg_t main_flash_arg = {};
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static const DRAM_ATTR esp_flash_os_functions_t esp_flash_spi1_default_os_functions = {
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.start = spi1_start,
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.end = spi1_end,
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.delay_us = delay_us,
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.region_protected = main_flash_region_protected,
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.delay_us = delay_us,
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.yield = spi_flash_os_yield,
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};
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static const esp_flash_os_functions_t esp_flash_spi23_default_os_functions = {
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.start = spi_start,
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.end = spi_end,
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.delay_us = delay_us,
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.yield = spi_flash_os_yield
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};
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static spi_bus_lock_dev_handle_t register_dev(int host_id)
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@ -76,6 +76,7 @@ const DRAM_ATTR esp_flash_os_functions_t esp_flash_noos_functions = {
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.end = end,
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.delay_us = delay_us,
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.region_protected = NULL,
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.yield = NULL,
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};
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esp_err_t IRAM_ATTR esp_flash_app_disable_os_functions(esp_flash_t* chip)
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@ -0,0 +1 @@
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CONFIG_SPI_FLASH_YIELD_DURING_ERASE=n
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@ -128,6 +128,22 @@ def test_coredump_uart_abort(env, extra_data):
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# TODO: check the contents of core dump output
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@panic_test()
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def test_coredump_uart_int_wdt(env, extra_data):
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with get_dut(env, "coredump_uart", "test_int_wdt") as dut:
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dut.expect_gme("Interrupt wdt timeout on CPU0")
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dut.expect_reg_dump(0)
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dut.expect("Backtrace:")
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dut.expect_none("CORRUPTED", "Guru Meditation")
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dut.expect_reg_dump(1)
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dut.expect("Backtrace:")
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dut.expect_elf_sha256()
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dut.expect_none("CORRUPTED", "Guru Meditation")
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dut.expect("Rebooting...")
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dut.process_coredump_uart()
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# TODO: check the contents of core dump output
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@panic_test()
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def test_coredump_flash_abort(env, extra_data):
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with get_dut(env, "coredump_flash", "test_abort") as dut:
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@ -140,5 +156,21 @@ def test_coredump_flash_abort(env, extra_data):
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# TODO: check the contents of core dump output
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@panic_test()
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def test_coredump_flash_int_wdt(env, extra_data):
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with get_dut(env, "coredump_flash", "test_int_wdt") as dut:
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dut.expect_gme("Interrupt wdt timeout on CPU0")
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dut.expect_reg_dump(0)
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dut.expect("Backtrace:")
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dut.expect_none("CORRUPTED", "Guru Meditation")
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dut.expect_reg_dump(1)
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dut.expect("Backtrace:")
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dut.expect_elf_sha256()
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dut.expect_none("CORRUPTED", "Guru Meditation")
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dut.expect("Rebooting...")
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dut.process_coredump_flash()
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# TODO: check the contents of core dump output
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if __name__ == '__main__':
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run_all(__file__)
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@ -1 +1,2 @@
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CONFIG_COMPILER_OPTIMIZATION_NONE=y
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CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK=y
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