Merge branch 'bugfix/spiram_80m_clk_config' into 'master'
clk: fix regression in clock setting for SPIRAM with 80MHz config See merge request idf/esp-idf!3724
This commit is contained in:
commit
5aa7abb216
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@ -1347,6 +1347,20 @@ UT_004_13:
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- UT_T1_1
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- psram
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UT_004_14:
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<<: *unit_test_template
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tags:
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- ESP32_IDF
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- UT_T1_1
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- psram
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UT_004_15:
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<<: *unit_test_template
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tags:
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- ESP32_IDF
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- UT_T1_1
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- psram
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UT_005_01:
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<<: *unit_test_template
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tags:
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@ -297,10 +297,10 @@ void esp_perip_clk_init(void)
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//a weird mode where clock to the peripheral is disabled but reset is also disabled, it 'hangs'
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//in a state where it outputs a continuous 80MHz signal. Mask its bit here because we should
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//not modify that state, regardless of what we calculated earlier.
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if (!spicommon_periph_in_use(HSPI_HOST)) {
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if (spicommon_periph_in_use(HSPI_HOST)) {
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common_perip_clk &= ~DPORT_SPI2_CLK_EN;
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}
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if (!spicommon_periph_in_use(VSPI_HOST)) {
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if (spicommon_periph_in_use(VSPI_HOST)) {
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common_perip_clk &= ~DPORT_SPI3_CLK_EN;
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}
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#endif
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@ -24,11 +24,15 @@ This code tests the interaction between PSRAM and SPI flash routines.
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#include "esp_partition.h"
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#include "test_utils.h"
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#if CONFIG_SPIRAM_SUPPORT
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#if CONFIG_SPIRAM_USE_CAPS_ALLOC || CONFIG_SPIRAM_USE_MEMMAP
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#if CONFIG_SPIRAM_USE_CAPS_ALLOC || CONFIG_SPIRAM_USE_MALLOC
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#define USE_CAPS_ALLOC 1
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#endif // CONFIG_SPIRAM_USE_CAPS_ALLOC || CONFIG_SPIRAM_USE_MALLOC
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#define TSTSZ (16*1024)
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#if !CONFIG_FREERTOS_UNICORE
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volatile static int res[2], err[2];
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@ -51,11 +55,11 @@ void tstMem(void *arg) {
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}
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TEST_CASE("Spiram cache flush on mmap", "[spiram][ignore]")
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TEST_CASE("Spiram cache flush on mmap", "[spiram]")
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{
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void *mem[2];
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res[0]=0; res[1]=0;
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#if CONFIG_SPIRAM_USE_CAPS_ALLOC
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#if USE_CAPS_ALLOC
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printf("Allocating SPI RAM chunk...\n");
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mem[0]=heap_caps_malloc(TSTSZ, MALLOC_CAP_SPIRAM);
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mem[1]=heap_caps_malloc(TSTSZ, MALLOC_CAP_SPIRAM);
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@ -71,7 +75,6 @@ TEST_CASE("Spiram cache flush on mmap", "[spiram][ignore]")
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xTaskCreatePinnedToCore(tstMem , "tskone" , 2048, mem[0], 3, &th[0], 0);
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xTaskCreatePinnedToCore(tstMem , "tsktwo" , 2048, mem[1], 3, &th[1], 1);
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const esp_partition_t* part = get_test_data_partition();
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for (int l=0; l<10; l++) {
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for (int p=0; p<4096*1024; p+=65536) {
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const void *out;
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@ -79,14 +82,13 @@ TEST_CASE("Spiram cache flush on mmap", "[spiram][ignore]")
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spi_flash_mmap(p, 65536, SPI_FLASH_MMAP_DATA, &out, &h);
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spi_flash_munmap(h);
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}
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printf("%d/10\n", l);
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}
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printf("Checked memory %d and %d times. Errors: %d and %d\n", res[0], res[1], err[0], err[1]);
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vTaskDelete(th[0]);
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vTaskDelete(th[1]);
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#if CONFIG_SPIRAM_USE_CAPS_ALLOC
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#if USE_CAPS_ALLOC
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free(mem[0]);
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free(mem[1]);
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#endif
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@ -97,11 +99,11 @@ TEST_CASE("Spiram cache flush on mmap", "[spiram][ignore]")
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#define CYCLES 1024
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TEST_CASE("Spiram cache flush on write/read", "[spiram][ignore]")
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TEST_CASE("Spiram cache flush on write/read", "[spiram]")
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{
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void *mem[2];
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res[0]=0; res[1]=0;
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#if CONFIG_SPIRAM_USE_CAPS_ALLOC
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#if USE_CAPS_ALLOC
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printf("Allocating SPI RAM chunk...\n");
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mem[0]=heap_caps_malloc(TSTSZ, MALLOC_CAP_SPIRAM);
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mem[1]=heap_caps_malloc(TSTSZ, MALLOC_CAP_SPIRAM);
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@ -127,7 +129,6 @@ TEST_CASE("Spiram cache flush on write/read", "[spiram][ignore]")
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spi_flash_mmap_handle_t handle;
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esp_partition_mmap(part, 0, 512, SPI_FLASH_MMAP_DATA, &out, &handle);
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for (int i=0; i<CYCLES; i++) {
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printf("%d/%d\n", i, CYCLES);
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esp_partition_write(part, 0, buf, 512);
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esp_partition_read(part, 0, buf, 512);
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vTaskDelay(1);
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@ -138,15 +139,16 @@ TEST_CASE("Spiram cache flush on write/read", "[spiram][ignore]")
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vTaskDelete(th[0]);
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vTaskDelete(th[1]);
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#if CONFIG_SPIRAM_USE_CAPS_ALLOC
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#if USE_CAPS_ALLOC
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free(mem[0]);
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free(mem[1]);
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#endif
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}
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#endif // !CONFIG_FREERTOS_UNICORE
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IRAM_ATTR TEST_CASE("Spiram memcmp weirdness at 80MHz", "[spiram][ignore]") {
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IRAM_ATTR TEST_CASE("Spiram memcmp weirdness at 80MHz", "[spiram]") {
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char *mem1=malloc(0x10000);
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#if CONFIG_SPIRAM_USE_CAPS_ALLOC
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#if USE_CAPS_ALLOC
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char *mem2=heap_caps_malloc(0x10000, MALLOC_CAP_SPIRAM);
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#else
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char *mem2=(void*)0x3f800000;
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@ -173,11 +175,11 @@ IRAM_ATTR TEST_CASE("Spiram memcmp weirdness at 80MHz", "[spiram][ignore]") {
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}
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}
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}
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free(mem1);
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#if USE_CAPS_ALLOC
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free(mem2);
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#endif
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}
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#endif //CONFIG_SPIRAM_USE_CAPS_ALLOC || CONFIG_SPIRAM_USE_MEMMAP
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#endif // CONFIG_SPIRAM_SUPPORT
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@ -1,3 +1,2 @@
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TEST_EXCLUDE_COMPONENTS=libsodium bt app_update driver esp32 spi_flash
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CONFIG_SPIRAM_SUPPORT=y
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CONFIG_SPIRAM_BANKSWITCH_ENABLE=n
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@ -1,3 +1,2 @@
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TEST_COMPONENTS=driver esp32 spi_flash
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CONFIG_SPIRAM_SUPPORT=y
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CONFIG_SPIRAM_BANKSWITCH_ENABLE=n
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@ -27,4 +27,5 @@ CONFIG_SUPPORT_STATIC_ALLOCATION=y
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CONFIG_ESP_TIMER_PROFILING=y
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CONFIG_ADC2_DISABLE_DAC=n
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CONFIG_WARN_WRITE_STRINGS=y
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CONFIG_SPI_MASTER_IN_IRAM=y
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CONFIG_SPI_MASTER_IN_IRAM=y
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CONFIG_SPIRAM_BANKSWITCH_ENABLE=n
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