From 546026d01819fc7d39b61058a3be7a790f60e069 Mon Sep 17 00:00:00 2001 From: suda-morris <362953310@qq.com> Date: Tue, 17 Sep 2019 10:28:51 +0800 Subject: [PATCH] make psram workaround depend on chip revison Since ESP32 revision 3, the PSRAM workaround is not needed. --- components/efuse/src/esp_efuse_fields.c | 2 +- components/esp32/Kconfig | 4 +++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/components/efuse/src/esp_efuse_fields.c b/components/efuse/src/esp_efuse_fields.c index 39a38f274..8e3cdc799 100644 --- a/components/efuse/src/esp_efuse_fields.c +++ b/components/efuse/src/esp_efuse_fields.c @@ -35,7 +35,7 @@ uint8_t esp_efuse_get_chip_ver(void) uint8_t eco_bit0, eco_bit1, eco_bit2; esp_efuse_read_field_blob(ESP_EFUSE_CHIP_VER_REV1, &eco_bit0, 1); esp_efuse_read_field_blob(ESP_EFUSE_CHIP_VER_REV2, &eco_bit1, 1); - eco_bit2 = (REG_READ(APB_CTRL_DATE_REG) & 80000000) >> 31; + eco_bit2 = (REG_READ(APB_CTRL_DATE_REG) & 0x80000000) >> 31; uint32_t combine_value = (eco_bit2 << 2) | (eco_bit1 << 1) | eco_bit0; uint8_t chip_ver = 0; switch (combine_value) { diff --git a/components/esp32/Kconfig b/components/esp32/Kconfig index d0e9b5da0..21ccd666f 100644 --- a/components/esp32/Kconfig +++ b/components/esp32/Kconfig @@ -149,7 +149,7 @@ menu "ESP32-specific" config SPIRAM_CACHE_WORKAROUND bool "Enable workaround for bug in SPI RAM cache for Rev1 ESP32s" - depends on SPIRAM_USE_MEMMAP || SPIRAM_USE_CAPS_ALLOC || SPIRAM_USE_MALLOC + depends on (SPIRAM_USE_MEMMAP || SPIRAM_USE_CAPS_ALLOC || SPIRAM_USE_MALLOC) && (ESP32_REV_MIN < 3) default "y" help Revision 1 of the ESP32 has a bug that can cause a write to PSRAM not to take place in some situations @@ -160,6 +160,8 @@ menu "ESP32-specific" This will also not use any bits of newlib that are located in ROM, opting for a version that is compiled with the workaround and located in flash instead. + The workaround is not required for ESP32 revision 3 and above. + config SPIRAM_BANKSWITCH_ENABLE bool "Enable bank switching for >4MiB external RAM" default y